typedef unsigned char (z80_read_f)(unsigned short a);\r
typedef void (z80_write_f)(unsigned int a, unsigned char data);\r
\r
+// ----------------------- SH2 CPU -----------------------\r
+\r
+#include "cpu/sh2mame/sh2.h"\r
+\r
+SH2 msh2, ssh2;\r
+#define ash2_pc() msh2.ppc\r
+#define ash2_end_run(after) sh2_icount = after\r
+\r
+#define msh2_pc() msh2.ppc\r
+#define ssh2_pc() ssh2.ppc\r
+\r
+#define msh2_reg(x) msh2.r[x]\r
+#define ssh2_reg(x) ssh2.r[x]\r
+\r
// ---------------------------------------------------------\r
\r
// main oscillator clock which controls timing\r
unsigned short z80_bank68k; // 0a\r
unsigned short pad0;\r
unsigned char pad1;\r
- unsigned char z80_reset; // z80 reset held\r
+ unsigned char z80_reset; // 0f z80 reset held\r
unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
unsigned short eeprom_addr; // EEPROM address register\r
unsigned char eeprom_cycle; // EEPROM cycle number\r
#define Pico_mcd ((mcd_state *)Pico.rom)\r
\r
// 32X\r
+#define P32XS_FM (1<<15)\r
+#define P32XS2_ADEN (1<< 9)\r
+\r
+#define P32XV_nPAL (1<<15)\r
+#define P32XV_PRI (1<< 7)\r
+#define P32XV_Mx (3<< 0)\r
+\r
+#define P32XV_VBLK (1<<15)\r
+#define P32XV_HBLK (1<<14)\r
+#define P32XV_PEN (1<<13)\r
+#define P32XV_nFEN (1<< 1)\r
+#define P32XV_FS (1<< 0)\r
+\r
+#define P32XF_68KPOLL (1 << 0)\r
+#define P32XF_MSH2POLL (1 << 1)\r
+#define P32XF_SSH2POLL (1 << 2)\r
+\r
struct Pico32x\r
{\r
unsigned short regs[0x20];\r
unsigned short vdp_regs[0x10];\r
unsigned char pending_fb;\r
- unsigned char pad[3];\r
+ unsigned char dirty_pal;\r
+ unsigned char pad[2];\r
+ unsigned int emu_flags;\r
+};\r
+\r
+struct Pico32xMem\r
+{\r
+ unsigned char sdram[0x40000];\r
+ unsigned short dram[2][0x20000/2]; // AKA fb\r
+ unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE\r
+ unsigned char sh2_rom_m[0x800];\r
+ unsigned char sh2_rom_s[0x400];\r
+ unsigned short pal[0x100];\r
+ unsigned short pal_native[0x100]; // converted to native (for renderer)\r
};\r
\r
// area.c\r
PICO_INTERNAL void PicoFrameStart(void);\r
void PicoDrawSync(int to, int blank_last_line);\r
void BackFill(int reg7, int sh);\r
-void FinalizeLineRGB555(int sh);\r
+void FinalizeLineRGB555(int sh, int line);\r
extern int DrawScanline;\r
#define MAX_LINE_SPRITES 29\r
extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES];\r
void PicoDrawSetColorFormatMode4(int which);\r
\r
// memory.c\r
-PICO_INTERNAL void PicoInitPc(unsigned int pc);\r
-PICO_INTERNAL unsigned int PicoCheckPc(unsigned int pc);\r
PICO_INTERNAL void PicoMemSetup(void);\r
unsigned int PicoRead8_io(unsigned int a);\r
unsigned int PicoRead16_io(unsigned int a);\r
\r
// cd/memory.c\r
PICO_INTERNAL void PicoMemSetupCD(void);\r
-PICO_INTERNAL_ASM void PicoMemRemapCD(int r3);\r
-PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);\r
+void PicoMemStateLoaded(void);\r
\r
// pico.c\r
extern struct Pico Pico;\r
// 32x/32x.c\r
extern struct Pico32x Pico32x;\r
void Pico32xInit(void);\r
-void Pico32xStartup(void);\r
+void PicoPower32x(void);\r
void PicoReset32x(void);\r
+void Pico32xStartup(void);\r
+void PicoUnload32x(void);\r
+void PicoFrame32x(void);\r
\r
// 32x/memory.c\r
+struct Pico32xMem *Pico32xMem;\r
unsigned int PicoRead8_32x(unsigned int a);\r
unsigned int PicoRead16_32x(unsigned int a);\r
void PicoWrite8_32x(unsigned int a, unsigned int d);\r
void PicoWrite16_32x(unsigned int a, unsigned int d);\r
void PicoMemSetup32x(void);\r
+void Pico32xSwapDRAM(int b);\r
+\r
+// 32x/draw.c\r
+void FinalizeLine32xRGB555(int sh, int line);\r
\r
/* avoid dependency on newer glibc */\r
static __inline int isspace_(int c)\r
#define MEMH_FUNC\r
#endif\r
\r
+#ifdef __GNUC__\r
+#define NOINLINE __attribute__((noinline))\r
+#else\r
+#define NOINLINE\r
+#endif\r
+\r
#ifdef __cplusplus\r
} // End of extern "C"\r
#endif\r