+/*
+ * PicoDrive
+ * (C) notaz, 2009,2010
+ *
+ * This work is licensed under the terms of MAME license.
+ * See COPYING file in the top-level directory.
+ */
/*
* <random_info=mem_map>
* 00000000-029fffff linux (42MB)
#include "soc.h"
#include "plat_gp2x.h"
#include "../common/emu.h"
+#include "../common/plat.h"
#include "../common/arm_utils.h"
#include "pollux_set.h"
static volatile unsigned short *memregs;
-static volatile unsigned long *memregl;
+static volatile unsigned int *memregl;
static int memdev = -1;
static int battdev = -1;
static char cpuclk_was_changed = 0;
static unsigned short memtimex_old[2];
-static unsigned int pllsetreg0;
+static unsigned int pllsetreg0_old;
+static unsigned int timer_drift; // count per real second
static int last_pal_setting = 0;
static void gp2x_video_wait_vsync_(void)
{
- while (!(memregl[0x308c>>2] & (1 << 10)));
+ while (!(memregl[0x308c>>2] & (1 << 10)))
spend_cycles(128);
memregl[0x308c>>2] |= 1 << 10;
}
#define TIMER_BASE3 0x1980
#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
-unsigned int gp2x_get_ticks_us_(void)
+static unsigned int gp2x_get_ticks_us_(void)
{
TIMER_REG(0x08) = 0x4b; /* run timer, latch value */
return TIMER_REG(0);
}
-unsigned int gp2x_get_ticks_ms_(void)
+static unsigned int gp2x_get_ticks_ms_(void)
{
/* approximate /= 1000 */
unsigned long long v64;
TIMER_REG(0x44) = 0; /* dividers back to default */
}
+/* note: both PLLs are programmed the same way,
+ * the databook incorrectly states that PLL1 differs */
+static int decode_pll(unsigned int reg)
+{
+ long long v;
+ int p, m, s;
+
+ p = (reg >> 18) & 0x3f;
+ m = (reg >> 8) & 0x3ff;
+ s = reg & 0xff;
+
+ if (p == 0)
+ p = 1;
+
+ v = 27000000; // master clock
+ v = v * m / (p << s);
+ return v;
+}
+
+int pollux_get_real_snd_rate(int req_rate)
+{
+ int clk0_src, clk1_src, rate, div;
+
+ clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
+ clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
+ if (clk0_src > 1 || clk1_src != 7) {
+ fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
+ return req_rate;
+ }
+
+ rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
+
+ // apply divisors
+ div = ((memregl[0xdbc4>>2] >> 4) & 0x3f) + 1;
+ rate /= div;
+ div = ((memregl[0xdbc8>>2] >> 4) & 0x3f) + 1;
+ rate /= div;
+ rate /= 64;
+
+ //printf("rate %d\n", rate);
+ rate -= rate * timer_drift / 1000000;
+ printf("adjusted rate: %d\n", rate);
+
+ if (rate < 8000-1000 || rate > 44100+1000) {
+ fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
+ return req_rate;
+ }
+
+ return rate;
+}
+
void pollux_init(void)
{
struct fb_fix_screeninfo fbfix;
- int i, ret;
+ int i, ret, rate, timer_div;
memdev = open("/dev/mem", O_RDWR);
if (memdev == -1) {
if (battdev < 0)
perror("Warning: could't open pollux_batt");
+ /* find what PLL1 runs at, for the timer */
+ rate = decode_pll(memregl[0xf008>>2]);
+ printf("PLL1 @ %dHz\n", rate);
+
/* setup timer */
- if (TIMER_REG(0x08) & 8)
- timer_cleanup();
+ timer_div = (rate + 500000) / 1000000;
+ if (1 <= timer_div && timer_div <= 256) {
+ timer_drift = (rate - (timer_div * 1000000)) / timer_div;
+
+ if (TIMER_REG(0x08) & 8) {
+ fprintf(stderr, "warning: timer in use, overriding!\n");
+ timer_cleanup();
+ }
- TIMER_REG(0x44) = 0x922; /* using PLL1, divider value 147 */
- TIMER_REG(0x40) = 0x0c; /* clocks on */
- TIMER_REG(0x08) = 0x6b; /* run timer, clear irq, latch value */
+ TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1, divide by it's rate */
+ TIMER_REG(0x40) = 0x0c; /* clocks on */
+ TIMER_REG(0x08) = 0x6b; /* run timer, clear irq, latch value */
- pllsetreg0 = memregl[0xf004>>2];
+ gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
+ gp2x_get_ticks_us = gp2x_get_ticks_us_;
+ }
+ else {
+ fprintf(stderr, "warning: could not make use of timer\n");
+
+ // those functions are actually not good at all on Wiz kernel
+ gp2x_get_ticks_ms = plat_get_ticks_ms_good;
+ gp2x_get_ticks_us = plat_get_ticks_us_good;
+ }
+
+ pllsetreg0_old = memregl[0xf004>>2];
memtimex_old[0] = memregs[0x14802>>1];
memtimex_old[1] = memregs[0x14804>>1];
gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
- gp2x_set_cpuclk = gp2x_set_cpuclk_;
+ /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
+ * by reprogramming the PLL0 then, as it overclocks system bus */
+ if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
+ gp2x_set_cpuclk = gp2x_set_cpuclk_;
+ else {
+ fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
+ memregl[0xf000>>2]);
+ gp2x_set_cpuclk = NULL;
+ }
set_lcd_custom_rate = set_lcd_custom_rate_;
unset_lcd_custom_rate = unset_lcd_custom_rate_;
set_ram_timings = set_ram_timings_;
unset_ram_timings = unset_ram_timings_;
gp2x_read_battery = gp2x_read_battery_;
-
- gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
- gp2x_get_ticks_us = gp2x_get_ticks_us_;
}
void pollux_finish(void)
gp2x_video_changemode_ll_(16);
unset_ram_timings_();
if (cpuclk_was_changed) {
- memregl[0xf004>>2] = pllsetreg0;
+ memregl[0xf004>>2] = pllsetreg0_old;
memregl[0xf07c>>2] |= 0x8000;
}
+ timer_cleanup();
munmap((void *)memregs, 0x20000);
close(memdev);