#define _IN_DMA\r
\r
#include "externals.h"\r
+#include "registers.h"\r
\r
-////////////////////////////////////////////////////////////////////////\r
-// READ DMA (one value)\r
-////////////////////////////////////////////////////////////////////////\r
-\r
-unsigned short CALLBACK SPUreadDMA(void)\r
+static void set_dma_end(int iSize, unsigned int cycles)\r
{\r
- unsigned short s=spu.spuMem[spu.spuAddr>>1];\r
- spu.spuAddr+=2;\r
- if(spu.spuAddr>0x7ffff) spu.spuAddr=0;\r
-\r
- return s;\r
+ // this must be > psxdma.c dma irq\r
+ // Road Rash also wants a considerable delay, maybe because of fifo?\r
+ cycles += iSize * 20; // maybe\r
+ cycles |= 1; // indicates dma is active\r
+ spu.cycles_dma_end = cycles;\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r
void CALLBACK SPUreadDMAMem(unsigned short *pusPSXMem, int iSize,\r
unsigned int cycles)\r
{\r
- int i;\r
-\r
- do_samples_if_needed(cycles);\r
-\r
- for(i=0;i<iSize;i++)\r
- {\r
- *pusPSXMem++=spu.spuMem[spu.spuAddr>>1]; // spu addr got by writeregister\r
- spu.spuAddr+=2; // inc spu addr\r
- if(spu.spuAddr>0x7ffff) spu.spuAddr=0; // wrap\r
- }\r
-}\r
-\r
-////////////////////////////////////////////////////////////////////////\r
-////////////////////////////////////////////////////////////////////////\r
-////////////////////////////////////////////////////////////////////////\r
-\r
-// to investigate: do sound data updates by writedma affect spu\r
-// irqs? Will an irq be triggered, if new data is written to\r
-// the memory irq address?\r
-\r
-////////////////////////////////////////////////////////////////////////\r
-// WRITE DMA (one value)\r
-////////////////////////////////////////////////////////////////////////\r
- \r
-void CALLBACK SPUwriteDMA(unsigned short val)\r
-{\r
- spu.spuMem[spu.spuAddr>>1] = val; // spu addr got by writeregister\r
-\r
- spu.spuAddr+=2; // inc spu addr\r
- if(spu.spuAddr>0x7ffff) spu.spuAddr=0; // wrap\r
+ unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
+ int i, irq;\r
+\r
+ do_samples_if_needed(cycles, 1);\r
+ irq = addr <= irq_addr && irq_addr < addr + iSize*2;\r
+\r
+ for(i = 0; i < iSize; i++)\r
+ {\r
+ *pusPSXMem++ = *(unsigned short *)(spu.spuMemC + addr);\r
+ addr += 2;\r
+ addr &= 0x7fffe;\r
+ }\r
+ if (irq && (spu.spuCtrl & CTRL_IRQ))\r
+ log_unhandled("rdma spu irq: %x/%x+%x\n", irq_addr, spu.spuAddr, iSize * 2);\r
+ spu.spuAddr = addr;\r
+ set_dma_end(iSize, cycles);\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r
void CALLBACK SPUwriteDMAMem(unsigned short *pusPSXMem, int iSize,\r
unsigned int cycles)\r
{\r
- int i;\r
+ unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
+ int i, irq;\r
\r
- do_samples_if_needed(cycles);\r
-\r
- if(spu.spuAddr + iSize*2 < 0x80000)\r
- {\r
- memcpy(&spu.spuMem[spu.spuAddr>>1], pusPSXMem, iSize*2);\r
- spu.spuAddr += iSize*2;\r
- return;\r
- }\r
-\r
- for(i=0;i<iSize;i++)\r
+ do_samples_if_needed(cycles, 1);\r
+ spu.bMemDirty = 1;\r
+ irq = addr <= irq_addr && irq_addr < addr + iSize*2;\r
+\r
+ if (addr + iSize*2 < 0x80000)\r
+ {\r
+ memcpy(spu.spuMemC + addr, pusPSXMem, iSize*2);\r
+ addr += iSize*2;\r
+ }\r
+ else\r
+ {\r
+ irq |= irq_addr < ((addr + iSize*2) & 0x7ffff);\r
+ for (i = 0; i < iSize; i++)\r
{\r
- spu.spuMem[spu.spuAddr>>1] = *pusPSXMem++; // spu addr got by writeregister\r
- spu.spuAddr+=2; // inc spu addr\r
- spu.spuAddr&=0x7ffff; // wrap\r
+ *(unsigned short *)(spu.spuMemC + addr) = *pusPSXMem++;\r
+ addr += 2;\r
+ addr &= 0x7fffe;\r
}\r
+ }\r
+ if (irq && (spu.spuCtrl & CTRL_IRQ)) // unhandled because need to implement delay\r
+ log_unhandled("wdma spu irq: %x/%x+%x\n", irq_addr, spu.spuAddr, iSize * 2);\r
+ spu.spuAddr = addr;\r
+ set_dma_end(iSize, cycles);\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r