////////////////////////////////////////////////////////////////////////\r
\r
void LoadStateV5(SPUFreeze_t * pF); // newest version\r
-void LoadStateUnknown(SPUFreeze_t * pF); // unknown format\r
-\r
-extern int lastch;\r
+void LoadStateUnknown(SPUFreeze_t * pF, uint32_t cycles); // unknown format\r
\r
// we want to retain compatibility between versions,\r
// so use original channel struct\r
static void save_channel(SPUCHAN_orig *d, const SPUCHAN *s, int ch)\r
{\r
memset(d, 0, sizeof(*d));\r
- d->bNew = !!(dwNewChannel & (1<<ch));\r
+ d->bNew = !!(spu.dwNewChannel & (1<<ch));\r
d->iSBPos = s->iSBPos;\r
d->spos = s->spos;\r
d->sinc = s->sinc;\r
d->iStart = (regAreaGet(ch,6)&~1)<<3;\r
d->iCurr = 0; // set by the caller\r
d->iLoop = 0; // set by the caller\r
- d->bOn = !!(dwChannelOn & (1<<ch));\r
+ d->bOn = !!(spu.dwChannelOn & (1<<ch));\r
d->bStop = s->bStop;\r
d->bReverb = s->bReverb;\r
d->iActFreq = 1;\r
static void load_channel(SPUCHAN *d, const SPUCHAN_orig *s, int ch)\r
{\r
memset(d, 0, sizeof(*d));\r
- if (s->bNew) dwNewChannel |= 1<<ch;\r
+ if (s->bNew) spu.dwNewChannel |= 1<<ch;\r
d->iSBPos = s->iSBPos;\r
+ if ((uint32_t)d->iSBPos >= 28) d->iSBPos = 27;\r
d->spos = s->spos;\r
d->sinc = s->sinc;\r
+ d->sinc_inv = 0;\r
memcpy(d->SB, s->SB, sizeof(d->SB));\r
d->pCurr = (void *)((long)s->iCurr & 0x7fff0);\r
d->pLoop = (void *)((long)s->iLoop & 0x7fff0);\r
d->ADSRX.ReleaseModeExp = s->ADSRX.ReleaseModeExp;\r
d->ADSRX.ReleaseRate = s->ADSRX.ReleaseRate;\r
d->ADSRX.EnvelopeVol = s->ADSRX.EnvelopeVol;\r
- if (s->bOn) dwChannelOn |= 1<<ch;\r
+ if (s->bOn) spu.dwChannelOn |= 1<<ch;\r
else d->ADSRX.EnvelopeVol = 0;\r
}\r
\r
+// force load from regArea to variables\r
+static void load_register(unsigned long reg, unsigned int cycles)\r
+{\r
+ unsigned short *r = &spu.regArea[((reg & 0xfff) - 0xc00) >> 1];\r
+ *r ^= 1;\r
+ SPUwriteRegister(reg, *r ^ 1, cycles);\r
+}\r
+\r
////////////////////////////////////////////////////////////////////////\r
// SPUFREEZE: called by main emu on savestate load/save\r
////////////////////////////////////////////////////////////////////////\r
\r
-long CALLBACK SPUfreeze(uint32_t ulFreezeMode,SPUFreeze_t * pF)\r
+long CALLBACK SPUfreeze(uint32_t ulFreezeMode, SPUFreeze_t * pF,\r
+ uint32_t cycles)\r
{\r
int i;SPUOSSFreeze_t * pFO;\r
\r
\r
if(ulFreezeMode==2) return 1; // info mode? ok, bye\r
// save mode:\r
- memcpy(pF->cSPURam,spuMem,0x80000); // copy common infos\r
- memcpy(pF->cSPUPort,regArea,0x200);\r
+ do_samples(cycles);\r
+\r
+ memcpy(pF->cSPURam,spu.spuMem,0x80000); // copy common infos\r
+ memcpy(pF->cSPUPort,spu.regArea,0x200);\r
\r
- if(xapGlobal && XAPlay!=XAFeed) // some xa\r
+ if(spu.xapGlobal && spu.XAPlay!=spu.XAFeed) // some xa\r
{\r
- pF->xaS=*xapGlobal; \r
+ pF->xaS=*spu.xapGlobal;\r
}\r
else \r
memset(&pF->xaS,0,sizeof(xa_decode_t)); // or clean xa\r
\r
pFO=(SPUOSSFreeze_t *)(pF+1); // store special stuff\r
\r
- pFO->spuIrq=spuIrq;\r
- if(pSpuIrq) pFO->pSpuIrq = (unsigned long)pSpuIrq-(unsigned long)spuMemC;\r
+ pFO->spuIrq = spu.regArea[(H_SPUirqAddr - 0x0c00) / 2];\r
+ if(spu.pSpuIrq) pFO->pSpuIrq = (unsigned long)spu.pSpuIrq-(unsigned long)spu.spuMemC;\r
\r
- pFO->spuAddr=spuAddr;\r
+ pFO->spuAddr=spu.spuAddr;\r
if(pFO->spuAddr==0) pFO->spuAddr=0xbaadf00d;\r
\r
for(i=0;i<MAXCHAN;i++)\r
{\r
save_channel(&pFO->s_chan[i],&s_chan[i],i);\r
if(s_chan[i].pCurr)\r
- pFO->s_chan[i].iCurr=s_chan[i].pCurr-spuMemC;\r
+ pFO->s_chan[i].iCurr=s_chan[i].pCurr-spu.spuMemC;\r
if(s_chan[i].pLoop)\r
- pFO->s_chan[i].iLoop=s_chan[i].pLoop-spuMemC;\r
+ pFO->s_chan[i].iLoop=s_chan[i].pLoop-spu.spuMemC;\r
}\r
\r
return 1;\r
\r
if(ulFreezeMode!=0) return 0; // bad mode? bye\r
\r
- memcpy(spuMem,pF->cSPURam,0x80000); // get ram\r
- memcpy(regArea,pF->cSPUPort,0x200);\r
+ memcpy(spu.spuMem,pF->cSPURam,0x80000); // get ram\r
+ memcpy(spu.regArea,pF->cSPUPort,0x200);\r
\r
if(pF->xaS.nsamples<=4032) // start xa again\r
SPUplayADPCMchannel(&pF->xaS);\r
\r
- xapGlobal=0;\r
+ spu.xapGlobal=0;\r
\r
if(!strcmp(pF->szSPUName,"PBOSS") && pF->ulFreezeVersion==5)\r
LoadStateV5(pF);\r
- else LoadStateUnknown(pF);\r
-\r
- lastch = -1;\r
+ else LoadStateUnknown(pF, cycles);\r
\r
// repair some globals\r
for(i=0;i<=62;i+=2)\r
- SPUwriteRegister(H_Reverb+i,regArea[(H_Reverb+i-0xc00)>>1]);\r
- SPUwriteRegister(H_SPUReverbAddr,regArea[(H_SPUReverbAddr-0xc00)>>1]);\r
- SPUwriteRegister(H_SPUrvolL,regArea[(H_SPUrvolL-0xc00)>>1]);\r
- SPUwriteRegister(H_SPUrvolR,regArea[(H_SPUrvolR-0xc00)>>1]);\r
+ load_register(H_Reverb+i, cycles);\r
+ load_register(H_SPUReverbAddr, cycles);\r
+ load_register(H_SPUrvolL, cycles);\r
+ load_register(H_SPUrvolR, cycles);\r
\r
- SPUwriteRegister(H_SPUctrl,(unsigned short)(regArea[(H_SPUctrl-0xc00)>>1]|0x4000));\r
- SPUwriteRegister(H_SPUstat,regArea[(H_SPUstat-0xc00)>>1]);\r
- SPUwriteRegister(H_CDLeft,regArea[(H_CDLeft-0xc00)>>1]);\r
- SPUwriteRegister(H_CDRight,regArea[(H_CDRight-0xc00)>>1]);\r
+ load_register(H_SPUctrl, cycles);\r
+ load_register(H_SPUstat, cycles);\r
+ load_register(H_CDLeft, cycles);\r
+ load_register(H_CDRight, cycles);\r
\r
// fix to prevent new interpolations from crashing\r
for(i=0;i<MAXCHAN;i++) s_chan[i].SB[28]=0;\r
\r
ClearWorkingState();\r
+ spu.cycles_played = cycles;\r
\r
return 1;\r
}\r
\r
pFO=(SPUOSSFreeze_t *)(pF+1);\r
\r
- spuIrq = pFO->spuIrq;\r
- if(pFO->pSpuIrq) pSpuIrq = spuMemC+((long)pFO->pSpuIrq&0x7fff0); else pSpuIrq=NULL;\r
+ if(pFO->pSpuIrq) spu.pSpuIrq = spu.spuMemC+((long)pFO->pSpuIrq&0x7fff0); else spu.pSpuIrq=NULL;\r
\r
if(pFO->spuAddr)\r
{\r
- spuAddr = pFO->spuAddr;\r
- if (spuAddr == 0xbaadf00d) spuAddr = 0;\r
+ spu.spuAddr = pFO->spuAddr;\r
+ if (spu.spuAddr == 0xbaadf00d) spu.spuAddr = 0;\r
}\r
\r
- dwNewChannel=0;\r
- dwChannelOn=0;\r
- dwChannelDead=0;\r
+ spu.dwNewChannel=0;\r
+ spu.dwChannelOn=0;\r
+ spu.dwChannelDead=0;\r
for(i=0;i<MAXCHAN;i++)\r
{\r
load_channel(&s_chan[i],&pFO->s_chan[i],i);\r
\r
- s_chan[i].pCurr+=(unsigned long)spuMemC;\r
- s_chan[i].pLoop+=(unsigned long)spuMemC;\r
+ s_chan[i].pCurr+=(unsigned long)spu.spuMemC;\r
+ s_chan[i].pLoop+=(unsigned long)spu.spuMemC;\r
}\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r
\r
-void LoadStateUnknown(SPUFreeze_t * pF)\r
+void LoadStateUnknown(SPUFreeze_t * pF, uint32_t cycles)\r
{\r
int i;\r
\r
for(i=0;i<MAXCHAN;i++)\r
{\r
s_chan[i].bStop=0;\r
- s_chan[i].pLoop=spuMemC;\r
+ s_chan[i].pLoop=spu.spuMemC;\r
}\r
\r
- dwNewChannel=0;\r
- dwChannelOn=0;\r
- dwChannelDead=0;\r
- pSpuIrq=0;\r
+ spu.dwNewChannel=0;\r
+ spu.dwChannelOn=0;\r
+ spu.dwChannelDead=0;\r
+ spu.pSpuIrq=0;\r
\r
for(i=0;i<0xc0;i++)\r
{\r
- SPUwriteRegister(0x1f801c00+i*2,regArea[i]);\r
+ load_register(0x1f801c00 + i*2, cycles);\r
}\r
}\r
\r