// WRITE REGISTERS: called by main emu\r
////////////////////////////////////////////////////////////////////////\r
\r
-static const uint32_t ignore_dupe[8] = {\r
+static const uint32_t ignore_dupe[16] = {\r
// ch 0-15 c40 c80 cc0\r
0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f,\r
// ch 16-24 d40 control reverb\r
- 0x7f7f7f7f, 0x7f7f7f7f, 0xff05ff0f, 0xffffffff\r
+ 0x7f7f7f7f, 0x7f7f7f7f, 0xff05ff0f, 0xffffffff,\r
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,\r
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff\r
};\r
\r
void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,\r
unsigned int cycles)\r
{\r
- int r = reg & 0xfff;\r
+ int r = reg & 0xffe;\r
int rofs = (r - 0xc00) >> 1;\r
int changed = spu.regArea[rofs] != val;\r
spu.regArea[rofs] = val;\r
}\r
return;\r
}\r
+ else if (0x0e00 <= r && r < 0x0e60)\r
+ {\r
+ int ch = (r >> 2) & 0x1f;\r
+ log_unhandled("c%02d w %cvol %04x\n", ch, (r & 2) ? 'r' : 'l', val);\r
+ spu.s_chan[ch].iVolume[(r >> 1) & 1] = (signed short)val >> 1;\r
+ }\r
\r
switch(r)\r
{\r
//-------------------------------------------------//\r
case H_SPUaddr:\r
spu.spuAddr = (unsigned long) val<<3;\r
+ //check_irq_io(spu.spuAddr);\r
break;\r
//-------------------------------------------------//\r
case H_SPUdata:\r
*(unsigned short *)(spu.spuMemC + spu.spuAddr) = HTOLE16(val);\r
spu.spuAddr += 2;\r
spu.spuAddr &= 0x7fffe;\r
+ check_irq_io(spu.spuAddr);\r
break;\r
//-------------------------------------------------//\r
case H_SPUctrl:\r
case H_SPUirqAddr:\r
//if (val & 1)\r
// log_unhandled("w irq with lsb: %08lx %04x\n", reg, val);\r
- spu.pSpuIrq=spu.spuMemC+(((unsigned long) val<<3)&~0xf);\r
+ spu.pSpuIrq = spu.spuMemC + (((int)val << 3) & ~0xf);\r
+ //check_irq_io(spu.spuAddr);\r
goto upd_irq;\r
//-------------------------------------------------//\r
case H_SPUrvolL:\r
\r
unsigned short CALLBACK SPUreadRegister(unsigned long reg)\r
{\r
- const unsigned long r=reg&0xfff;\r
+ const unsigned long r = reg & 0xffe;\r
\r
if(r>=0x0c00 && r<0x0d80)\r
{\r
}\r
}\r
}\r
+ else if (0x0e00 <= r && r < 0x0e60)\r
+ {\r
+ int ch = (r >> 2) & 0x1f;\r
+ int v = spu.s_chan[ch].iVolume[(r >> 1) & 1] << 1;\r
+ log_unhandled("c%02d r %cvol %04x\n", ch, (r & 2) ? 'r' : 'l', v);\r
+ return v;\r
+ }\r
\r
switch(r)\r
{\r
case H_SPUaddr:\r
return (unsigned short)(spu.spuAddr>>3);\r
\r
+ // this reportedly doesn't work on real hw\r
case H_SPUdata:\r
{\r
unsigned short s = LE16TOH(*(unsigned short *)(spu.spuMemC + spu.spuAddr));\r
spu.spuAddr += 2;\r
spu.spuAddr &= 0x7fffe;\r
+ //check_irq_io(spu.spuAddr);\r
return s;\r
}\r
\r
\r
vol&=0x3fff;\r
spu.s_chan[ch].iLeftVolume=vol; // store volume\r
+ //spu.regArea[(0xe00-0xc00)/2 + ch*2 + 0] = vol << 1;\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r
vol&=0x3fff;\r
\r
spu.s_chan[ch].iRightVolume=vol;\r
+ //spu.regArea[(0xe00-0xc00)/2 + ch*2 + 1] = vol << 1;\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r