* *\r
***************************************************************************/\r
\r
+#ifndef __P_REGISTERS_H__\r
+#define __P_REGISTERS_H__\r
+\r
#define H_SPUReverbAddr 0x0da2\r
#define H_SPUirqAddr 0x0da4\r
#define H_SPUaddr 0x0da6\r
#define H_SPU_ADSRLevel22 0x0d68\r
#define H_SPU_ADSRLevel23 0x0d78\r
\r
+#define CTRL_CD 0x0001\r
+#define CTRL_CDREVERB 0x0004\r
+#define CTRL_IRQ 0x0040\r
+#define CTRL_REVERB 0x0080\r
+#define CTRL_NOISE 0x3f00\r
+#define CTRL_MUTE 0x4000\r
+#define CTRL_ON 0x8000\r
+\r
+#define STAT_IRQ 0x40\r
+\r
+///////////////////////////////////////////////////////////\r
+\r
+void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val, unsigned int cycles);\r
+\r
+#endif /* __P_REGISTERS_H__ */\r