X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=inline;f=Pico%2FMemory.c;h=828360c95a9929141d82bf09616e857749dc03fa;hb=e5503e2f4fe1c7ccc46c493a1596fb0e416f678e;hp=3157a6333d53152c2233b0b036119906e4e31fc3;hpb=b67ef287e73ed2c8e92a1d8fa53aac7d58998d37;p=picodrive.git diff --git a/Pico/Memory.c b/Pico/Memory.c index 3157a63..828360c 100644 --- a/Pico/Memory.c +++ b/Pico/Memory.c @@ -7,23 +7,26 @@ // For commercial use, separate licencing terms must be obtained. -//#define __debug_io +#define __debug_io #include "PicoInt.h" -#include "sound/sound.h" #include "sound/ym2612.h" #include "sound/sn76496.h" +#ifndef UTYPES_DEFINED typedef unsigned char u8; typedef unsigned short u16; typedef unsigned int u32; +#define UTYPES_DEFINED +#endif extern unsigned int lastSSRamWrite; // used by serial SRAM code #ifdef _ASM_MEMORY_C -u8 PicoRead8(u32 a); -u16 PicoRead16(u32 a); +u32 PicoRead8(u32 a); +u32 PicoRead16(u32 a); +void PicoWrite8(u32 a,u8 d); void PicoWriteRomHW_SSF2(u32 a,u32 d); void PicoWriteRomHW_in1 (u32 a,u32 d); #endif @@ -36,6 +39,12 @@ int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0; extern unsigned int ppop; #endif +#ifdef IO_STATS +void log_io(unsigned int addr, int bits, int rw); +#else +#define log_io(...) +#endif + #if defined(EMU_C68K) || defined(EMU_A68K) static __inline int PicoMemBase(u32 pc) { @@ -69,9 +78,13 @@ static u32 CPU_CALL PicoCheckPc(u32 pc) u32 ret=0; #if defined(EMU_C68K) pc-=PicoCpu.membase; // Get real pc - pc&=0xfffffe; +// pc&=0xfffffe; + pc&=~1; + if ((pc<<8) == 0) + return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off - PicoCpu.membase=PicoMemBase(pc); + PicoCpu.membase=PicoMemBase(pc&0x00ffffff); + PicoCpu.membase-=pc&0xff000000; ret = PicoCpu.membase+pc; #elif defined(EMU_A68K) @@ -84,20 +97,52 @@ static u32 CPU_CALL PicoCheckPc(u32 pc) } -int PicoInitPc(u32 pc) +PICO_INTERNAL int PicoInitPc(u32 pc) { PicoCheckPc(pc); return 0; } #ifndef _ASM_MEMORY_C -void PicoMemReset() +PICO_INTERNAL_ASM void PicoMemReset(void) { } #endif // ----------------------------------------------------------------- +int PadRead(int i) +{ + int pad,value,data_reg; + pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU + data_reg=Pico.ioports[i+1]; + + // orr the bits, which are set as output + value = data_reg&(Pico.ioports[i+4]|0x80); + + if(PicoOpt & 0x20) { // 6 button gamepad enabled + int phase = Pico.m.padTHPhase[i]; + + if(phase == 2 && !(data_reg&0x40)) { // TH + value|=(pad&0xc0)>>2; // ?0SA 0000 + return value; + } else if(phase == 3) { + if(data_reg&0x40) + value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ + else + value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111 + return value; + } + } + + if(data_reg&0x40) // TH + value|=(pad&0x3f); // ?1CB RLDU + else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU + + return value; // will mirror later +} + + #ifndef _ASM_MEMORY_C // address must already be checked static int SRAMRead(u32 a) @@ -192,6 +237,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone()); //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT()); if(a >= SRam.start && a <= SRam.end) { + dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); unsigned int sreg = Pico.m.sram_reg; if(!(sreg & 0x10)) { // not detected SRAM @@ -229,7 +275,9 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) #else // sram access register if(a == 0xA130F1) { - Pico.m.sram_reg = (u8)(d&3); + dprintf("sram reg=%02x", d); + Pico.m.sram_reg &= ~3; + Pico.m.sram_reg |= (u8)(d&3); return; } #endif @@ -259,7 +307,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) // Read Rom and read Ram #ifndef _ASM_MEMORY_C -u8 CPU_CALL PicoRead8(u32 a) +PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a) { u32 d=0; @@ -285,6 +333,7 @@ u8 CPU_CALL PicoRead8(u32 a) #endif if (a>=8; @@ -302,17 +351,17 @@ u8 CPU_CALL PicoRead8(u32 a) dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); #endif #if defined(EMU_C68K) && defined(EMU_M68K) - if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) { + if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { lastread_a = a; lastread_d[lrp_cyc++&15] = (u8)d; } #endif - return (u8)d; + return d; } -u16 CPU_CALL PicoRead16(u32 a) +PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a) { - u16 d=0; + u32 d=0; if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram @@ -321,14 +370,15 @@ u16 CPU_CALL PicoRead16(u32 a) #if !(defined(EMU_C68K) && defined(EMU_M68K)) // sram if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) { - d = (u16) SRAMRead(a); + d = SRAMRead(a); goto end; } #endif if (a=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) { + if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { lastread_a = a; lastread_d[lrp_cyc++&15] = d; } @@ -346,7 +396,7 @@ u16 CPU_CALL PicoRead16(u32 a) return d; } -u32 CPU_CALL PicoRead32(u32 a) +PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a) { u32 d=0; @@ -361,6 +411,7 @@ u32 CPU_CALL PicoRead32(u32 a) } if (a=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) { + if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { lastread_a = a; lastread_d[lrp_cyc++&15] = d; } @@ -381,7 +432,8 @@ u32 CPU_CALL PicoRead32(u32 a) // ----------------------------------------------------------------- // Write Ram -static void CPU_CALL PicoWrite8(u32 a,u8 d) +#ifndef _ASM_MEMORY_C +PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d) { #ifdef __debug_io dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); @@ -392,14 +444,13 @@ static void CPU_CALL PicoWrite8(u32 a,u8 d) //if ((a&0xe0ffff)==0xe0a9ba+0x69c) // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); - - if ((a&0xe00000)==0xe00000) { - if((a&0xffff)==0xf62a) dprintf("(f62a) = %02x [%i|%i] @ %x", d, Pico.m.scanline, SekCyclesDone(), SekPc); - u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram + if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram + log_io(a, 8, 1); a&=0xffffff; OtherWrite8(a,d,8); } +#endif void CPU_CALL PicoWrite16(u32 a,u16 d) { @@ -413,6 +464,7 @@ void CPU_CALL PicoWrite16(u32 a,u16 d) // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc); if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram + log_io(a, 16, 1); a&=0xfffffe; OtherWrite16(a,d); @@ -434,6 +486,7 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d) pm[0]=(u16)(d>>16); pm[1]=(u16)d; return; } + log_io(a, 32, 1); a&=0xfffffe; OtherWrite16(a, (u16)(d>>16)); @@ -442,7 +495,7 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d) // ----------------------------------------------------------------- -void PicoMemSetup() +PICO_INTERNAL void PicoMemSetup(void) { #ifdef EMU_C68K // Setup memory callbacks: @@ -498,39 +551,78 @@ unsigned int m68k_read_pcrelative_CD16(unsigned int a); unsigned int m68k_read_pcrelative_CD32(unsigned int a); // these are allowed to access RAM -unsigned int m68k_read_pcrelative_8 (unsigned int a) { +static unsigned int m68k_read_8 (unsigned int a, int do_fake) { a&=0xffffff; if(PicoMCD&1) return m68k_read_pcrelative_CD8(a); if(a