X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=inline;f=cpu%2Fsh2%2Fcompiler.c;h=2f959d2b89a1dd2b5b5bdf5bd95d926a60da6d6c;hb=f4c0720c249d4d51f13f9cd69e3f149dcdf64a9e;hp=392af29cf6c7ce043c550acd427c914f3e6b0e18;hpb=c25d78eec11d2a22adbd0bc7d42a24e2d79e40e7;p=picodrive.git diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c index 392af29..2f959d2 100644 --- a/cpu/sh2/compiler.c +++ b/cpu/sh2/compiler.c @@ -61,7 +61,7 @@ } #include "mame/sh2dasm.h" -#include +#include static int insns_compiled, hash_collisions, host_insn_count; #define COUNT_OP \ host_insn_count++ @@ -166,9 +166,9 @@ static const int reg_map_g2h[] = { 4, 5, 6, 7, 8, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 9, - -1, -1, -1, 10, - -1, -1, -1, -1, + -1, -1, -1, 9, // r12 .. sp + -1, -1, -1, 10, // SHR_PC, SHR_PPC, SHR_PR, SHR_SR, + -1, -1, -1, -1, // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL, }; static temp_reg_t reg_temp[] = { @@ -983,6 +983,10 @@ static int emit_memhandler_read_(int size, int ram_check) } } rcache_invalidate(); + + if (reg_map_g2h[SHR_SR] != -1) + emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4); + // assuming arg0 and retval reg matches return rcache_get_tmp_arg(0); } @@ -1040,6 +1044,9 @@ static void emit_memhandler_write(int size, u32 pc, int delay) { int ctxr; host_arg2reg(ctxr, 2); + if (reg_map_g2h[SHR_SR] != -1) + emith_ctx_write(reg_map_g2h[SHR_SR], SHR_SR * 4); + switch (size) { case 0: // 8 // XXX: consider inlining sh2_drc_write8 @@ -1065,6 +1072,9 @@ static void emit_memhandler_write(int size, u32 pc, int delay) emith_call(sh2_drc_write32); break; } + + if (reg_map_g2h[SHR_SR] != -1) + emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4); rcache_invalidate(); } @@ -2978,16 +2988,14 @@ void sh2_drc_wcheck_da(unsigned int a, int val, int cpuid) 1 + cpuid, SH2_DRCBLK_DA_SHIFT, 0xfff); } -void sh2_execute(SH2 *sh2c, int cycles) +int sh2_execute(SH2 *sh2c, int cycles) { int ret_cycles; - sh2 = sh2c; // XXX - sh2c->cycles_aim += cycles; - cycles = sh2c->cycles_aim - sh2c->cycles_done; + sh2c->cycles_timeslice = cycles; // cycles are kept in SHR_SR unused bits (upper 20) - // bit19 contains T saved for delay slot + // bit11 contains T saved for delay slot // others are usual SH2 flags sh2c->sr &= 0x3f3; sh2c->sr |= cycles << 12; @@ -2998,7 +3006,7 @@ void sh2_execute(SH2 *sh2c, int cycles) if (ret_cycles > 0) dbg(1, "warning: drc returned with cycles: %d", ret_cycles); - sh2c->cycles_done += cycles - ret_cycles; + return sh2c->cycles_timeslice - ret_cycles; } #if (DRC_DEBUG & 2)