X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=Pico%2FMemory.s;h=88b8c43e118aa0e3d48fb202ff91cd6d58841762;hb=7969166ef66a8623cb4d8c609eb6e67314aefd79;hp=a3f2bdc61f4deaaa5fadc590a162e3e4da893dc3;hpb=e5503e2f4fe1c7ccc46c493a1596fb0e416f678e;p=picodrive.git diff --git a/Pico/Memory.s b/Pico/Memory.s index a3f2bdc..88b8c43 100644 --- a/Pico/Memory.s +++ b/Pico/Memory.s @@ -40,8 +40,8 @@ m_read8_def_table: .long m_read_null @ 0xB80000 - 0xBFFFFF .long m_read8_vdp @ 0xC00000 - 0xC7FFFF .long m_read8_vdp @ 0xC80000 - 0xCFFFFF - .long m_read_null @ 0xD00000 - 0xD7FFFF - .long m_read_null @ 0xD80000 - 0xDFFFFF + .long m_read8_vdp @ 0xD00000 - 0xD7FFFF + .long m_read8_vdp @ 0xD80000 - 0xDFFFFF .long m_read8_ram @ 0xE00000 - 0xE7FFFF .long m_read8_ram @ 0xE80000 - 0xEFFFFF .long m_read8_ram @ 0xF00000 - 0xF7FFFF @@ -73,9 +73,9 @@ m_read16_def_table: .long m_read_null @ 0xB00000 - 0xB7FFFF .long m_read_null @ 0xB80000 - 0xBFFFFF .long m_read16_vdp @ 0xC00000 - 0xC7FFFF - .long m_read_null @ 0xC80000 - 0xCFFFFF - .long m_read_null @ 0xD00000 - 0xD7FFFF - .long m_read_null @ 0xD80000 - 0xDFFFFF + .long m_read16_vdp @ 0xC80000 - 0xCFFFFF + .long m_read16_vdp @ 0xD00000 - 0xD7FFFF + .long m_read16_vdp @ 0xD80000 - 0xDFFFFF .long m_read16_ram @ 0xE00000 - 0xE7FFFF .long m_read16_ram @ 0xE80000 - 0xEFFFFF .long m_read16_ram @ 0xF00000 - 0xF7FFFF @@ -107,9 +107,9 @@ m_read32_def_table: .long m_read_null @ 0xB00000 - 0xB7FFFF .long m_read_null @ 0xB80000 - 0xBFFFFF .long m_read32_vdp @ 0xC00000 - 0xC7FFFF - .long m_read_null @ 0xC80000 - 0xCFFFFF - .long m_read_null @ 0xD00000 - 0xD7FFFF - .long m_read_null @ 0xD80000 - 0xDFFFFF + .long m_read32_vdp @ 0xC80000 - 0xCFFFFF + .long m_read32_vdp @ 0xD00000 - 0xD7FFFF + .long m_read32_vdp @ 0xD80000 - 0xDFFFFF .long m_read32_ram @ 0xE00000 - 0xE7FFFF .long m_read32_ram @ 0xE80000 - 0xEFFFFF .long m_read32_ram @ 0xF00000 - 0xF7FFFF @@ -284,32 +284,14 @@ m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area orr r0, r0, #0x200000 cmp r0, r1 bgt m_read8_nosram - ldr r1, [r2, #4] @ SRam.start (1ci) + ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read8_nosram - ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (1ci) - sub r12,r0, #0x200000 - tst r1, #0x10 - bne m_read8_detected - cmp r12,#1 - ble m_read8_detected - tst r1, #1 - orrne r1, r1, #0x10 - strneb r1, [r3, #0x11] -m_read8_detected: - tst r1, #4 @ EEPROM read? - ldrne r0, =SRAMReadEEPROM @ (1ci if ne) - bxne r0 -m_read8_noteeprom: - tst r1, #1 - beq m_read8_nosram - ldr r3, [r2] @ SRam.data - ldr r2, [r2, #4] @ SRam.start (1ci) - sub r3, r3, r2 - ldrb r0, [r3, r0] - bx lr + ldrb r1, [r3, #0x11] @ Pico.m.sram_reg + tst r1, #5 + bne SRAMRead m_read8_nosram: - ldr r1, [r3, #4] @ 1ci + ldr r1, [r3, #4] @ romsize cmp r0, r1 movgt r0, #0 bxgt lr @ bad location @@ -373,10 +355,9 @@ m_read8_misc_io: ands r0, r0, #0x1e beq m_read8_misc_hwreg cmp r0, #4 - ldrle r2, =PadRead movlt r0, #0 moveq r0, #1 - bxle r2 + ble PadRead ldr r3, =(Pico+0x22000) mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a]) ldrb r0, [r3, r0] @@ -391,15 +372,13 @@ m_read8_misc2: mov r2, #0xa10000 @ games also like to poll busreq, orr r2, r2, #0x001100 @ so we'll try it now cmp r0, r2 - ldreq r2, =z80ReadBusReq - bxeq r2 + beq z80ReadBusReq and r2, r0, #0xff0000 @ finally it might be cmp r2, #0xa00000 @ z80 area bne m_read8_misc3 tst r0, #0x4000 - ldreq r2, =z80Read8 @ z80 RAM - bxeq r2 + beq z80Read8 @ z80 RAM and r2, r0, #0x6000 cmp r2, #0x4000 mvnne r0, #0 @@ -410,12 +389,11 @@ m_read8_misc2: tst r1, #1 beq m_read8_fake_ym2612 tst r1, #0x200 - ldreq r2, =YM2612Read_ - ldrne r2, =YM2612Read_940 + beq YM2612Read_ + b YM2612Read_940 .else - ldr r2, =YM2612Read_ + b YM2612Read_ .endif - bx r2 @ ym2612 m_read8_fake_ym2612: ldr r3, =(Pico+0x22200) @@ -504,22 +482,18 @@ m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95) orr r0, r0, #0x200000 cmp r0, r1 bgt m_read16_nosram - ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (2ci) - tst r1, #1 - beq m_read16_nosram - ldr r1, [r2, #4] @ SRam.start (1ci) + ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read16_nosram - ldr r2, [r2] @ SRam.data (1ci) - sub r2, r2, r1 - ldrh r0, [r2, r0] @ 2ci - and r1, r0, #0xff - mov r0, r0, lsr #8 - orr r0, r0, r1, lsl #8 - bx lr - + ldrb r1, [r3, #0x11] @ Pico.m.sram_reg + tst r1, #5 + beq m_read16_nosram + stmfd sp!,{lr} + bl SRAMRead + orr r0, r0, r0, lsl #8 + ldmfd sp!,{pc} m_read16_nosram: - ldr r1, [r3, #4] @ 1ci + ldr r1, [r3, #4] @ romsize cmp r0, r1 movgt r0, #0 bxgt lr @ bad location @@ -578,7 +552,7 @@ m_read16_misc: b OtherRead16 m_read16_vdp: - tst r0, #0x70000 + tst r0, #0x70000 @ if ((a&0xe700e0)==0xc00000) tsteq r0, #0x000e0 bxne lr @ invalid read bic r0, r0, #1 @@ -636,26 +610,24 @@ m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?) orr r0, r0, #0x200000 cmp r0, r1 bgt m_read32_nosram - ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (2ci) - tst r1, #1 - beq m_read32_nosram - ldr r1, [r2, #4] @ SRam.start (1ci) + ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read32_nosram - ldr r2, [r2] @ SRam.data (1ci) - sub r2, r2, r1 - ldrh r0, [r2, r0]! @ (1ci) - ldrh r1, [r2, #2] - orr r0, r0, r0, lsl #16 - mov r0, r0, ror #8 - mov r0, r0, lsl #16 - orr r0, r0, r1, lsr #8 - and r1, r1, #0xff - orr r0, r0, r1, lsl #8 + ldrb r1, [r3, #0x11] @ Pico.m.sram_reg + tst r1, #5 + beq m_read32_nosram + stmfd sp!,{r0,lr} + bl SRAMRead + ldmfd sp!,{r1,lr} + stmfd sp!,{r0,lr} + add r0, r1, #2 + bl SRAMRead + ldmfd sp!,{r1,lr} + orr r0, r1, r0, lsl #16 + orr r0, r0, r0, lsl #8 bx lr - m_read32_nosram: - ldr r1, [r3, #4] @ (1ci) + ldr r1, [r3, #4] @ romsize cmp r0, r1 movgt r0, #0 bxgt lr @ bad location @@ -917,22 +889,15 @@ m_write8_z80_bank_reg: m_write8_not_z80: and r2, r0, #0xe70000 cmp r2, #0xc00000 @ VDP area? - bne m_write8_misc4 + bne OtherWrite8 @ passthrough and r2, r0, #0xf9 cmp r2, #0x11 - bne m_write8_misc4 + bne OtherWrite8 m_write8_psg: ldr r2, =PicoOpt mov r0, r1 ldr r2, [r2] tst r2, #2 bxeq lr - ldr r2, =SN76496Write - bx r2 - - -m_write8_misc4: - @ passthrough - ldr r2, =OtherWrite8 - bx r2 + b SN76496Write