X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=Pico%2Fcd%2FMemory.c;h=9f619754ffd2a2e65ea6bf336e49977160b4c7fb;hb=39230401af19770c5470a7470f632fa66c8de3fd;hp=c883a76826adfa6fe416de684b8100d3fcfb495b;hpb=8f8fe01e049d9963523928a910eb4f83aac1da54;p=picodrive.git diff --git a/Pico/cd/Memory.c b/Pico/cd/Memory.c index c883a76..9f61975 100644 --- a/Pico/cd/Memory.c +++ b/Pico/cd/Memory.c @@ -18,10 +18,17 @@ typedef unsigned int u32; #define UTYPES_DEFINED #endif +#ifdef _MSC_VER +#define rdprintf +#define wrdprintf +#define r3printf +#else //#define rdprintf dprintf #define rdprintf(...) //#define wrdprintf dprintf #define wrdprintf(...) +#define r3printf(...) +#endif #ifdef EMU_CORE_DEBUG extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16]; @@ -52,7 +59,7 @@ static u32 m68k_reg_read16(u32 a) d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7); // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed) if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; } - //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc); + r3printf(EL_STATUS, "m68k_regs r3: %02x @%06x", (u8)d, SekPc); goto end; case 4: d = Pico_mcd->s68k_regs[4]<<8; @@ -117,7 +124,7 @@ void m68k_reg_write8(u32 a, u32 d) return; case 3: { u32 dold = Pico_mcd->s68k_regs[3]&0x1f; - //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc); + r3printf(EL_STATUS, "m68k_regs w3: %02x @%06x", (u8)d, SekPc); d &= 0xc2; if ((dold>>6) != ((d>>6)&3)) dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3)); @@ -129,10 +136,12 @@ void m68k_reg_write8(u32 a, u32 d) } else { //dold &= ~2; // ?? #if 1 - if ((d & 2) && !(dold & 2)) { + if (d & (d ^ dold) & 2) { // DMNA is being set Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed) d &= ~2; } + else + Pico_mcd->m.state_flags &= ~2; #else if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode #endif @@ -234,7 +243,7 @@ u32 s68k_reg_read16(u32 a) return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state case 2: d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f); - //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k); + r3printf(EL_STATUS, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k); return s68k_poll_detect(a, d); case 6: return CDC_Read_Reg(); @@ -284,10 +293,11 @@ void s68k_reg_write8(u32 a, u32 d) return; // only m68k can change WP case 3: { int dold = Pico_mcd->s68k_regs[3]; - //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k); + r3printf(EL_STATUS, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k); d &= 0x1d; d |= dold&0xc2; - if (d&4) { + if (d&4) + { if ((d ^ dold) & 5) { d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit PicoMemResetCD(d); @@ -297,12 +307,14 @@ void s68k_reg_write8(u32 a, u32 d) PicoMemResetCDdecode(d); #endif if (!(dold & 4)) { - dprintf("wram mode 2M->1M"); + r3printf(EL_STATUS, "wram mode 2M->1M"); wram_2M_to_1M(Pico_mcd->word_ram2M); } - } else { + } + else + { if (dold & 4) { - dprintf("wram mode 1M->2M"); + r3printf(EL_STATUS, "wram mode 1M->2M"); if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k d &= ~3; d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode @@ -314,6 +326,7 @@ void s68k_reg_write8(u32 a, u32 d) d |= dold&1; if (d&1) d &= ~2; // return word RAM to m68k in 2M mode } + Pico_mcd->m.state_flags &= ~2; break; } case 4: @@ -376,11 +389,11 @@ void s68k_reg_write8(u32 a, u32 d) } -#ifndef _ASM_CD_MEMORY_C static u32 OtherRead16End(u32 a, int realsize) { u32 d=0; +#ifndef _ASM_CD_MEMORY_C if ((a&0xffffc0)==0xa12000) { d=m68k_reg_read16(a); goto end; @@ -403,16 +416,20 @@ static u32 OtherRead16End(u32 a, int realsize) d=Pico_mcd->m.bcram_reg; goto end; } +#endif elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc); +#ifndef _ASM_CD_MEMORY_C end: +#endif return d; } static void OtherWrite8End(u32 a, u32 d, int realsize) { +#ifndef _ASM_CD_MEMORY_C if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; } if ((a&0xfe0000)==0x600000) { @@ -427,15 +444,17 @@ static void OtherWrite8End(u32 a, u32 d, int realsize) Pico_mcd->m.bcram_reg=d; return; } +#endif elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc); } +#ifndef _ASM_CD_MEMORY_C #define _CD_MEMORY_C #undef _ASM_MEMORY_C #include "../MemoryCmn.c" #include "cell_map.c" -#endif // !def _ASM_CD_MEMORY_C +#endif // ----------------------------------------------------------------- @@ -490,10 +509,8 @@ u32 PicoReadM68k8(u32 a) case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1: case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1: // VDP - if ((a&0xe700e0)==0xc00000) { - d=PicoVideoRead(a); - if ((a&1)==0) d>>=8; - } + if ((a&0xe700e0)==0xc00000) + d=PicoVideoRead8(a); break; case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1: case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1: @@ -1152,11 +1169,12 @@ static u32 PicoReadS68k32(u32 a) // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff int bank; + u16 *pm; wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k); // if (!(Pico_mcd->s68k_regs[3]&4)) // dprintf("s68k_wram1M FIXME: wrong mode"); bank = (Pico_mcd->s68k_regs[3]&1)^1; - u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1]; + pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1]; wrdprintf("ret = %08x", d); goto end; } @@ -1624,8 +1642,16 @@ void PicoMemResetCD(int r3) } #endif +#ifdef EMU_M68K +static void m68k_mem_setup_cd(void); +#endif + PICO_INTERNAL void PicoMemSetupCD(void) { + // additional handlers for common code + PicoRead16Hook = OtherRead16End; + PicoWrite8Hook = OtherWrite8End; + #ifdef EMU_C68K // Setup m68k memory callbacks: PicoCpuCM68k.checkpc=PicoCheckPcM68k; @@ -1686,6 +1712,9 @@ PICO_INTERNAL void PicoMemSetupCD(void) // PicoMemResetCD() will setup word ram for both } #endif +#ifdef EMU_M68K + m68k_mem_setup_cd(); +#endif // m68k_poll_addr = m68k_poll_cnt = 0; s68k_poll_adclk = s68k_poll_cnt = 0; @@ -1693,27 +1722,27 @@ PICO_INTERNAL void PicoMemSetupCD(void) #ifdef EMU_M68K -unsigned char PicoReadCD8w (unsigned int a) { +static unsigned int PicoReadCD8w (unsigned int a) { return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a); } -unsigned short PicoReadCD16w(unsigned int a) { +static unsigned int PicoReadCD16w(unsigned int a) { return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a); } -unsigned int PicoReadCD32w(unsigned int a) { +static unsigned int PicoReadCD32w(unsigned int a) { return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a); } -void PicoWriteCD8w (unsigned int a, unsigned char d) { +static void PicoWriteCD8w (unsigned int a, unsigned char d) { if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d); } -void PicoWriteCD16w(unsigned int a, unsigned short d) { +static void PicoWriteCD16w(unsigned int a, unsigned short d) { if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d); } -void PicoWriteCD32w(unsigned int a, unsigned int d) { +static void PicoWriteCD32w(unsigned int a, unsigned int d) { if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d); } // these are allowed to access RAM -unsigned int m68k_read_pcrelative_CD8 (unsigned int a) +static unsigned int m68k_read_pcrelative_CD8 (unsigned int a) { a&=0xffffff; if(m68ki_cpu_p == &PicoCpuMS68k) { @@ -1740,7 +1769,7 @@ unsigned int m68k_read_pcrelative_CD8 (unsigned int a) } return 0;//(u8) lastread_d; } -unsigned int m68k_read_pcrelative_CD16(unsigned int a) +static unsigned int m68k_read_pcrelative_CD16(unsigned int a) { a&=0xffffff; if(m68ki_cpu_p == &PicoCpuMS68k) { @@ -1767,7 +1796,7 @@ unsigned int m68k_read_pcrelative_CD16(unsigned int a) } return 0; } -unsigned int m68k_read_pcrelative_CD32(unsigned int a) +static unsigned int m68k_read_pcrelative_CD32(unsigned int a) { u16 *pm; a&=0xffffff; @@ -1797,5 +1826,28 @@ unsigned int m68k_read_pcrelative_CD32(unsigned int a) } return 0; } + +extern unsigned int (*pm68k_read_memory_8) (unsigned int address); +extern unsigned int (*pm68k_read_memory_16)(unsigned int address); +extern unsigned int (*pm68k_read_memory_32)(unsigned int address); +extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value); +extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value); +extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value); +extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address); +extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address); +extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address); + +static void m68k_mem_setup_cd(void) +{ + pm68k_read_memory_8 = PicoReadCD8w; + pm68k_read_memory_16 = PicoReadCD16w; + pm68k_read_memory_32 = PicoReadCD32w; + pm68k_write_memory_8 = PicoWriteCD8w; + pm68k_write_memory_16 = PicoWriteCD16w; + pm68k_write_memory_32 = PicoWriteCD32w; + pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8; + pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16; + pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32; +} #endif // EMU_M68K