X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=61dac47a7b0211bcee6b6f93a24b6417bf99b052;hb=9c45ca93727acdf3053a9fefaa1d5773d219133e;hp=a64cec6f0a2de5dc0f5b41e85823f4e1f7770daf;hpb=1a4301c419a84729d34f8a2f96112097d80f716c;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index a64cec6f..61dac47a 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -122,6 +122,13 @@ struct code_stub u_int e; }; +struct link_entry +{ + void *addr; + u_int target; + u_int ext; +}; + // used by asm: u_char *out; struct ht_entry hash_table[65536] __attribute__((aligned(16))); @@ -174,7 +181,7 @@ struct code_stub static int ccadj[MAXBLOCK]; static int slen; static void *instr_addr[MAXBLOCK]; - static u_int link_addr[MAXBLOCK][3]; + static struct link_entry link_addr[MAXBLOCK]; static int linkcount; static struct code_stub stubs[MAXBLOCK*3]; static int stubcount; @@ -206,7 +213,7 @@ struct code_stub #define CCREG 36 // Cycle count #define INVCP 37 // Pointer to invalid_code //#define MMREG 38 // Pointer to memory_map -#define ROREG 39 // ram offset (if rdram!=0x80000000) +//#define ROREG 39 // ram offset (if rdram!=0x80000000) #define TEMPREG 40 #define FTEMP 40 // FPU temporary register #define PTEMP 41 // Prefetch temporary register @@ -293,9 +300,7 @@ static void add_stub(enum stub_type type, void *addr, void *retaddr, u_int a, uintptr_t b, uintptr_t c, u_int d, u_int e); static void add_stub_r(enum stub_type type, void *addr, void *retaddr, int i, int addr_reg, struct regstat *i_regs, int ccadj, u_int reglist); -static void add_to_linker(int addr,int target,int ext); - -static int tracedebug=0; +static void add_to_linker(void *addr, u_int target, int ext); static void mprotect_w_x(void *start, void *end, int is_x) { @@ -346,8 +351,8 @@ static void end_tcache_write(void *start, void *end) static void *start_block(void) { u_char *end = out + MAX_OUTPUT_BLOCK_SIZE; - if (end > (u_char *)BASE_ADDR + (1< translation_cache + (1<vaddr==vaddr) { - //printf("TRACE: count=%d next=%d (get_addr match %x: %x)\n",Count,next_interupt,vaddr,(int)head->addr); + //printf("TRACE: count=%d next=%d (get_addr match %x: %p)\n",Count,next_interupt,vaddr,head->addr); hash_table_add(hash_table_get(vaddr), vaddr, head->addr); return head->addr; } @@ -425,7 +430,7 @@ void *get_addr(u_int vaddr) head=jump_dirty[vpage]; while(head!=NULL) { if(head->vaddr==vaddr) { - //printf("TRACE: count=%d next=%d (get_addr match dirty %x: %x)\n",Count,next_interupt,vaddr,(int)head->addr); + //printf("TRACE: count=%d next=%d (get_addr match dirty %x: %p)\n",Count,next_interupt,vaddr,head->addr); // Don't restore blocks which are about to expire from the cache if (doesnt_expire_soon(head->addr)) if (verify_dirty(head->addr)) { @@ -892,14 +897,14 @@ void remove_hash(int vaddr) } } -void ll_remove_matching_addrs(struct ll_entry **head,int addr,int shift) +void ll_remove_matching_addrs(struct ll_entry **head,uintptr_t addr,int shift) { struct ll_entry *next; while(*head) { - if(((u_int)((*head)->addr)>>shift)==(addr>>shift) || - ((u_int)((*head)->addr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift)) + if(((uintptr_t)((*head)->addr)>>shift)==(addr>>shift) || + ((uintptr_t)((*head)->addr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift)) { - inv_debug("EXP: Remove pointer to %x (%x)\n",(int)(*head)->addr,(*head)->vaddr); + inv_debug("EXP: Remove pointer to %p (%x)\n",(*head)->addr,(*head)->vaddr); remove_hash((*head)->vaddr); next=(*head)->next; free(*head); @@ -928,15 +933,15 @@ void ll_clear(struct ll_entry **head) } // Dereference the pointers and remove if it matches -static void ll_kill_pointers(struct ll_entry *head,int addr,int shift) +static void ll_kill_pointers(struct ll_entry *head,uintptr_t addr,int shift) { while(head) { - int ptr=get_pointer(head->addr); - inv_debug("EXP: Lookup pointer to %x at %x (%x)\n",(int)ptr,(int)head->addr,head->vaddr); + uintptr_t ptr = (uintptr_t)get_pointer(head->addr); + inv_debug("EXP: Lookup pointer to %lx at %p (%x)\n",(long)ptr,head->addr,head->vaddr); if(((ptr>>shift)==(addr>>shift)) || (((ptr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift))) { - inv_debug("EXP: Kill pointer at %x (%x)\n",(int)head->addr,head->vaddr); + inv_debug("EXP: Kill pointer at %p (%x)\n",head->addr,head->vaddr); void *host_addr=find_extjump_insn(head->addr); #ifdef __arm__ mark_clear_cache(host_addr); @@ -964,7 +969,7 @@ void invalidate_page(u_int page) head=jump_out[page]; jump_out[page]=0; while(head!=NULL) { - inv_debug("INVALIDATE: kill pointer to %x (%x)\n",head->vaddr,(int)head->addr); + inv_debug("INVALIDATE: kill pointer to %x (%p)\n",head->vaddr,head->addr); void *host_addr=find_extjump_insn(head->addr); #ifdef __arm__ mark_clear_cache(host_addr); @@ -1017,7 +1022,7 @@ void invalidate_block(u_int block) while(head!=NULL) { u_int start,end; if(vpage>2047||(head->vaddr>>12)==block) { // Ignore vaddr hash collision - get_bounds((int)head->addr,&start,&end); + get_bounds(head->addr,&start,&end); //printf("start: %x end: %x\n",start,end); if(page<2048&&start>=(u_int)rdram&&end<(u_int)rdram+RAM_SIZE) { if(((start-(u_int)rdram)>>12)<=page&&((end-1-(u_int)rdram)>>12)>=page) { @@ -1054,7 +1059,7 @@ void invalidate_addr(u_int addr) for(;pg1<=page;pg1++) { for(head=jump_dirty[pg1];head!=NULL;head=head->next) { u_int start,end; - get_bounds((int)head->addr,&start,&end); + get_bounds(head->addr,&start,&end); if(ram_offset) { start-=ram_offset; end-=ram_offset; @@ -1110,13 +1115,13 @@ void invalidate_all_pages() void add_link(u_int vaddr,void *src) { u_int page=get_page(vaddr); - inv_debug("add_link: %x -> %x (%d)\n",(int)src,vaddr,page); + inv_debug("add_link: %p -> %x (%d)\n",src,vaddr,page); int *ptr=(int *)(src+4); assert((*ptr&0x0fff0000)==0x059f0000); (void)ptr; ll_add(jump_out+page,vaddr,src); - //int ptr=get_pointer(src); - //inv_debug("add_link: Pointer is to %x\n",(int)ptr); + //void *ptr=get_pointer(src); + //inv_debug("add_link: Pointer is to %p\n",ptr); } // If a code block was found to be unmodified (bit was set in @@ -1134,10 +1139,10 @@ void clean_blocks(u_int page) if (doesnt_expire_soon(head->addr)) { u_int start,end; if(verify_dirty(head->addr)) { - //printf("Possibly Restore %x (%x)\n",head->vaddr, (int)head->addr); + //printf("Possibly Restore %x (%p)\n",head->vaddr, head->addr); u_int i; u_int inv=0; - get_bounds((int)head->addr,&start,&end); + get_bounds(head->addr,&start,&end); if(start-(u_int)rdram>12;i<=(end-1-(u_int)rdram+0x80000000)>>12;i++) { inv|=invalid_code[i]; @@ -1150,7 +1155,7 @@ void clean_blocks(u_int page) void *clean_addr = get_clean_addr(head->addr); if (doesnt_expire_soon(clean_addr)) { u_int ppage=page; - inv_debug("INV: Restored %x (%x/%x)\n",head->vaddr, (int)head->addr, (int)clean_addr); + inv_debug("INV: Restored %x (%p/%p)\n",head->vaddr, head->addr, clean_addr); //printf("page=%x, addr=%x\n",page,head->vaddr); //assert(head->vaddr>>12==(page|0x80000)); ll_add_flags(jump_in+ppage,head->vaddr,head->reg_sv_flags,clean_addr); @@ -1213,44 +1218,19 @@ void shiftimm_alloc(struct regstat *current,int i) if(opcode2[i]>=0x38&&opcode2[i]<=0x3b) // DSLL/DSRL/DSRA { - if(rt1[i]) { - if(rs1[i]) alloc_reg64(current,i,rs1[i]); - alloc_reg64(current,i,rt1[i]); - current->is32&=~(1LL<is32&=~(1LL<is32&=~(1LL<is32|=1LL<is32|=1LL<>31; - sum^=((u_int *)rdram)[i]; - } - return sum; -} -int rchecksum() -{ - int i; - int sum=0; - for(i=0;i<64;i++) - sum^=((u_int *)reg)[i]; - return sum; -} void rlist() { int i; @@ -2479,100 +2439,19 @@ void shiftimm_assemble(int i,struct regstat *i_regs) } if(opcode2[i]>=0x38&&opcode2[i]<=0x3b) // DSLL/DSRL/DSRA { - if(rt1[i]) { - signed char sh,sl,th,tl; - th=get_reg(i_regs->regmap,rt1[i]|64); - tl=get_reg(i_regs->regmap,rt1[i]); - sh=get_reg(i_regs->regmap,rs1[i]|64); - sl=get_reg(i_regs->regmap,rs1[i]); - if(tl>=0) { - if(rs1[i]==0) - { - emit_zeroreg(tl); - if(th>=0) emit_zeroreg(th); - } - else - { - assert(sl>=0); - assert(sh>=0); - if(imm[i]) { - if(opcode2[i]==0x38) // DSLL - { - if(th>=0) emit_shldimm(sh,sl,imm[i],th); - emit_shlimm(sl,imm[i],tl); - } - if(opcode2[i]==0x3a) // DSRL - { - emit_shrdimm(sl,sh,imm[i],tl); - if(th>=0) emit_shrimm(sh,imm[i],th); - } - if(opcode2[i]==0x3b) // DSRA - { - emit_shrdimm(sl,sh,imm[i],tl); - if(th>=0) emit_sarimm(sh,imm[i],th); - } - }else{ - // Shift by zero - if(sl!=tl) emit_mov(sl,tl); - if(th>=0&&sh!=th) emit_mov(sh,th); - } - } - } - } + assert(0); } if(opcode2[i]==0x3c) // DSLL32 { - if(rt1[i]) { - signed char sl,tl,th; - tl=get_reg(i_regs->regmap,rt1[i]); - th=get_reg(i_regs->regmap,rt1[i]|64); - sl=get_reg(i_regs->regmap,rs1[i]); - if(th>=0||tl>=0){ - assert(tl>=0); - assert(th>=0); - assert(sl>=0); - emit_mov(sl,th); - emit_zeroreg(tl); - if(imm[i]>32) - { - emit_shlimm(th,imm[i]&31,th); - } - } - } + assert(0); } if(opcode2[i]==0x3e) // DSRL32 { - if(rt1[i]) { - signed char sh,tl,th; - tl=get_reg(i_regs->regmap,rt1[i]); - th=get_reg(i_regs->regmap,rt1[i]|64); - sh=get_reg(i_regs->regmap,rs1[i]|64); - if(tl>=0){ - assert(sh>=0); - emit_mov(sh,tl); - if(th>=0) emit_zeroreg(th); - if(imm[i]>32) - { - emit_shrimm(tl,imm[i]&31,tl); - } - } - } + assert(0); } if(opcode2[i]==0x3f) // DSRA32 { - if(rt1[i]) { - signed char sh,tl; - tl=get_reg(i_regs->regmap,rt1[i]); - sh=get_reg(i_regs->regmap,rs1[i]|64); - if(tl>=0){ - assert(sh>=0); - emit_mov(sh,tl); - if(imm[i]>32) - { - emit_sarimm(tl,imm[i]&31,tl); - } - } - } + assert(0); } } @@ -2586,7 +2465,7 @@ void shift_assemble(int i,struct regstat *i_regs) void load_assemble(int i,struct regstat *i_regs) { - int s,th,tl,addr,map=-1; + int s,th,tl,addr; int offset; void *jaddr=0; int memtarget=0,c=0; @@ -2607,7 +2486,7 @@ void load_assemble(int i,struct regstat *i_regs) } } //printf("load_assemble: c=%d\n",c); - //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset); + //if(c) printf("load_assemble: const=%lx\n",(long)constmap[i][s]+offset); // FIXME: Even if the load is a NOP, we should check for pagefaults... if((tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80)) ||rt1[i]==0) { @@ -2622,15 +2501,11 @@ void load_assemble(int i,struct regstat *i_regs) //if(tl<0) tl=get_reg(i_regs->regmap,-1); if(tl>=0) { //printf("load_assemble: c=%d\n",c); - //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset); + //if(c) printf("load_assemble: const=%lx\n",(long)constmap[i][s]+offset); assert(tl>=0); // Even if the load is a NOP, we must check for pagefaults and I/O reglist&=~(1<=0) reglist&=~(1<regmap,ROREG); - if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG); - #endif #ifdef R29_HACK // Strmnnrmn's speed hack if(rs1[i]!=29||start<0x80001000||start>=0x80000000+RAM_SIZE) @@ -2647,24 +2522,12 @@ void load_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x20) { // LB if(!c||memtarget) { if(!dummy) { - #ifdef HOST_IMM_ADDR32 - if(c) - emit_movsbl_tlb((constmap[i][s]+offset)^3,map,tl); - else - #endif { - //emit_xorimm(addr,3,tl); - //emit_movsbl_indexed((int)rdram-0x80000000,tl,tl); int x=0,a=tl; -#ifdef BIG_ENDIAN_MIPS - if(!c) emit_xorimm(addr,3,tl); - else x=((constmap[i][s]+offset)^3)-(constmap[i][s]+offset); -#else if(!c) a=addr; -#endif if(fastload_reg_override) a=fastload_reg_override; - emit_movsbl_indexed_tlb(x,a,map,tl); + emit_movsbl_indexed(x,a,tl); } } if(jaddr) @@ -2676,33 +2539,10 @@ void load_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x21) { // LH if(!c||memtarget) { if(!dummy) { - #ifdef HOST_IMM_ADDR32 - if(c) - emit_movswl_tlb((constmap[i][s]+offset)^2,map,tl); - else - #endif - { - int x=0,a=tl; -#ifdef BIG_ENDIAN_MIPS - if(!c) emit_xorimm(addr,2,tl); - else x=((constmap[i][s]+offset)^2)-(constmap[i][s]+offset); -#else - if(!c) a=addr; -#endif - if(fastload_reg_override) a=fastload_reg_override; - //#ifdef - //emit_movswl_indexed_tlb(x,tl,map,tl); - //else - if(map>=0) { - emit_movswl_indexed(x,a,tl); - }else{ - #if 1 //def RAM_OFFSET - emit_movswl_indexed(x,a,tl); - #else - emit_movswl_indexed((int)rdram-0x80000000+x,a,tl); - #endif - } - } + int x=0,a=tl; + if(!c) a=addr; + if(fastload_reg_override) a=fastload_reg_override; + emit_movswl_indexed(x,a,tl); } if(jaddr) add_stub_r(LOADH_STUB,jaddr,out,i,addr,i_regs,ccadj[i],reglist); @@ -2715,13 +2555,7 @@ void load_assemble(int i,struct regstat *i_regs) if(!dummy) { int a=addr; if(fastload_reg_override) a=fastload_reg_override; - //emit_readword_indexed((int)rdram-0x80000000,addr,tl); - #ifdef HOST_IMM_ADDR32 - if(c) - emit_readword_tlb(constmap[i][s]+offset,map,tl); - else - #endif - emit_readword_indexed_tlb(0,a,map,tl); + emit_readword_indexed(0,a,tl); } if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,addr,i_regs,ccadj[i],reglist); @@ -2732,25 +2566,11 @@ void load_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x24) { // LBU if(!c||memtarget) { if(!dummy) { - #ifdef HOST_IMM_ADDR32 - if(c) - emit_movzbl_tlb((constmap[i][s]+offset)^3,map,tl); - else - #endif - { - //emit_xorimm(addr,3,tl); - //emit_movzbl_indexed((int)rdram-0x80000000,tl,tl); - int x=0,a=tl; -#ifdef BIG_ENDIAN_MIPS - if(!c) emit_xorimm(addr,3,tl); - else x=((constmap[i][s]+offset)^3)-(constmap[i][s]+offset); -#else - if(!c) a=addr; -#endif - if(fastload_reg_override) a=fastload_reg_override; + int x=0,a=tl; + if(!c) a=addr; + if(fastload_reg_override) a=fastload_reg_override; - emit_movzbl_indexed_tlb(x,a,map,tl); - } + emit_movzbl_indexed(x,a,tl); } if(jaddr) add_stub_r(LOADBU_STUB,jaddr,out,i,addr,i_regs,ccadj[i],reglist); @@ -2761,33 +2581,10 @@ void load_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x25) { // LHU if(!c||memtarget) { if(!dummy) { - #ifdef HOST_IMM_ADDR32 - if(c) - emit_movzwl_tlb((constmap[i][s]+offset)^2,map,tl); - else - #endif - { - int x=0,a=tl; -#ifdef BIG_ENDIAN_MIPS - if(!c) emit_xorimm(addr,2,tl); - else x=((constmap[i][s]+offset)^2)-(constmap[i][s]+offset); -#else - if(!c) a=addr; -#endif - if(fastload_reg_override) a=fastload_reg_override; - //#ifdef - //emit_movzwl_indexed_tlb(x,tl,map,tl); - //#else - if(map>=0) { - emit_movzwl_indexed(x,a,tl); - }else{ - #if 1 //def RAM_OFFSET - emit_movzwl_indexed(x,a,tl); - #else - emit_movzwl_indexed((int)rdram-0x80000000+x,a,tl); - #endif - } - } + int x=0,a=tl; + if(!c) a=addr; + if(fastload_reg_override) a=fastload_reg_override; + emit_movzwl_indexed(x,a,tl); } if(jaddr) add_stub_r(LOADHU_STUB,jaddr,out,i,addr,i_regs,ccadj[i],reglist); @@ -2801,13 +2598,7 @@ void load_assemble(int i,struct regstat *i_regs) if(!dummy) { int a=addr; if(fastload_reg_override) a=fastload_reg_override; - //emit_readword_indexed((int)rdram-0x80000000,addr,tl); - #ifdef HOST_IMM_ADDR32 - if(c) - emit_readword_tlb(constmap[i][s]+offset,map,tl); - else - #endif - emit_readword_indexed_tlb(0,a,map,tl); + emit_readword_indexed(0,a,tl); } if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,addr,i_regs,ccadj[i],reglist); @@ -2818,24 +2609,7 @@ void load_assemble(int i,struct regstat *i_regs) emit_zeroreg(th); } if (opcode[i]==0x37) { // LD - if(!c||memtarget) { - if(!dummy) { - int a=addr; - if(fastload_reg_override) a=fastload_reg_override; - //if(th>=0) emit_readword_indexed((int)rdram-0x80000000,addr,th); - //emit_readword_indexed((int)rdram-0x7FFFFFFC,addr,tl); - #ifdef HOST_IMM_ADDR32 - if(c) - emit_readdword_tlb(constmap[i][s]+offset,map,th,tl); - else - #endif - emit_readdword_indexed_tlb(0,a,map,th,tl); - } - if(jaddr) - add_stub_r(LOADD_STUB,jaddr,out,i,addr,i_regs,ccadj[i],reglist); - } - else - inline_readstub(LOADD_STUB,i,constmap[i][s]+offset,i_regs->regmap,rt1[i],ccadj[i],reglist); + assert(0); } } } @@ -2850,7 +2624,7 @@ void loadlr_assemble(int i,struct regstat *i_regs) void store_assemble(int i,struct regstat *i_regs) { - int s,th,tl,map=-1; + int s,tl; int addr,temp; int offset; void *jaddr=0; @@ -2859,7 +2633,6 @@ void store_assemble(int i,struct regstat *i_regs) int agr=AGEN1+(i&1); int faststore_reg_override=0; u_int hr,reglist=0; - th=get_reg(i_regs->regmap,rs2[i]|64); tl=get_reg(i_regs->regmap,rs2[i]); s=get_reg(i_regs->regmap,rs1[i]); temp=get_reg(i_regs->regmap,agr); @@ -2890,36 +2663,18 @@ void store_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x28) { // SB if(!c||memtarget) { int x=0,a=temp; -#ifdef BIG_ENDIAN_MIPS - if(!c) emit_xorimm(addr,3,temp); - else x=((constmap[i][s]+offset)^3)-(constmap[i][s]+offset); -#else if(!c) a=addr; -#endif if(faststore_reg_override) a=faststore_reg_override; - //emit_writebyte_indexed(tl,(int)rdram-0x80000000,temp); - emit_writebyte_indexed_tlb(tl,x,a,map,a); + emit_writebyte_indexed(tl,x,a); } type=STOREB_STUB; } if (opcode[i]==0x29) { // SH if(!c||memtarget) { int x=0,a=temp; -#ifdef BIG_ENDIAN_MIPS - if(!c) emit_xorimm(addr,2,temp); - else x=((constmap[i][s]+offset)^2)-(constmap[i][s]+offset); -#else if(!c) a=addr; -#endif if(faststore_reg_override) a=faststore_reg_override; - //#ifdef - //emit_writehword_indexed_tlb(tl,x,temp,map,temp); - //#else - if(map>=0) { - emit_writehword_indexed(tl,x,a); - }else - //emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a); - emit_writehword_indexed(tl,x,a); + emit_writehword_indexed(tl,x,a); } type=STOREH_STUB; } @@ -2927,27 +2682,12 @@ void store_assemble(int i,struct regstat *i_regs) if(!c||memtarget) { int a=addr; if(faststore_reg_override) a=faststore_reg_override; - //emit_writeword_indexed(tl,(int)rdram-0x80000000,addr); - emit_writeword_indexed_tlb(tl,0,a,map,temp); + emit_writeword_indexed(tl,0,a); } type=STOREW_STUB; } if (opcode[i]==0x3F) { // SD - if(!c||memtarget) { - int a=addr; - if(faststore_reg_override) a=faststore_reg_override; - if(rs2[i]) { - assert(th>=0); - //emit_writeword_indexed(th,(int)rdram-0x80000000,addr); - //emit_writeword_indexed(tl,(int)rdram-0x7FFFFFFC,addr); - emit_writedword_indexed_tlb(th,tl,0,a,map,temp); - }else{ - // Store zero - //emit_writeword_indexed(tl,(int)rdram-0x80000000,temp); - //emit_writeword_indexed(tl,(int)rdram-0x7FFFFFFC,temp); - emit_writedword_indexed_tlb(tl,tl,0,a,map,temp); - } - } + assert(0); type=STORED_STUB; } if(jaddr) { @@ -2968,7 +2708,7 @@ void store_assemble(int i,struct regstat *i_regs) assert(ir>=0); emit_cmpmem_indexedsr12_reg(ir,addr,1); #else - emit_cmpmem_indexedsr12_imm((int)invalid_code,addr,1); + emit_cmpmem_indexedsr12_imm(invalid_code,addr,1); #endif #if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT) emit_callne(invalidate_addr_reg[addr]); @@ -2994,7 +2734,7 @@ void store_assemble(int i,struct regstat *i_regs) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); emit_movimm(start+i*4+4,0); - emit_writeword(0,(int)&pcaddr); + emit_writeword(0,&pcaddr); emit_jmp(do_interrupt); } } @@ -3002,9 +2742,8 @@ void store_assemble(int i,struct regstat *i_regs) void storelr_assemble(int i,struct regstat *i_regs) { - int s,th,tl; + int s,tl; int temp; - int temp2=-1; int offset; void *jaddr=0; void *case1, *case2, *case3; @@ -3012,7 +2751,6 @@ void storelr_assemble(int i,struct regstat *i_regs) int memtarget=0,c=0; int agr=AGEN1+(i&1); u_int hr,reglist=0; - th=get_reg(i_regs->regmap,rs2[i]|64); tl=get_reg(i_regs->regmap,rs2[i]); s=get_reg(i_regs->regmap,rs1[i]); temp=get_reg(i_regs->regmap,agr); @@ -3042,22 +2780,13 @@ void storelr_assemble(int i,struct regstat *i_regs) emit_jmp(0); } } - #ifdef RAM_OFFSET - int map=get_reg(i_regs->regmap,ROREG); - if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG); - #else - if((u_int)rdram!=0x80000000) - emit_addimm_no_flags((u_int)rdram-(u_int)0x80000000,temp); - #endif + emit_addimm_no_flags(ram_offset,temp); if (opcode[i]==0x2C||opcode[i]==0x2D) { // SDL/SDR - temp2=get_reg(i_regs->regmap,FTEMP); - if(!rs2[i]) temp2=th=tl; + assert(0); } -#ifndef BIG_ENDIAN_MIPS - emit_xorimm(temp,3,temp); -#endif + emit_xorimm(temp,3,temp); emit_testimm(temp,2); case2=out; emit_jne(0); @@ -3072,12 +2801,10 @@ void storelr_assemble(int i,struct regstat *i_regs) emit_writebyte_indexed(tl,3,temp); } if (opcode[i]==0x2C) { // SDL - emit_writeword_indexed(th,0,temp); - if(rs2[i]) emit_mov(tl,temp2); + assert(0); } if (opcode[i]==0x2D) { // SDR - emit_writebyte_indexed(tl,3,temp); - if(rs2[i]) emit_shldimm(th,tl,24,temp2); + assert(0); } done0=out; emit_jmp(0); @@ -3096,18 +2823,10 @@ void storelr_assemble(int i,struct regstat *i_regs) emit_writehword_indexed(tl,1,temp); } if (opcode[i]==0x2C) { // SDL - if(rs2[i]) emit_shrdimm(tl,th,8,temp2); - // Write 3 msb into three least significant bytes - if(rs2[i]) emit_rorimm(th,8,th); - emit_writehword_indexed(th,-1,temp); - if(rs2[i]) emit_rorimm(th,16,th); - emit_writebyte_indexed(th,1,temp); - if(rs2[i]) emit_rorimm(th,8,th); + assert(0); } if (opcode[i]==0x2D) { // SDR - if(rs2[i]) emit_shldimm(th,tl,16,temp2); - // Write two lsb into two most significant bytes - emit_writehword_indexed(tl,1,temp); + assert(0); } done1=out; emit_jmp(0); @@ -3130,19 +2849,10 @@ void storelr_assemble(int i,struct regstat *i_regs) if(rs2[i]) emit_rorimm(tl,24,tl); } if (opcode[i]==0x2C) { // SDL - if(rs2[i]) emit_shrdimm(tl,th,16,temp2); - // Write two msb into two least significant bytes - if(rs2[i]) emit_rorimm(th,16,th); - emit_writehword_indexed(th,-2,temp); - if(rs2[i]) emit_rorimm(th,16,th); + assert(0); } if (opcode[i]==0x2D) { // SDR - if(rs2[i]) emit_shldimm(th,tl,8,temp2); - // Write 3 lsb into three most significant bytes - emit_writebyte_indexed(tl,-1,temp); - if(rs2[i]) emit_rorimm(tl,8,tl); - emit_writehword_indexed(tl,0,temp); - if(rs2[i]) emit_rorimm(tl,24,tl); + assert(0); } done2=out; emit_jmp(0); @@ -3159,52 +2869,30 @@ void storelr_assemble(int i,struct regstat *i_regs) emit_writeword_indexed(tl,-3,temp); } if (opcode[i]==0x2C) { // SDL - if(rs2[i]) emit_shrdimm(tl,th,24,temp2); - // Write msb into least significant byte - if(rs2[i]) emit_rorimm(th,24,th); - emit_writebyte_indexed(th,-3,temp); - if(rs2[i]) emit_rorimm(th,8,th); + assert(0); } if (opcode[i]==0x2D) { // SDR - if(rs2[i]) emit_mov(th,temp2); - // Write entire word - emit_writeword_indexed(tl,-3,temp); + assert(0); } set_jump_target(done0, out); set_jump_target(done1, out); set_jump_target(done2, out); if (opcode[i]==0x2C) { // SDL - emit_testimm(temp,4); - done0=out; - emit_jne(0); - emit_andimm(temp,~3,temp); - emit_writeword_indexed(temp2,4,temp); - set_jump_target(done0, out); + assert(0); } if (opcode[i]==0x2D) { // SDR - emit_testimm(temp,4); - done0=out; - emit_jeq(0); - emit_andimm(temp,~3,temp); - emit_writeword_indexed(temp2,-4,temp); - set_jump_target(done0, out); + assert(0); } if(!c||!memtarget) add_stub_r(STORELR_STUB,jaddr,out,i,temp,i_regs,ccadj[i],reglist); if(!(i_regs->waswritten&(1<regmap,ROREG); - if(map<0) map=HOST_TEMPREG; - gen_orig_addr_w(temp,map); - #else - emit_addimm_no_flags((u_int)0x80000000-(u_int)rdram,temp); - #endif + emit_addimm_no_flags(-ram_offset,temp); #if defined(HOST_IMM8) int ir=get_reg(i_regs->regmap,INVCP); assert(ir>=0); emit_cmpmem_indexedsr12_reg(ir,temp,1); #else - emit_cmpmem_indexedsr12_imm((int)invalid_code,temp,1); + emit_cmpmem_indexedsr12_imm(invalid_code,temp,1); #endif #if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT) emit_callne(invalidate_addr_reg[temp]); @@ -3278,10 +2966,6 @@ void c2ls_assemble(int i,struct regstat *i_regs) fastio_reg_override=HOST_TEMPREG; } if (opcode[i]==0x32) { // LWC2 - #ifdef HOST_IMM_ADDR32 - if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl); - else - #endif int a=ar; if(fastio_reg_override) a=fastio_reg_override; emit_readword_indexed(0,a,tl); @@ -3304,7 +2988,7 @@ void c2ls_assemble(int i,struct regstat *i_regs) assert(ir>=0); emit_cmpmem_indexedsr12_reg(ir,ar,1); #else - emit_cmpmem_indexedsr12_imm((int)invalid_code,ar,1); + emit_cmpmem_indexedsr12_imm(invalid_code,ar,1); #endif #if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT) emit_callne(invalidate_addr_reg[ar]); @@ -3386,9 +3070,9 @@ void hlecall_assemble(int i,struct regstat *i_regs) emit_movimm(start+i*4+4,0); // Get PC uint32_t hleCode = source[i] & 0x03ffffff; if (hleCode >= ARRAY_SIZE(psxHLEt)) - emit_movimm((int)psxNULL,1); + emit_movimm((uintptr_t)psxNULL,1); else - emit_movimm((int)psxHLEt[hleCode],1); + emit_movimm((uintptr_t)psxHLEt[hleCode],1); emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // XXX emit_jmp(jump_hlecall); } @@ -3662,9 +3346,6 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[]) }else if (opcode[i]==0x1a||opcode[i]==0x1b) { emit_movimm((constmap[i][rs]+offset)&0xFFFFFFF8,ra); // LDL/LDR }else{ - #ifdef HOST_IMM_ADDR32 - if((itype[i]!=LOAD&&(opcode[i]&0x3b)!=0x31&&(opcode[i]&0x3b)!=0x32)) // LWC1/LDC1/LWC2/LDC2 - #endif emit_movimm(constmap[i][rs]+offset,ra); regs[i].loadedconst|=1<>reg)&1); @@ -4211,11 +3889,11 @@ static void drc_dbg_emit_do_cmp(int i) if(regs[i].regmap[hr]>=0) reglist|=1<>2].regmap_entry); else if(itype[i]==RJUMP) { if(get_reg(branch_regs[i].regmap,RTEMP)>=0) - emit_readword((int)&pcaddr,get_reg(branch_regs[i].regmap,RTEMP)); + emit_readword(&pcaddr,get_reg(branch_regs[i].regmap,RTEMP)); else emit_loadreg(rs1[i],get_reg(branch_regs[i].regmap,rs1[i])); } @@ -4594,11 +4272,12 @@ static void do_ccstub(int n) emit_jmp(stubs[n].retaddr); } -static void add_to_linker(int addr,int target,int ext) +static void add_to_linker(void *addr, u_int target, int ext) { - link_addr[linkcount][0]=addr; - link_addr[linkcount][1]=target; - link_addr[linkcount][2]=ext; + assert(linkcount < ARRAY_SIZE(link_addr)); + link_addr[linkcount].addr = addr; + link_addr[linkcount].target = target; + link_addr[linkcount].ext = ext; linkcount++; } @@ -4626,7 +4305,7 @@ static void ujump_assemble_write_ra(int i) #ifdef REG_PREFETCH if(temp>=0) { - if(i_regmap[temp]!=PTEMP) emit_movimm((int)hash_table_get(return_address),temp); + if(i_regmap[temp]!=PTEMP) emit_movimm((uintptr_t)hash_table_get(return_address),temp); } #endif emit_movimm(return_address,rt); // PC into link register @@ -4649,7 +4328,7 @@ void ujump_assemble(int i,struct regstat *i_regs) signed char *i_regmap=i_regs->regmap; int return_address=start+i*4+8; if(get_reg(branch_regs[i].regmap,31)>0) - if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table_get(return_address),temp); + if(i_regmap[temp]==PTEMP) emit_movimm((uintptr_t)hash_table_get(return_address),temp); } #endif if(rt1[i]==31&&(rt1[i]==rs1[i+1]||rt1[i]==rs2[i+1])) { @@ -4684,7 +4363,7 @@ void ujump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal_branch(branch_regs[i].is32,ba[i])); + add_to_linker(out,ba[i],internal_branch(branch_regs[i].is32,ba[i])); emit_jmp(0); } } @@ -4701,7 +4380,7 @@ static void rjump_assemble_write_ra(int i) #ifdef REG_PREFETCH if(temp>=0) { - if(i_regmap[temp]!=PTEMP) emit_movimm((int)hash_table_get(return_address),temp); + if(i_regmap[temp]!=PTEMP) emit_movimm((uintptr_t)hash_table_get(return_address),temp); } #endif emit_movimm(return_address,rt); // PC into link register @@ -4732,7 +4411,7 @@ void rjump_assemble(int i,struct regstat *i_regs) if((temp=get_reg(branch_regs[i].regmap,PTEMP))>=0) { signed char *i_regmap=i_regs->regmap; int return_address=start+i*4+8; - if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table_get(return_address),temp); + if(i_regmap[temp]==PTEMP) emit_movimm((uintptr_t)hash_table_get(return_address),temp); } } #endif @@ -4900,7 +4579,7 @@ void cjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK @@ -4926,24 +4605,24 @@ void cjump_assemble(int i,struct regstat *i_regs) if(s2h>=0) emit_cmp(s1h,s2h); else emit_test(s1h,s1h); nottaken1=out; - emit_jne(1); + emit_jne((void *)1l); } if(opcode[i]==5) // BNE { if(s2h>=0) emit_cmp(s1h,s2h); else emit_test(s1h,s1h); if(invert) taken=out; - else add_to_linker((int)out,ba[i],internal); + else add_to_linker(out,ba[i],internal); emit_jne(0); } if(opcode[i]==6) // BLEZ { emit_test(s1h,s1h); if(invert) taken=out; - else add_to_linker((int)out,ba[i],internal); + else add_to_linker(out,ba[i],internal); emit_js(0); nottaken1=out; - emit_jne(1); + emit_jne((void *)1l); } if(opcode[i]==7) // BGTZ { @@ -4951,7 +4630,7 @@ void cjump_assemble(int i,struct regstat *i_regs) nottaken1=out; emit_js(1); if(invert) taken=out; - else add_to_linker((int)out,ba[i],internal); + else add_to_linker(out,ba[i],internal); emit_jne(0); } } // if(!only32) @@ -4964,9 +4643,9 @@ void cjump_assemble(int i,struct regstat *i_regs) else emit_test(s1l,s1l); if(invert){ nottaken=out; - emit_jne(1); + emit_jne((void *)1l); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jeq(0); } } @@ -4978,7 +4657,7 @@ void cjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_jeq(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jne(0); } } @@ -4989,7 +4668,7 @@ void cjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_jge(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jl(0); } } @@ -5000,7 +4679,7 @@ void cjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_jl(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jge(0); } } @@ -5010,10 +4689,10 @@ void cjump_assemble(int i,struct regstat *i_regs) if(match&&(!internal||!is_ds[(ba[i]-start)>>2])) { if(adj) { emit_addimm(cc,-CLOCK_ADJUST(adj),cc); - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); }else{ emit_addnop(13); - add_to_linker((int)out,ba[i],internal*2); + add_to_linker(out,ba[i],internal*2); } emit_jmp(0); }else @@ -5030,7 +4709,7 @@ void cjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } } @@ -5059,14 +4738,14 @@ void cjump_assemble(int i,struct regstat *i_regs) if(s2h>=0) emit_cmp(s1h,s2h); else emit_test(s1h,s1h); nottaken1=out; - emit_jne(2); + emit_jne((void *)2l); } if((opcode[i]&0x2f)==5) // BNE { if(s2h>=0) emit_cmp(s1h,s2h); else emit_test(s1h,s1h); taken=out; - emit_jne(1); + emit_jne((void *)1l); } if((opcode[i]&0x2f)==6) // BLEZ { @@ -5074,7 +4753,7 @@ void cjump_assemble(int i,struct regstat *i_regs) taken=out; emit_js(1); nottaken1=out; - emit_jne(2); + emit_jne((void *)2l); } if((opcode[i]&0x2f)==7) // BGTZ { @@ -5082,7 +4761,7 @@ void cjump_assemble(int i,struct regstat *i_regs) nottaken1=out; emit_js(2); taken=out; - emit_jne(1); + emit_jne((void *)1l); } } // if(!only32) @@ -5093,7 +4772,7 @@ void cjump_assemble(int i,struct regstat *i_regs) if(s2l>=0) emit_cmp(s1l,s2l); else emit_test(s1l,s1l); nottaken=out; - emit_jne(2); + emit_jne((void *)2l); } if((opcode[i]&0x2f)==5) // BNE { @@ -5153,7 +4832,7 @@ void cjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } } @@ -5285,7 +4964,7 @@ void sjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK @@ -5313,7 +4992,7 @@ void sjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_jns(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_js(0); } } @@ -5324,7 +5003,7 @@ void sjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_js(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jns(0); } } @@ -5339,7 +5018,7 @@ void sjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_jns(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_js(0); } } @@ -5350,7 +5029,7 @@ void sjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_js(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jns(0); } } @@ -5361,10 +5040,10 @@ void sjump_assemble(int i,struct regstat *i_regs) if(match&&(!internal||!is_ds[(ba[i]-start)>>2])) { if(adj) { emit_addimm(cc,-CLOCK_ADJUST(adj),cc); - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); }else{ emit_addnop(13); - add_to_linker((int)out,ba[i],internal*2); + add_to_linker(out,ba[i],internal*2); } emit_jmp(0); }else @@ -5381,7 +5060,7 @@ void sjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } } @@ -5482,7 +5161,7 @@ void sjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } } @@ -5588,16 +5267,16 @@ void fjump_assemble(int i,struct regstat *i_regs) nottaken=out; emit_jeq(1); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jne(0); } } else // BC1F if(invert){ nottaken=out; - emit_jne(1); + emit_jne((void *)1l); }else{ - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jeq(0); } { @@ -5619,7 +5298,7 @@ void fjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } set_jump_target(nottaken, out); @@ -5648,7 +5327,7 @@ void fjump_assemble(int i,struct regstat *i_regs) else // BC1F { nottaken=out; - emit_jne(1); + emit_jne((void *)1l); } } } // if(!unconditional) @@ -5688,7 +5367,7 @@ void fjump_assemble(int i,struct regstat *i_regs) ds_assemble_entry(i); } else { - add_to_linker((int)out,ba[i],internal); + add_to_linker(out,ba[i],internal); emit_jmp(0); } @@ -5966,7 +5645,7 @@ static void pagespan_assemble(int i,struct regstat *i_regs) int target_addr=start+i*4+5; void *stub=out; void *compiled_target_addr=check_addr(target_addr); - emit_extjump_ds((int)branch_addr,target_addr); + emit_extjump_ds(branch_addr, target_addr); if(compiled_target_addr) { set_jump_target(branch_addr, compiled_target_addr); add_link(target_addr,stub); @@ -5981,7 +5660,7 @@ static void pagespan_assemble(int i,struct regstat *i_regs) int target_addr=start+i*4+8; void *stub=out; void *compiled_target_addr=check_addr(target_addr); - emit_extjump_ds((int)branch_addr,target_addr); + emit_extjump_ds(branch_addr, target_addr); if(compiled_target_addr) { set_jump_target(branch_addr, compiled_target_addr); add_link(target_addr,stub); @@ -6004,7 +5683,7 @@ static void pagespan_ds() if(regs[0].regmap[HOST_CCREG]!=CCREG) wb_register(CCREG,regs[0].regmap_entry,regs[0].wasdirty,regs[0].was32); if(regs[0].regmap[HOST_BTREG]!=BTREG) - emit_writeword(HOST_BTREG,(int)&branch_target); + emit_writeword(HOST_BTREG,&branch_target); load_regs(regs[0].regmap_entry,regs[0].regmap,regs[0].was32,rs1[0],rs2[0]); address_generation(0,®s[0],regs[0].regmap_entry); if(itype[0]==STORE||itype[0]==STORELR||(opcode[0]&0x3b)==0x39||(opcode[0]&0x3b)==0x3a) @@ -6064,7 +5743,7 @@ static void pagespan_ds() int btaddr=get_reg(regs[0].regmap,BTREG); if(btaddr<0) { btaddr=get_reg(regs[0].regmap,-1); - emit_readword((int)&branch_target,btaddr); + emit_readword(&branch_target,btaddr); } assert(btaddr!=HOST_CCREG); if(regs[0].regmap[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG); @@ -6916,7 +6595,7 @@ static int new_dynarec_test(void) SysPrintf("test passed.\n"); else SysPrintf("test failed: %08x\n", ret); - out=(u_char *)BASE_ADDR; + out = translation_cache; return ret == DRC_TEST_VAL; } @@ -6925,7 +6604,7 @@ static int new_dynarec_test(void) void new_dynarec_clear_full() { int n; - out=(u_char *)BASE_ADDR; + out = translation_cache; memset(invalid_code,1,sizeof(invalid_code)); memset(hash_table,0xff,sizeof(hash_table)); memset(mini_ht,-1,sizeof(mini_ht)); @@ -6950,7 +6629,7 @@ void new_dynarec_init() // allocate/prepare a buffer for translation cache // see assem_arm.h for some explanation #if defined(BASE_ADDR_FIXED) - if (mmap (translation_cache, 1 << TARGET_SIZE_2, + if (mmap(translation_cache, 1 << TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0) != translation_cache) { @@ -6978,11 +6657,11 @@ void new_dynarec_init() #else #ifndef NO_WRITE_EXEC // not all systems allow execute in data segment by default - if (mprotect((void *)BASE_ADDR, 1< %p\n", addr, out); //printf("TRACE: count=%d next=%d (compile %x)\n",Count,next_interupt,addr); //if(debug) - //printf("TRACE: count=%d next=%d (checksum %x)\n",Count,next_interupt,mchecksum()); //printf("fpu mapping=%x enabled=%x\n",(Status & 0x04000000)>>26,(Status & 0x20000000)>>29); // this is just for speculation @@ -7169,7 +6847,7 @@ int new_recompile_block(int addr) invalid_code[start>>12]=0; emit_movimm(start,0); - emit_writeword(0,(int)&pcaddr); + emit_writeword(0,&pcaddr); emit_jmp(new_dyna_leave); literal_pool(0); end_block(beginning); @@ -8056,9 +7734,7 @@ int new_recompile_block(int addr) #ifdef USE_MINI_HT if(rs1[i]==31) { // JALR alloc_reg(¤t,i,RHASH); - #ifndef HOST_IMM_ADDR32 alloc_reg(¤t,i,RHTBL); - #endif } #endif delayslot_alloc(¤t,i+1); @@ -8453,9 +8129,7 @@ int new_recompile_block(int addr) #ifdef USE_MINI_HT if(rs1[i-1]==31) { // JALR alloc_reg(&branch_regs[i-1],i-1,RHASH); - #ifndef HOST_IMM_ADDR32 alloc_reg(&branch_regs[i-1],i-1,RHTBL); - #endif } #endif memcpy(&branch_regs[i-1].regmap_entry,&branch_regs[i-1].regmap,sizeof(current.regmap)); @@ -9366,186 +9040,6 @@ int new_recompile_block(int addr) } } - // Cache memory offset or tlb map pointer if a register is available - #ifndef HOST_IMM_ADDR32 - #ifndef RAM_OFFSET - if(0) - #endif - { - int earliest_available[HOST_REGS]; - int loop_start[HOST_REGS]; - int score[HOST_REGS]; - int end[HOST_REGS]; - int reg=ROREG; - - // Init - for(hr=0;hr=0) { - score[hr]=0;earliest_available[hr]=i+1; - loop_start[hr]=MAXBLOCK; - } - if(itype[i]==UJUMP||itype[i]==RJUMP||itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP) { - if(branch_regs[i].regmap[hr]>=0) { - score[hr]=0;earliest_available[hr]=i+2; - loop_start[hr]=MAXBLOCK; - } - } - } - // No register allocations after unconditional jumps - if(itype[i]==UJUMP||itype[i]==RJUMP||(source[i]>>16)==0x1000) - { - for(hr=0;hr=0) break; - if(itype[j]==UJUMP||itype[j]==RJUMP||itype[j]==CJUMP||itype[j]==SJUMP||itype[j]==FJUMP) { - if(branch_regs[j].regmap[hr]>=0) break; - if(ooo[j]) { - if(count_free_regs(regs[j].regmap)<=minimum_free_regs[j+1]) break; - }else{ - if(count_free_regs(branch_regs[j].regmap)<=minimum_free_regs[j+1]) break; - } - } - else if(count_free_regs(regs[j].regmap)<=minimum_free_regs[j]) break; - if(itype[j]==UJUMP||itype[j]==RJUMP||itype[j]==CJUMP||itype[j]==SJUMP||itype[j]==FJUMP) { - int t=(ba[j]-start)>>2; - if(t=earliest_available[hr]) { - if(t==1||(t>1&&itype[t-2]!=UJUMP&&itype[t-2]!=RJUMP)||(t>1&&rt1[t-2]!=31)) { // call/ret assumes no registers allocated - // Score a point for hoisting loop invariant - if(t>16)==0x1000) - { - // Stop on unconditional branch - break; - } - else - if(itype[j]==LOAD||itype[j]==LOADLR|| - itype[j]==STORE||itype[j]==STORELR||itype[j]==C1LS) { - score[hr]++; - end[hr]=j; - } - } - } - } - // Find highest score and allocate that register - int maxscore=0; - for(hr=0;hrscore[maxscore]) { - maxscore=hr; - //printf("highest score: %d %d (%x->%x)\n",score[hr],hr,start+i*4,start+end[hr]*4); - } - } - } - if(score[maxscore]>1) - { - if(i=0) {printf("oops: %x %x was %d=%d\n",loop_start[maxscore]*4+start,j*4+start,maxscore,regs[j].regmap[maxscore]);} - assert(regs[j].regmap[maxscore]<0); - if(j>loop_start[maxscore]) regs[j].regmap_entry[maxscore]=reg; - regs[j].regmap[maxscore]=reg; - regs[j].dirty&=~(1<>16)!=0x1000) { - regmap_pre[j+2][maxscore]=reg; - regs[j+2].wasdirty&=~(1<>2; - if(t==loop_start[maxscore]) { - if(t==1||(t>1&&itype[t-2]!=UJUMP&&itype[t-2]!=RJUMP)||(t>1&&rt1[t-2]!=31)) // call/ret assumes no registers allocated - regs[t].regmap_entry[maxscore]=reg; - } - } - else - { - if(j<1||(itype[j-1]!=RJUMP&&itype[j-1]!=UJUMP&&itype[j-1]!=CJUMP&&itype[j-1]!=SJUMP&&itype[j-1]!=FJUMP)) { - regmap_pre[j+1][maxscore]=reg; - regs[j+1].wasdirty&=~(1<>1)&1) printf("ecx=%x ",(int)constmap[i][1]); - if((regs[i].isconst>>2)&1) printf("edx=%x ",(int)constmap[i][2]); - if((regs[i].isconst>>3)&1) printf("ebx=%x ",(int)constmap[i][3]); - if((regs[i].isconst>>5)&1) printf("ebp=%x ",(int)constmap[i][5]); - if((regs[i].isconst>>6)&1) printf("esi=%x ",(int)constmap[i][6]); - if((regs[i].isconst>>7)&1) printf("edi=%x ",(int)constmap[i][7]); + if(regs[i].isconst&1) printf("eax=%x ",(u_int)constmap[i][0]); + if((regs[i].isconst>>1)&1) printf("ecx=%x ",(u_int)constmap[i][1]); + if((regs[i].isconst>>2)&1) printf("edx=%x ",(u_int)constmap[i][2]); + if((regs[i].isconst>>3)&1) printf("ebx=%x ",(u_int)constmap[i][3]); + if((regs[i].isconst>>5)&1) printf("ebp=%x ",(u_int)constmap[i][5]); + if((regs[i].isconst>>6)&1) printf("esi=%x ",(u_int)constmap[i][6]); + if((regs[i].isconst>>7)&1) printf("edi=%x ",(u_int)constmap[i][7]); #endif #ifdef __arm__ - if(regs[i].isconst&1) printf("r0=%x ",(int)constmap[i][0]); - if((regs[i].isconst>>1)&1) printf("r1=%x ",(int)constmap[i][1]); - if((regs[i].isconst>>2)&1) printf("r2=%x ",(int)constmap[i][2]); - if((regs[i].isconst>>3)&1) printf("r3=%x ",(int)constmap[i][3]); - if((regs[i].isconst>>4)&1) printf("r4=%x ",(int)constmap[i][4]); - if((regs[i].isconst>>5)&1) printf("r5=%x ",(int)constmap[i][5]); - if((regs[i].isconst>>6)&1) printf("r6=%x ",(int)constmap[i][6]); - if((regs[i].isconst>>7)&1) printf("r7=%x ",(int)constmap[i][7]); - if((regs[i].isconst>>8)&1) printf("r8=%x ",(int)constmap[i][8]); - if((regs[i].isconst>>9)&1) printf("r9=%x ",(int)constmap[i][9]); - if((regs[i].isconst>>10)&1) printf("r10=%x ",(int)constmap[i][10]); - if((regs[i].isconst>>12)&1) printf("r12=%x ",(int)constmap[i][12]); + int r; + for (r = 0; r < ARRAY_SIZE(constmap[i]); r++) + if ((regs[i].isconst >> r) & 1) + printf(" r%d=%x", r, (u_int)constmap[i][r]); #endif printf("\n"); } @@ -9888,11 +9374,11 @@ int new_recompile_block(int addr) emit_movimm(start,0); // abuse io address var as a flag that we // have already returned here once - emit_readword((int)&address,1); - emit_writeword(0,(int)&pcaddr); - emit_writeword(0,(int)&address); + emit_readword(&address,1); + emit_writeword(0,&pcaddr); + emit_writeword(0,&address); emit_cmp(0,1); - emit_jne((int)new_dyna_leave); + emit_jne(new_dyna_leave); } for(i=0;i %8x\n",link_addr[i][0],link_addr[i][1]); + assem_debug("%p -> %8x\n",link_addr[i].addr,link_addr[i].target); literal_pool(64); - if(!link_addr[i][2]) + if (!link_addr[i].ext) { - void *stub=out; - void *addr=check_addr(link_addr[i][1]); - emit_extjump(link_addr[i][0],link_addr[i][1]); - if(addr) { - set_jump_target(link_addr[i][0], addr); - add_link(link_addr[i][1],stub); + void *stub = out; + void *addr = check_addr(link_addr[i].target); + emit_extjump(link_addr[i].addr, link_addr[i].target); + if (addr) { + set_jump_target(link_addr[i].addr, addr); + add_link(link_addr[i].target,stub); } - else set_jump_target(link_addr[i][0], stub); + else + set_jump_target(link_addr[i].addr, stub); } else { // Internal branch - int target=(link_addr[i][1]-start)>>2; + int target=(link_addr[i].target-start)>>2; assert(target>=0&&target>1); + //set_jump_target_fillslot(link_addr[i].addr,instr_addr[target],link_addr[i].ext>>1); //#else - set_jump_target(link_addr[i][0],instr_addr[target]); + set_jump_target(link_addr[i].addr, instr_addr[target]); //#endif } } @@ -10165,7 +9652,7 @@ int new_recompile_block(int addr) if(((u_int)out)&7) emit_addnop(13); #endif assert((u_int)out-(u_int)beginning(u_int)BASE_ADDR+(1< translation_cache+(1<>12;i<=(start+slen*4)>>12;i++) { @@ -10190,11 +9678,11 @@ int new_recompile_block(int addr) /* Pass 10 - Free memory by expiring oldest blocks */ - int end=((((int)out-(int)BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535; + int end=(((out-translation_cache)>>(TARGET_SIZE_2-16))+16384)&65535; while(expirep!=end) { int shift=TARGET_SIZE_2-3; // Divide into 8 blocks - uintptr_t base=(uintptr_t)BASE_ADDR+((expirep>>13)<>13)<>11)&3) {