X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=pico%2Fpico_int.h;h=6e4917b33c8ce336e30df934b95cea6d4361a550;hb=895d15121be3762c7007a3afe24c5d78bbdc8be7;hp=9fcc6d4b35e325541b17c1fe58178604ddba0ea9;hpb=12da51c27a8d1c1205d8f0f01bbc4814c46e79ce;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 9fcc6d4..6e4917b 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -251,6 +251,7 @@ extern SH2 sh2s[2];
   } \
 } while (0)
 # define sh2_cycles_left(sh2) (sh2)->icount
+# define sh2_burn_cycles(sh2, n) (sh2)->icount -= n
 # define sh2_pc(sh2) (sh2)->ppc
 #else
 # define sh2_end_run(sh2, after_) do { \
@@ -262,6 +263,7 @@ extern SH2 sh2s[2];
   } \
 } while (0)
 # define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)
+# define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)
 # define sh2_pc(sh2) (sh2)->pc
 #endif
 
@@ -281,6 +283,9 @@ extern SH2 sh2s[2];
 #define sh2_set_vbr(c, v) \
   { if (c) ssh2.vbr = v; else msh2.vbr = v; }
 
+#define elprintf_sh2(sh2, w, f, ...) \
+	elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)
+
 // ---------------------------------------------------------
 
 // main oscillator clock which controls timing
@@ -348,7 +353,7 @@ struct Pico
   unsigned short vsram[0x40];  // 0x22180
 
   unsigned char *rom;          // 0x22200
-  unsigned int romsize;        // 0x22204
+  unsigned int romsize;        // 0x22204 (on 32bits)
 
   struct PicoMisc m;
   struct PicoVideo video;
@@ -436,6 +441,7 @@ typedef struct
 		unsigned char pcm_ram[0x10000];
 		unsigned char pcm_ram_b[0x10][0x1000];
 	};
+	// FIXME: should be short
 	unsigned char s68k_regs[0x200];			// 110000: GA, not CPU regs
 	unsigned char bram[0x2000];			// 110200: 8K
 	struct mcd_misc m;				// 112200: misc
@@ -477,8 +483,9 @@ typedef struct
 #define P32XP_FULL  (1<<15) // PWM pulse
 #define P32XP_EMPTY (1<<14)
 
-#define P32XF_68KCPOLL  (1 << 0)
-#define P32XF_68KVPOLL  (1 << 1)
+#define P32XF_68KCPOLL   (1 << 0)
+#define P32XF_68KVPOLL   (1 << 1)
+#define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io
 
 #define P32XI_VRES (1 << 14/2) // IRL/2
 #define P32XI_VINT (1 << 12/2)
@@ -489,8 +496,7 @@ typedef struct
 // peripheral reg access
 #define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]
 
-// real one is 4*2, but we use more because we don't lockstep
-#define DMAC_FIFO_LEN (4*4)
+#define DMAC_FIFO_LEN (4*2)
 #define PWM_BUFF_LEN 1024 // in one channel samples
 
 #define SH2_DRCBLK_RAM_SHIFT 1
@@ -511,8 +517,10 @@ struct Pico32x
   unsigned char sh2irqi[2];      // individual
   unsigned int sh2irqs;          // common irqs
   unsigned short dmac_fifo[DMAC_FIFO_LEN];
+  unsigned int pad[4];
   unsigned int dmac0_fifo_ptr;
-  unsigned int pad;
+  unsigned short vdp_fbcr_fake;
+  unsigned short pad2;
   unsigned char comm_dirty_68k;
   unsigned char comm_dirty_sh2;
   unsigned char pwm_irq_cnt;
@@ -536,12 +544,19 @@ struct Pico32xMem
 #ifdef DRC_SH2
   unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
 #endif
-  unsigned char  sh2_rom_m[0x800];
-  unsigned char  sh2_rom_s[0x400];
+  union {
+    unsigned char  b[0x800];
+    unsigned short w[0x800/2];
+  } sh2_rom_m;
+  union {
+    unsigned char  b[0x400];
+    unsigned short w[0x400/2];
+  } sh2_rom_s;
   unsigned short pal[0x100];
   unsigned short pal_native[0x100];     // converted to native (for renderer)
   signed short   pwm[2*PWM_BUFF_LEN];   // PWM buffer for current frame
-  signed short   pwm_fifo[2][4];        // [0] - current, others - fifo entries
+  signed short   pwm_current[2];        // current converted samples
+  unsigned short pwm_fifo[2][4];        // [0] - current raw, others - fifo entries
 };
 
 // area.c
@@ -592,7 +607,6 @@ unsigned int PicoRead8_io(unsigned int a);
 unsigned int PicoRead16_io(unsigned int a);
 void PicoWrite8_io(unsigned int a, unsigned int d);
 void PicoWrite16_io(unsigned int a, unsigned int d);
-void p32x_dreq1_trigger(void);
 
 // pico/memory.c
 PICO_INTERNAL void PicoMemSetupPico(void);
@@ -743,6 +757,7 @@ extern struct Pico32x Pico32x;
 enum p32x_event {
   P32X_EVENT_PWM,
   P32X_EVENT_FILLEND,
+  P32X_EVENT_HINT,
   P32X_EVENT_COUNT,
 };
 extern unsigned int event_times[P32X_EVENT_COUNT];
@@ -757,9 +772,12 @@ void Pico32xStateLoaded(int is_early);
 void p32x_sync_sh2s(unsigned int m68k_target);
 void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);
 void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);
+void p32x_trigger_irq(SH2 *sh2, int m68k_cycles, unsigned int mask);
+void p32x_update_cmd_irq(SH2 *sh2, int m68k_cycles);
 void p32x_reset_sh2s(void);
 void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);
 void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles);
 
 // 32x/memory.c
 struct Pico32xMem *Pico32xMem;
@@ -796,6 +814,7 @@ void p32x_pwm_update(int *buf32, int length, int stereo);
 void p32x_pwm_ctl_changed(void);
 void p32x_pwm_schedule(unsigned int m68k_now);
 void p32x_pwm_schedule_sh2(SH2 *sh2);
+void p32x_pwm_sync_to_sh2(SH2 *sh2);
 void p32x_pwm_irq_event(unsigned int m68k_now);
 void p32x_pwm_state_loaded(void);
 
@@ -804,6 +823,7 @@ void p32x_dreq0_trigger(void);
 void p32x_dreq1_trigger(void);
 void p32x_timers_recalc(void);
 void p32x_timers_do(unsigned int m68k_slice);
+void sh2_peripheral_reset(SH2 *sh2);
 unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);
 unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);
 unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);