X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=OpBranch.cpp;h=051c3730cafa653843c129f8e87415a17c54f2ea;hb=cfe17eee41a12da11f69660c2764813e94d871ea;hp=c37620ad7b975547f406a86ca2c20e528be77596;hpb=52ac6b1c8f65fe2477ffc3a7fc63ca8ae9d7e59f;p=cyclone68000.git

diff --git a/OpBranch.cpp b/OpBranch.cpp
index c37620a..051c373 100644
--- a/OpBranch.cpp
+++ b/OpBranch.cpp
@@ -312,6 +312,7 @@ static const char * const Cond[16]=
 // Emit a Dbra opcode, 0101cccc 11001nnn vv
 int OpDbra(int op)
 {
+  const char *cond;
   int use=0;
   int cc=0;
 
@@ -321,25 +322,12 @@ int OpDbra(int op)
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
   OpStart(op);
 
-  switch (cc)
+  if (cc>=2)
   {
-    case 0: // T
-    case 1: // F
-      break;
-    case 2: // hi
-      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");
-      ot("  beq DbraTrue\n\n");
-      break;
-    case 3: // ls
-      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");
-      ot("  bne DbraTrue\n\n");
-      break;
-    default:
-      ot(";@ Is the condition true?\n");
-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
-      ot(";@ If so, don't dbra\n");
-      ot("  b%s DbraTrue\n\n",Cond[cc]);
-      break;
+    ot(";@ Is the condition true?\n");
+    cond=TestCond(cc);
+    ot(";@ If so, don't dbra\n");
+    ot("  b%s DbraTrue\n\n",cond);
   }
 
   if (cc!=0)
@@ -348,6 +336,7 @@ int OpDbra(int op)
     ot("  and r1,r8,#0x0007\n");
     ot("  mov r1,r1,lsl #2\n");
     ot("  ldrsh r0,[r7,r1]\n");
+    ot("  strb r8,[r7,#0x45] ;@ not polling\n");
     ot("  sub r0,r0,#1\n");
     ot("  strh r0,[r7,r1]\n");
     ot("\n");
@@ -418,6 +407,8 @@ int OpBranch(int op)
   int offset=0;
   int cc=0;
   const char *asr_r11="";
+  const char *cond;
+  int pc_reg=0;
 
   offset=(char)(op&0xff);
   cc=(op>>8)&15;
@@ -428,30 +419,16 @@ int OpBranch(int op)
 
   if (size==2) size=0; // 000 model does not support long displacement
   if (size) use=op; // 16-bit or 32-bit
-  else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches
+  else use=(op&0xff01)+2; // Use same opcode for all 8-bit branches
 
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
   OpStart(op,size?0x10:0);
   Cycles=10; // Assume branch taken
 
-  switch (cc)
+  if (cc>=2)
   {
-    case 0: // T
-    case 1: // F
-      break;
-    case 2: // hi
-      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");
-      ot("  bne BccDontBranch%i\n\n",8<<size);
-      break;
-    case 3: // ls
-      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");
-      ot("  beq BccDontBranch%i\n\n",8<<size);
-      break;
-    default:
-      ot(";@ Is the condition true?\n");
-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
-      ot("  b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);
-      break;
+    cond=TestCond(cc,1);
+    ot("  b%s BccDontBranch%i\n\n",cond,8<<size);
   }
 
   if (size) 
@@ -491,8 +468,6 @@ int OpBranch(int op)
     Cycles=18; // always 18
   }
 
-  ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);
-
 #if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_8
   if (offset!=0 && offset!=-1) checkpc=1;
 #endif
@@ -502,20 +477,48 @@ int OpBranch(int op)
 #if USE_CHECKPC_CALLBACK
   if (offset==-1) checkpc=1;
 #endif
-  if (checkpc) CheckPc();
+  if (checkpc)
+  {
+    ot("  add r0,r4,r11%s ;@ New PC\n",asr_r11);
+    CheckPc();
+    pc_reg=0;
+  }
+  else
+  {
+    ot("  add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11);
+    pc_reg=4;
+  }
+
+  if ((op & 1) || size != 0)
+  {
 #if EMULATE_ADDRESS_ERRORS_JUMP
-  ot("  mov r4,r0\n");
-  ot("  tst r4,#1 ;@ address error?\n");
-  ot("  bne ExceptionAddressError_r_prg_r4\n");
+    if (pc_reg!=4)
+    {
+      ot("  mov r4,r%d\n",pc_reg);
+      pc_reg=4;
+    }
+    if (size)
+    {
+      ot("  tst r4,#1 ;@ address error?\n");
+      ot("  bne ExceptionAddressError_r_prg_r4\n");
+    }
+    else
+    {
+      ot("  b ExceptionAddressError_r_prg_r4\n");
+    }
 #else
-  ot("  bic r4,r0,#1\n");
+    ot("  bic r4,r%d,#1\n",pc_reg);
+    pc_reg=4;
 #endif
+  }
+  if (pc_reg!=4)
+    ot("  mov r4,r%d\n",pc_reg);
   ot("\n");
 
   OpEnd(size?0x10:0);
 
   // since all "DontBranch" code is same for every size, output only once
-  if (cc>=2&&(op&0xff00)==0x6700)
+  if (cc>=2&&(op&0xff01)==0x6700)
   {
     ot("BccDontBranch%i%s\n", 8<<size, ms?"":":");
     if (size) ot("  add r4,r4,#%d\n",1<<size);