X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=OpLogic.cpp;h=4d4312cdef86c64b64bc577aa220b4d7dd1e5537;hb=590d780f20871b29fdc803bd2c74b046fd2d0f28;hp=d4d9b13cce106a7d0a6cde90cafdb0819527087f;hpb=52ac6b1c8f65fe2477ffc3a7fc63ca8ae9d7e59f;p=cyclone68000.git diff --git a/OpLogic.cpp b/OpLogic.cpp index d4d9b13..4d4312c 100644 --- a/OpLogic.cpp +++ b/OpLogic.cpp @@ -12,6 +12,84 @@ #include "app.h" +// trashes r0 +const char *TestCond(int m68k_cc, int invert) +{ + const char *cond=""; + const char *icond=""; + + // ARM: NZCV + switch (m68k_cc) + { + case 0x00: // T + case 0x01: // F + break; + case 0x02: // hi + ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n"); + cond="eq", icond="ne"; + break; + case 0x03: // ls + ot(" tst r10,#0x60000000 ;@ ls: C || Z\n"); + cond="ne", icond="eq"; + break; + case 0x04: // cc + ot(" tst r10,#0x20000000 ;@ cc: !C\n"); + cond="eq", icond="ne"; + break; + case 0x05: // cs + ot(" tst r10,#0x20000000 ;@ cs: C\n"); + cond="ne", icond="eq"; + break; + case 0x06: // ne + ot(" tst r10,#0x40000000 ;@ ne: !Z\n"); + cond="eq", icond="ne"; + break; + case 0x07: // eq + ot(" tst r10,#0x40000000 ;@ eq: Z\n"); + cond="ne", icond="eq"; + break; + case 0x08: // vc + ot(" tst r10,#0x10000000 ;@ vc: !V\n"); + cond="eq", icond="ne"; + break; + case 0x09: // vs + ot(" tst r10,#0x10000000 ;@ vs: V\n"); + cond="ne", icond="eq"; + break; + case 0x0a: // pl + ot(" tst r10,r10 ;@ pl: !N\n"); + cond="pl", icond="mi"; + break; + case 0x0b: // mi + ot(" tst r10,r10 ;@ mi: N\n"); + cond="mi", icond="pl"; + break; + case 0x0c: // ge + ot(" teq r10,r10,lsl #3 ;@ ge: N == V\n"); + cond="pl", icond="mi"; + break; + case 0x0d: // lt + ot(" teq r10,r10,lsl #3 ;@ lt: N != V\n"); + cond="mi", icond="pl"; + break; + case 0x0e: // gt + ot(" eor r0,r10,r10,lsl #3 ;@ gt: !Z && N == V\n"); + ot(" orrs r0,r10,lsl #1\n"); + cond="pl", icond="mi"; + break; + case 0x0f: // le + ot(" eor r0,r10,r10,lsl #3 ;@ le: Z || N != V\n"); + ot(" orrs r0,r10,lsl #1\n"); + cond="mi", icond="pl"; + break; + default: + printf("invalid m68k_cc: %x\n", m68k_cc); + exit(1); + break; + } + return invert?icond:cond; +} + // --------------------- Opcodes 0x0100+ --------------------- // Emit a Btst (Register) opcode 0000nnn1 ttaaaaaa int OpBtstReg(int op) @@ -207,12 +285,11 @@ int OpNeg(int op) ot(";@ Not:\n"); if(size!=2) { ot(" mov r0,r0,asl #%i\n",size?16:24); - ot(" mvn r1,r0,asr #%i\n",size?16:24); + ot(" mvns r1,r0,asr #%i\n",size?16:24); } else - ot(" mvn r1,r0\n"); - ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); - OpGetFlags(0,0); + ot(" mvns r1,r0\n"); + OpGetFlagsNZ(1); ot("\n"); } @@ -240,9 +317,8 @@ int OpSwap(int op) EaCalc (11,0x0007,ea,2,1); EaRead (11, 0,ea,2,0x0007,1); - ot(" mov r1,r0,ror #16\n"); - ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); - OpGetFlags(0,0); + ot(" movs r1,r0,ror #16\n"); + OpGetFlagsNZ(1); EaWrite(11, 1,8,2,0x0007,1); @@ -269,11 +345,10 @@ int OpTst(int op) OpStart(op,sea); Cycles=4; - EaCalc ( 0,0x003f,sea,size,1); - EaRead ( 0, 0,sea,size,0x003f,1); + EaCalc (0,0x003f,sea,size,1); + EaRead (0, 0,sea,size,0x003f,1,0,1); - ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n"); - ot(" mrs r10,cpsr ;@ r10=flags\n"); + OpGetFlagsNZ(0); ot("\n"); OpEnd(sea); @@ -300,9 +375,8 @@ int OpExt(int op) EaCalc (11,0x0007,ea,size+1,0,0); EaRead (11, 0,ea,size+1,0x0007,0,0); - ot(" mov r0,r0,asl #%d\n",shift); - ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n"); - ot(" mrs r10,cpsr ;@ r10=flags\n"); + ot(" movs r0,r0,asl #%d\n",shift); + OpGetFlagsNZ(0); ot(" mov r1,r0,asr #%d\n",shift); ot("\n"); @@ -318,11 +392,7 @@ int OpSet(int op) { int cc=0,ea=0; int size=0,use=0,changed_cycles=0; - static const char * const cond[16]= - { - "al","", "hi","ls","cc","cs","ne","eq", - "vc","vs","pl","mi","ge","lt","gt","le" - }; + const char *cond; cc=(op>>8)&15; ea=op&0x003f; @@ -339,32 +409,20 @@ int OpSet(int op) OpStart(op,ea,0,changed_cycles); Cycles=8; if (ea<8) Cycles=4; - if (cc) - ot(" mov r1,#0\n"); - switch (cc) { - case 0: // T + case 0x00: // T ot(" mvn r1,#0\n"); if (ea<8) Cycles+=2; break; - case 1: // F - break; - case 2: // hi - ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n"); - ot(" mvneq r1,r1\n"); - if (ea<8) ot(" subeq r5,r5,#2 ;@ Extra cycles\n"); - break; - case 3: // ls - ot(" tst r10,#0x60000000 ;@ ls: C || Z\n"); - ot(" mvnne r1,r1\n"); - if (ea<8) ot(" subne r5,r5,#2 ;@ Extra cycles\n"); + case 0x01: // F + ot(" mov r1,#0\n"); break; default: - ot(";@ Is the condition true?\n"); - ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n"); - ot(" mvn%s r1,r1\n",cond[cc]); - if (ea<8) ot(" sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]); + ot(" mov r1,#0\n"); + cond=TestCond(cc); + ot(" mvn%s r1,#0\n",cond); + if (ea<8) ot(" sub%s r5,r5,#2 ;@ Extra cycles\n",cond); break; } @@ -534,8 +592,8 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg) ot(" b nozerox%.4x\n",op); ot("norotx_%.4x%s\n",op,ms?"":":"); ot(" ldr r2,[r7,#0x4c]\n"); - ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n"); - OpGetFlags(0,0); + ot(" adds r0,r0,#0 ;@ Define flags\n"); + OpGetFlagsNZ(0); ot(" and r2,r2,#0x20000000\n"); ot(" orr r10,r10,r2 ;@ C = old_X\n"); ot("nozerox%.4x%s\n",op,ms?"":":"); @@ -684,10 +742,9 @@ int OpTas(int op, int gen_special) if(ea>=8) Cycles+=10; EaCalc (11,0x003f,ea,0,1); - EaRead (11, 1,ea,0,0x003f,1); + EaRead (11, 1,ea,0,0x003f,1,0,1); - ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); - OpGetFlags(0,0); + OpGetFlagsNZ(1); ot("\n"); #if CYCLONE_FOR_GENESIS