X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FMemory.c;h=29f0470a78bd0e0626307764c0573bd3451d3eec;hb=9037e45d9f2752fdd6ebbc01328148839403a84f;hp=527b80b5f27d2d8a00eed2574fe4b4f14bac4a23;hpb=8ab3e3c1cf696cb776b14ab511f98aa8ab22797e;p=picodrive.git diff --git a/Pico/Memory.c b/Pico/Memory.c index 527b80b..29f0470 100644 --- a/Pico/Memory.c +++ b/Pico/Memory.c @@ -1,14 +1,12 @@ // This is part of Pico Library // (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006 notaz, All rights reserved. +// (c) Copyright 2006,2007 notaz, All rights reserved. // Free for non-commercial use. // For commercial use, separate licencing terms must be obtained. -#define __debug_io - #include "PicoInt.h" #include "sound/ym2612.h" @@ -28,12 +26,10 @@ u32 PicoRead8(u32 a); u32 PicoRead16(u32 a); void PicoWrite8(u32 a,u8 d); void PicoWriteRomHW_SSF2(u32 a,u32 d); -void PicoWriteRomHW_in1 (u32 a,u32 d); #endif -#if defined(EMU_C68K) && defined(EMU_M68K) -// cyclone debug mode +#ifdef EMU_CORE_DEBUG u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,}; int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0; extern unsigned int ppop; @@ -41,6 +37,8 @@ extern unsigned int ppop; #ifdef IO_STATS void log_io(unsigned int addr, int bits, int rw); +#elif defined(_MSC_VER) +#define log_io #else #define log_io(...) #endif @@ -114,7 +112,8 @@ int PadRead(int i) // orr the bits, which are set as output value = data_reg&(Pico.ioports[i+4]|0x80); - if(PicoOpt & 0x20) { // 6 button gamepad enabled + if (PicoOpt & POPT_6BTN_PAD) + { int phase = Pico.m.padTHPhase[i]; if(phase == 2 && !(data_reg&0x40)) { // TH @@ -143,16 +142,33 @@ static u32 SRAMRead(u32 a) { unsigned int sreg = Pico.m.sram_reg; - if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM + if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM elprintf(EL_SRAMIO, "normal sram detected."); Pico.m.sram_reg|=0x10; // should be normal SRAM } - if(sreg & 4) // EEPROM read + if (sreg & 4) // EEPROM read return SRAMReadEEPROM(); else // if(sreg & 1) // (sreg&5) is one of prerequisites return *(u8 *)(SRam.data-SRam.start+a); } +#ifndef _ASM_MEMORY_C +static +#endif +u32 SRAMRead16(u32 a) +{ + u32 d; + if (Pico.m.sram_reg & 4) { + d = SRAMReadEEPROM(); + d |= d << 8; + } else { + u8 *pm=(u8 *)(SRam.data-SRam.start+a); + d =*pm++ << 8; + d|=*pm++; + } + return d; +} + static void SRAMWrite(u32 a, u32 d) { unsigned int sreg = Pico.m.sram_reg; @@ -190,13 +206,18 @@ static void SRAMWrite(u32 a, u32 d) } // for nonstandard reads -#ifndef _ASM_MEMORY_C -static -#endif -u32 OtherRead16End(u32 a, int realsize) +static u32 OtherRead16End(u32 a, int realsize) { u32 d=0; + // 32x test +/* + if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA + else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS + else if (a == 0xa15100) { d = 0x0080; goto end; } + else +*/ + // for games with simple protection devices, discovered by Haze // some dumb detection is used, but that should be enough to make things work if ((a>>22) == 1 && Pico.romsize >= 512*1024) { @@ -291,23 +312,11 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) #endif elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); - if(a >= 0xA13004 && a < 0xA13040) { - // dumb 12-in-1 or 4-in-1 banking support - int len; - a &= 0x3f; a <<= 16; - len = Pico.romsize - a; - if (len <= 0) return; // invalid/missing bank - if (len > 0x200000) len = 0x200000; // 2 megs - memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe. - return; - } - // for games with simple protection devices, discovered by Haze - else if ((a>>22) == 1) + if ((a>>22) == 1) Pico.m.prot_bytes[(a>>2)&1] = (u8)d; } - #include "MemoryCmn.c" @@ -323,9 +332,9 @@ PICO_INTERNAL_ASM u32 PicoRead8(u32 a) a&=0xffffff; -#if !(defined(EMU_C68K) && defined(EMU_M68K)) +#ifndef EMU_CORE_DEBUG // sram - if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { + if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { d = SRAMRead(a); elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc); goto end; @@ -336,14 +345,15 @@ PICO_INTERNAL_ASM u32 PicoRead8(u32 a) log_io(a, 8, 0); if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram - d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8; + if ((a&0xe700e0)==0xc00000) // VDP + d=PicoVideoRead(a); + else d=OtherRead16(a&~1, 8); + if ((a&1)==0) d>>=8; end: -#ifdef __debug_io - dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) - if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { + elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); +#ifdef EMU_CORE_DEBUG + if (a>=Pico.romsize) { lastread_a = a; lastread_d[lrp_cyc++&15] = (u8)d; } @@ -359,11 +369,10 @@ PICO_INTERNAL_ASM u32 PicoRead16(u32 a) a&=0xfffffe; -#if !(defined(EMU_C68K) && defined(EMU_M68K)) +#ifndef EMU_CORE_DEBUG // sram - if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { - d = SRAMRead(a); - d |= d<<8; + if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { + d = SRAMRead16(a); elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc); goto end; } @@ -372,14 +381,14 @@ PICO_INTERNAL_ASM u32 PicoRead16(u32 a) if (a=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { + elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc); +#ifdef EMU_CORE_DEBUG + if (a>=Pico.romsize) { lastread_a = a; lastread_d[lrp_cyc++&15] = d; } @@ -397,8 +406,7 @@ PICO_INTERNAL_ASM u32 PicoRead32(u32 a) // sram if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { - d = (SRAMRead(a)<<16)|SRAMRead(a+2); - d |= d<<8; + d = (SRAMRead16(a)<<16)|SRAMRead16(a+2); elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc); goto end; } @@ -406,14 +414,14 @@ PICO_INTERNAL_ASM u32 PicoRead32(u32 a) if (a=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { + elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc); +#ifdef EMU_CORE_DEBUG + if (a>=Pico.romsize) { lastread_a = a; lastread_d[lrp_cyc++&15] = d; } @@ -425,18 +433,13 @@ end: // ----------------------------------------------------------------- // Write Ram -#ifndef _ASM_MEMORY_C +#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS) PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d) { -#ifdef __debug_io - dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) + elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); +#ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif - //if ((a&0xe0ffff)==0xe0a9ba+0x69c) - //if(a==0x200000||a==0x200001) printf("w8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT()); - // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram log_io(a, 8, 1); @@ -448,10 +451,8 @@ PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d) void PicoWrite16(u32 a,u16 d) { -#ifdef __debug_io - dprintf("w16: %06x, %04x", a&0xffffff, d); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) + elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d); +#ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif @@ -459,15 +460,14 @@ void PicoWrite16(u32 a,u16 d) log_io(a, 16, 1); a&=0xfffffe; + if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP OtherWrite16(a,d); } static void PicoWrite32(u32 a,u32 d) { -#ifdef __debug_io - dprintf("w32: %06x, %08x", a&0xffffff, d); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) + elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d); +#ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif @@ -481,12 +481,43 @@ static void PicoWrite32(u32 a,u32 d) log_io(a, 32, 1); a&=0xfffffe; + if ((a&0xe700e0)==0xc00000) + { + // VDP: + PicoVideoWrite(a, (u16)(d>>16)); + PicoVideoWrite(a+2,(u16)d); + return; + } + OtherWrite16(a, (u16)(d>>16)); OtherWrite16(a+2,(u16)d); } // ----------------------------------------------------------------- + +static void OtherWrite16End(u32 a,u32 d,int realsize) +{ + PicoWrite8Hook(a, d>>8, realsize); + PicoWrite8Hook(a+1,d&0xff, realsize); +} + +u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End; +void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End; +void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End; + +PICO_INTERNAL void PicoMemResetHooks(void) +{ + // default unmapped/cart specific handlers + PicoRead16Hook = OtherRead16End; + PicoWrite8Hook = OtherWrite8End; + PicoWrite16Hook = OtherWrite16End; +} + +#ifdef EMU_M68K +static void m68k_mem_setup(void); +#endif + PICO_INTERNAL void PicoMemSetup(void) { // Setup memory callbacks: @@ -510,7 +541,7 @@ PICO_INTERNAL void PicoMemSetup(void) // setup FAME fetchmap { int i; - // by default, point everything to fitst 64k of ROM + // by default, point everything to first 64k of ROM for (i = 0; i < M68K_FETCHBANK1; i++) PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); // now real ROM @@ -521,44 +552,50 @@ PICO_INTERNAL void PicoMemSetup(void) PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS)); } #endif +#ifdef EMU_M68K + m68k_mem_setup(); +#endif } - +/* some nasty things below :( */ #ifdef EMU_M68K -unsigned int m68k_read_pcrelative_CD8 (unsigned int a); -unsigned int m68k_read_pcrelative_CD16(unsigned int a); -unsigned int m68k_read_pcrelative_CD32(unsigned int a); - -// these are allowed to access RAM -static unsigned int m68k_read_8 (unsigned int a, int do_fake) { +unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL; +void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL; +void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL; +void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL; +unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL; + +// these are here for core debugging mode +static unsigned int m68k_read_8 (unsigned int a, int do_fake) +{ a&=0xffffff; - if(PicoMCD&1) return m68k_read_pcrelative_CD8(a); - if(a>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if(PicoOpt&1) ret = (u8) YM2612Read(); - goto end; + if (PicoOpt&POPT_EN_FM) ret = (u8) YM2612Read(); + return ret; } if (a>=0x8000) { + extern u32 PicoReadM68k8(u32 a); u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; - ret = (u8) PicoRead8(addr68k); + if (PicoAHW & PAHW_MCD) + ret = PicoReadM68k8(addr68k); + else ret = PicoRead8(addr68k); elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret); - goto end; + return ret; } - // should not be needed || dprintf("z80_read RAM"); - if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; } + // should not be needed, cores should be able to access RAM themselves + if (a<0x4000) return Pico.zram[a&0x1fff]; elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret); - -end: return ret; } -PICO_INTERNAL unsigned short z80_read16(unsigned short a) -{ - //dprintf("z80_read16"); - - return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) ); -} - +#ifndef _USE_CZ80 PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a) +#else +PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data) +#endif { - //if (a<0x4000) - // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0)); - if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1; + if(PicoOpt&POPT_EN_FM) emustatus|=YM2612Write(a, data) & 1; return; } if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17 { - if(PicoOpt&2) SN76496Write(data); + if(PicoOpt&POPT_EN_PSG) SN76496Write(data); return; } @@ -718,25 +749,33 @@ PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a) if (a>=0x8000) { + extern void PicoWriteM68k8(u32 a,u8 d); u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data); - PicoWrite8(addr68k, data); + if (PicoAHW & PAHW_MCD) + PicoWriteM68k8(addr68k, data); + else PicoWrite8(addr68k, data); return; } - // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr); + // should not be needed if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; } elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data); } -PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a) +#ifndef _USE_CZ80 +PICO_INTERNAL unsigned short z80_read16(unsigned short a) { - //dprintf("z80_write16"); + return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) ); +} +PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a) +{ z80_write((unsigned char) data,a); z80_write((unsigned char)(data>>8),(u16)(a+1)); } +#endif