X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FMemory.c;h=3c7b70c28e6ef5c24c29599b5a029007a94ce14f;hb=a4221917e147ba303f2cf6c09d12362bf2802084;hp=e95d13229b0be854ddeb46e34ce000e0f7704840;hpb=69996cb7c62468cd97842e35bdd2b74006a28dba;p=picodrive.git

diff --git a/Pico/Memory.c b/Pico/Memory.c
index e95d1322..3c7b70c2 100644
--- a/Pico/Memory.c
+++ b/Pico/Memory.c
@@ -45,7 +45,7 @@ void log_io(unsigned int addr, int bits, int rw);
 #define log_io(...)
 #endif
 
-#if defined(EMU_C68K) || defined(EMU_A68K)
+#if defined(EMU_C68K)
 static __inline int PicoMemBase(u32 pc)
 {
   int membase=0;
@@ -69,15 +69,11 @@ static __inline int PicoMemBase(u32 pc)
 #endif
 
 
-#ifdef EMU_A68K
-extern u8 *OP_ROM=NULL,*OP_RAM=NULL;
-#endif
-
-static u32 CPU_CALL PicoCheckPc(u32 pc)
+static u32 PicoCheckPc(u32 pc)
 {
   u32 ret=0;
 #if defined(EMU_C68K)
-  pc-=PicoCpu.membase; // Get real pc
+  pc-=PicoCpuCM68k.membase; // Get real pc
 //  pc&=0xfffffe;
   pc&=~1;
   if ((pc<<8) == 0)
@@ -86,15 +82,10 @@ static u32 CPU_CALL PicoCheckPc(u32 pc)
     return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off
   }
 
-  PicoCpu.membase=PicoMemBase(pc&0x00ffffff);
-  PicoCpu.membase-=pc&0xff000000;
+  PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);
+  PicoCpuCM68k.membase-=pc&0xff000000;
 
-  ret = PicoCpu.membase+pc;
-#elif defined(EMU_A68K)
-  OP_ROM=(u8 *)PicoMemBase(pc);
-
-  // don't bother calling us back unless it's outside the 64k segment
-  M68000_regs.AsmBank=(pc>>16);
+  ret = PicoCpuCM68k.membase+pc;
 #endif
   return ret;
 }
@@ -153,6 +144,7 @@ u32 SRAMRead(u32 a)
 {
   unsigned int sreg = Pico.m.sram_reg;
   if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
+    elprintf(EL_SRAMIO, "normal sram detected.");
     Pico.m.sram_reg|=0x10; // should be normal SRAM
   }
   if(sreg & 4) // EEPROM read
@@ -163,24 +155,30 @@ u32 SRAMRead(u32 a)
 
 static void SRAMWrite(u32 a, u32 d)
 {
-  dprintf("sram_w: %06x, %08x @%06x", a&0xffffff, d, SekPc);
   unsigned int sreg = Pico.m.sram_reg;
   if(!(sreg & 0x10)) {
     // not detected SRAM
     if((a&~1)==0x200000) {
-      Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)
+      elprintf(EL_SRAMIO, "eeprom detected.");
+      sreg|=4; // this should be a game with EEPROM (like NBA Jam)
       SRam.start=0x200000; SRam.end=SRam.start+1;
-    }
-    Pico.m.sram_reg|=0x10;
+    } else
+      elprintf(EL_SRAMIO, "normal sram detected.");
+    sreg|=0x10;
+    Pico.m.sram_reg=sreg;
   }
   if(sreg & 4) { // EEPROM write
-    if(SekCyclesDoneT()-lastSSRamWrite < 46) {
+    // this diff must be at most 16 for NBA Jam to work
+    if(SekCyclesDoneT()-lastSSRamWrite < 16) {
       // just update pending state
+      elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);
       SRAMUpdPending(a, d);
     } else {
+      int old=sreg;
       SRAMWriteEEPROM(sreg>>6); // execute pending
       SRAMUpdPending(a, d);
-      lastSSRamWrite = SekCyclesDoneT();
+      if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed
+        lastSSRamWrite = SekCyclesDoneT();
     }
   } else if(!(sreg & 2)) {
     u8 *pm=(u8 *)(SRam.data-SRam.start+a);
@@ -199,8 +197,6 @@ u32 OtherRead16End(u32 a, int realsize)
 {
   u32 d=0;
 
-  dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);
-
   // for games with simple protection devices, discovered by Haze
   // some dumb detection is used, but that should be enough to make things work
   if ((a>>22) == 1 && Pico.romsize >= 512*1024) {
@@ -262,7 +258,7 @@ u32 OtherRead16End(u32 a, int realsize)
   }
 
 end:
-  dprintf("ret = %04x", d);
+  elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
   return d;
 }
 
@@ -272,9 +268,8 @@ end:
 static void OtherWrite8End(u32 a,u32 d,int realsize)
 {
   // sram
-  //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());
-  //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());
   if(a >= SRam.start && a <= SRam.end) {
+    elprintf(EL_SRAMIO, "sram w8  [%06x] %02x @ %06x", a, d, SekPc);
     SRAMWrite(a, d);
     return;
   }
@@ -288,13 +283,13 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
 #else
   // sram access register
   if(a == 0xA130F1) {
-    dprintf("sram reg=%02x", d);
+    elprintf(EL_SRAMIO, "sram reg=%02x", d);
     Pico.m.sram_reg &= ~3;
     Pico.m.sram_reg |= (u8)(d&3);
     return;
   }
 #endif
-  dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
+  elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
 
   if(a >= 0xA13004 && a < 0xA13040) {
     // dumb 12-in-1 or 4-in-1 banking support
@@ -320,7 +315,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
 //                     Read Rom and read Ram
 
 #ifndef _ASM_MEMORY_C
-PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
+PICO_INTERNAL_ASM u32 PicoRead8(u32 a)
 {
   u32 d=0;
 
@@ -332,6 +327,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
   // sram
   if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
     d = SRAMRead(a);
+    elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
     goto end;
   }
 #endif
@@ -342,15 +338,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
 
   d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;
 
-  end:
-
-  //if ((a&0xe0ffff)==0xe0AE57+0x69c)
-  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);
-  //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
-  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);
-
-  //if(a==0x200001||a==0x200000) printf("r8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());
-  //dprintf("r8 : %06x,   %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);
+end:
 #ifdef __debug_io
   dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);
 #endif
@@ -363,7 +351,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
   return d;
 }
 
-PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
+PICO_INTERNAL_ASM u32 PicoRead16(u32 a)
 {
   u32 d=0;
 
@@ -376,6 +364,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
   if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
     d = SRAMRead(a);
     d |= d<<8;
+    elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
     goto end;
   }
 #endif
@@ -385,11 +374,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
 
   d = OtherRead16(a, 16);
 
-  end:
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)
-  //  dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
-  //if(a==0x200000) printf("r16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());
-
+end:
 #ifdef __debug_io
   dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
 #endif
@@ -402,7 +387,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
   return d;
 }
 
-PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
+PICO_INTERNAL_ASM u32 PicoRead32(u32 a)
 {
   u32 d=0;
 
@@ -414,6 +399,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
   if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
     d = (SRAMRead(a)<<16)|SRAMRead(a+2);
     d |= d<<8;
+    elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);
     goto end;
   }
 
@@ -422,8 +408,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
 
   d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
 
-  end:
-  //if(a==0x200000) printf("r32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());
+end:
 #ifdef __debug_io
   dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
 #endif
@@ -441,7 +426,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
 //                            Write Ram
 
 #ifndef _ASM_MEMORY_C
-PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)
+PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)
 {
 #ifdef __debug_io
   dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);
@@ -461,7 +446,7 @@ PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)
 }
 #endif
 
-void CPU_CALL PicoWrite16(u32 a,u16 d)
+void PicoWrite16(u32 a,u16 d)
 {
 #ifdef __debug_io
   dprintf("w16: %06x, %04x", a&0xffffff, d);
@@ -469,9 +454,6 @@ void CPU_CALL PicoWrite16(u32 a,u16 d)
 #if defined(EMU_C68K) && defined(EMU_M68K)
   lastwrite_cyc_d[lwp_cyc++&15] = d;
 #endif
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)
-  //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
-  //if(a==0x200000) printf("w16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());
 
   if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram
   log_io(a, 16, 1);
@@ -480,7 +462,7 @@ void CPU_CALL PicoWrite16(u32 a,u16 d)
   OtherWrite16(a,d);
 }
 
-static void CPU_CALL PicoWrite32(u32 a,u32 d)
+static void PicoWrite32(u32 a,u32 d)
 {
 #ifdef __debug_io
   dprintf("w32: %06x, %08x", a&0xffffff, d);
@@ -488,7 +470,6 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d)
 #if defined(EMU_C68K) && defined(EMU_M68K)
   lastwrite_cyc_d[lwp_cyc++&15] = d;
 #endif
-  //if(a==0x200000) printf("w32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());
 
   if ((a&0xe00000)==0xe00000)
   {
@@ -508,53 +489,40 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d)
 // -----------------------------------------------------------------
 PICO_INTERNAL void PicoMemSetup(void)
 {
-#ifdef EMU_C68K
   // Setup memory callbacks:
-  PicoCpu.checkpc=PicoCheckPc;
-  PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;
-  PicoCpu.fetch16=PicoCpu.read16=PicoRead16;
-  PicoCpu.fetch32=PicoCpu.read32=PicoRead32;
-  PicoCpu.write8 =PicoWrite8;
-  PicoCpu.write16=PicoWrite16;
-  PicoCpu.write32=PicoWrite32;
+#ifdef EMU_C68K
+  PicoCpuCM68k.checkpc=PicoCheckPc;
+  PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;
+  PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;
+  PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;
+  PicoCpuCM68k.write8 =PicoWrite8;
+  PicoCpuCM68k.write16=PicoWrite16;
+  PicoCpuCM68k.write32=PicoWrite32;
+#endif
+#ifdef EMU_F68K
+  PicoCpuFM68k.read_byte =PicoRead8;
+  PicoCpuFM68k.read_word =PicoRead16;
+  PicoCpuFM68k.read_long =PicoRead32;
+  PicoCpuFM68k.write_byte=PicoWrite8;
+  PicoCpuFM68k.write_word=PicoWrite16;
+  PicoCpuFM68k.write_long=PicoWrite32;
+
+  // setup FAME fetchmap
+  {
+    int i;
+    // by default, point everything to fitst 64k of ROM
+    for (i = 0; i < M68K_FETCHBANK1; i++)
+      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
+    // now real ROM
+    for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
+      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
+    // .. and RAM
+    for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
+      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
+  }
 #endif
 }
 
-#ifdef EMU_A68K
-struct A68KInter
-{
-  u32 unknown;
-  u8  (__fastcall *Read8) (u32 a);
-  u16 (__fastcall *Read16)(u32 a);
-  u32 (__fastcall *Read32)(u32 a);
-  void (__fastcall *Write8)  (u32 a,u8 d);
-  void (__fastcall *Write16) (u32 a,u16 d);
-  void (__fastcall *Write32) (u32 a,u32 d);
-  void (__fastcall *ChangePc)(u32 a);
-  u8  (__fastcall *PcRel8) (u32 a);
-  u16 (__fastcall *PcRel16)(u32 a);
-  u32 (__fastcall *PcRel32)(u32 a);
-  u16 (__fastcall *Dir16)(u32 a);
-  u32 (__fastcall *Dir32)(u32 a);
-};
-
-struct A68KInter a68k_memory_intf=
-{
-  0,
-  PicoRead8,
-  PicoRead16,
-  PicoRead32,
-  PicoWrite8,
-  PicoWrite16,
-  PicoWrite32,
-  PicoCheckPc,
-  PicoRead8,
-  PicoRead16,
-  PicoRead32,
-  PicoRead16, // unused
-  PicoRead32, // unused
-};
-#endif
 
 #ifdef EMU_M68K
 unsigned int  m68k_read_pcrelative_CD8 (unsigned int a);
@@ -647,14 +615,17 @@ void PicoWriteCD8w (unsigned int a, unsigned char d);
 void PicoWriteCD16w(unsigned int a, unsigned short d);
 void PicoWriteCD32w(unsigned int a, unsigned int d);
 
+/* it appears that Musashi doesn't always mask the unused bits */
 unsigned int  m68k_read_memory_8(unsigned int address)
 {
-    return (PicoMCD&1) ? PicoReadCD8w(address)  : PicoRead8(address);
+    unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);
+    return d&0xff;
 }
 
 unsigned int  m68k_read_memory_16(unsigned int address)
 {
-    return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);
+    unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);
+    return d&0xffff;
 }
 
 unsigned int  m68k_read_memory_32(unsigned int address)
@@ -713,21 +684,18 @@ end:
   return ret;
 }
 
-PICO_INTERNAL unsigned short z80_read16(unsigned short a)
-{
-  //dprintf("z80_read16");
-
-  return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );
-}
-
+#ifndef _USE_CZ80
 PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)
+#else
+PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)
+#endif
 {
   //if (a<0x4000)
   //  dprintf("z80 w8 : %06x,   %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));
 
   if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)
   {
-    if(PicoOpt&1) emustatus|=YM2612Write(a, data);
+    if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;
     return;
   }
 
@@ -761,6 +729,14 @@ PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)
   elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
 }
 
+#ifndef _USE_CZ80
+PICO_INTERNAL unsigned short z80_read16(unsigned short a)
+{
+  //dprintf("z80_read16");
+
+  return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );
+}
+
 PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)
 {
   //dprintf("z80_write16");
@@ -768,4 +744,5 @@ PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)
   z80_write((unsigned char) data,a);
   z80_write((unsigned char)(data>>8),(u16)(a+1));
 }
+#endif