X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FMemory.c;h=48c32a6581b6224cdb7ed89fc5ec077cd7a6919e;hb=f8ef8ff7100baa0ac0ecfcacb47aea3a9e24bc38;hp=e95d13229b0be854ddeb46e34ce000e0f7704840;hpb=69996cb7c62468cd97842e35bdd2b74006a28dba;p=picodrive.git diff --git a/Pico/Memory.c b/Pico/Memory.c index e95d132..48c32a6 100644 --- a/Pico/Memory.c +++ b/Pico/Memory.c @@ -1,14 +1,12 @@ // This is part of Pico Library // (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006 notaz, All rights reserved. +// (c) Copyright 2006,2007 notaz, All rights reserved. // Free for non-commercial use. // For commercial use, separate licencing terms must be obtained. -#define __debug_io - #include "PicoInt.h" #include "sound/ym2612.h" @@ -28,12 +26,10 @@ u32 PicoRead8(u32 a); u32 PicoRead16(u32 a); void PicoWrite8(u32 a,u8 d); void PicoWriteRomHW_SSF2(u32 a,u32 d); -void PicoWriteRomHW_in1 (u32 a,u32 d); #endif -#if defined(EMU_C68K) && defined(EMU_M68K) -// cyclone debug mode +#ifdef EMU_CORE_DEBUG u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,}; int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0; extern unsigned int ppop; @@ -45,7 +41,7 @@ void log_io(unsigned int addr, int bits, int rw); #define log_io(...) #endif -#if defined(EMU_C68K) || defined(EMU_A68K) +#if defined(EMU_C68K) static __inline int PicoMemBase(u32 pc) { int membase=0; @@ -69,15 +65,11 @@ static __inline int PicoMemBase(u32 pc) #endif -#ifdef EMU_A68K -extern u8 *OP_ROM=NULL,*OP_RAM=NULL; -#endif - -static u32 CPU_CALL PicoCheckPc(u32 pc) +static u32 PicoCheckPc(u32 pc) { u32 ret=0; #if defined(EMU_C68K) - pc-=PicoCpu.membase; // Get real pc + pc-=PicoCpuCM68k.membase; // Get real pc // pc&=0xfffffe; pc&=~1; if ((pc<<8) == 0) @@ -86,15 +78,10 @@ static u32 CPU_CALL PicoCheckPc(u32 pc) return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off } - PicoCpu.membase=PicoMemBase(pc&0x00ffffff); - PicoCpu.membase-=pc&0xff000000; - - ret = PicoCpu.membase+pc; -#elif defined(EMU_A68K) - OP_ROM=(u8 *)PicoMemBase(pc); + PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff); + PicoCpuCM68k.membase-=pc&0xff000000; - // don't bother calling us back unless it's outside the 64k segment - M68000_regs.AsmBank=(pc>>16); + ret = PicoCpuCM68k.membase+pc; #endif return ret; } @@ -152,35 +139,59 @@ static u32 SRAMRead(u32 a) { unsigned int sreg = Pico.m.sram_reg; - if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM + if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM + elprintf(EL_SRAMIO, "normal sram detected."); Pico.m.sram_reg|=0x10; // should be normal SRAM } - if(sreg & 4) // EEPROM read + if (sreg & 4) // EEPROM read return SRAMReadEEPROM(); else // if(sreg & 1) // (sreg&5) is one of prerequisites return *(u8 *)(SRam.data-SRam.start+a); } +#ifndef _ASM_MEMORY_C +static +#endif +u32 SRAMRead16(u32 a) +{ + u32 d; + if (Pico.m.sram_reg & 4) { + d = SRAMReadEEPROM(); + d |= d << 8; + } else { + u8 *pm=(u8 *)(SRam.data-SRam.start+a); + d =*pm++ << 8; + d|=*pm++; + } + return d; +} + static void SRAMWrite(u32 a, u32 d) { - dprintf("sram_w: %06x, %08x @%06x", a&0xffffff, d, SekPc); unsigned int sreg = Pico.m.sram_reg; if(!(sreg & 0x10)) { // not detected SRAM if((a&~1)==0x200000) { - Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam) + elprintf(EL_SRAMIO, "eeprom detected."); + sreg|=4; // this should be a game with EEPROM (like NBA Jam) SRam.start=0x200000; SRam.end=SRam.start+1; - } - Pico.m.sram_reg|=0x10; + } else + elprintf(EL_SRAMIO, "normal sram detected."); + sreg|=0x10; + Pico.m.sram_reg=sreg; } if(sreg & 4) { // EEPROM write - if(SekCyclesDoneT()-lastSSRamWrite < 46) { + // this diff must be at most 16 for NBA Jam to work + if(SekCyclesDoneT()-lastSSRamWrite < 16) { // just update pending state + elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite); SRAMUpdPending(a, d); } else { + int old=sreg; SRAMWriteEEPROM(sreg>>6); // execute pending SRAMUpdPending(a, d); - lastSSRamWrite = SekCyclesDoneT(); + if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed + lastSSRamWrite = SekCyclesDoneT(); } } else if(!(sreg & 2)) { u8 *pm=(u8 *)(SRam.data-SRam.start+a); @@ -192,15 +203,10 @@ static void SRAMWrite(u32 a, u32 d) } // for nonstandard reads -#ifndef _ASM_MEMORY_C -static -#endif -u32 OtherRead16End(u32 a, int realsize) +static u32 OtherRead16End(u32 a, int realsize) { u32 d=0; - dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc); - // for games with simple protection devices, discovered by Haze // some dumb detection is used, but that should be enough to make things work if ((a>>22) == 1 && Pico.romsize >= 512*1024) { @@ -262,7 +268,7 @@ u32 OtherRead16End(u32 a, int realsize) } end: - dprintf("ret = %04x", d); + elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc); return d; } @@ -272,9 +278,8 @@ end: static void OtherWrite8End(u32 a,u32 d,int realsize) { // sram - //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone()); - //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT()); if(a >= SRam.start && a <= SRam.end) { + elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc); SRAMWrite(a, d); return; } @@ -288,13 +293,13 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) #else // sram access register if(a == 0xA130F1) { - dprintf("sram reg=%02x", d); + elprintf(EL_SRAMIO, "sram reg=%02x", d); Pico.m.sram_reg &= ~3; Pico.m.sram_reg |= (u8)(d&3); return; } #endif - dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); + elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); if(a >= 0xA13004 && a < 0xA13040) { // dumb 12-in-1 or 4-in-1 banking support @@ -312,7 +317,6 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) Pico.m.prot_bytes[(a>>2)&1] = (u8)d; } - #include "MemoryCmn.c" @@ -320,7 +324,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) // Read Rom and read Ram #ifndef _ASM_MEMORY_C -PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a) +PICO_INTERNAL_ASM u32 PicoRead8(u32 a) { u32 d=0; @@ -328,10 +332,11 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a) a&=0xffffff; -#if !(defined(EMU_C68K) && defined(EMU_M68K)) +#ifndef EMU_CORE_DEBUG // sram - if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { + if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { d = SRAMRead(a); + elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc); goto end; } #endif @@ -340,22 +345,15 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a) log_io(a, 8, 0); if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram - d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8; - - end: + if ((a&0xe700e0)==0xc00000) // VDP + d=PicoVideoRead(a); + else d=OtherRead16(a&~1, 8); + if ((a&1)==0) d>>=8; - //if ((a&0xe0ffff)==0xe0AE57+0x69c) - // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); - //if ((a&0xe0ffff)==0xe0a9ba+0x69c) - // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); - - //if(a==0x200001||a==0x200000) printf("r8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT()); - //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline); -#ifdef __debug_io - dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) - if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { +end: + elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); +#ifdef EMU_CORE_DEBUG + if (a>=Pico.romsize) { lastread_a = a; lastread_d[lrp_cyc++&15] = (u8)d; } @@ -363,7 +361,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a) return d; } -PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a) +PICO_INTERNAL_ASM u32 PicoRead16(u32 a) { u32 d=0; @@ -371,11 +369,11 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a) a&=0xfffffe; -#if !(defined(EMU_C68K) && defined(EMU_M68K)) +#ifndef EMU_CORE_DEBUG // sram - if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { - d = SRAMRead(a); - d |= d<<8; + if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { + d = SRAMRead16(a); + elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc); goto end; } #endif @@ -383,18 +381,14 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a) if (a=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { +end: + elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc); +#ifdef EMU_CORE_DEBUG + if (a>=Pico.romsize) { lastread_a = a; lastread_d[lrp_cyc++&15] = d; } @@ -402,7 +396,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a) return d; } -PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a) +PICO_INTERNAL_ASM u32 PicoRead32(u32 a) { u32 d=0; @@ -412,23 +406,22 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a) // sram if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { - d = (SRAMRead(a)<<16)|SRAMRead(a+2); - d |= d<<8; + d = (SRAMRead16(a)<<16)|SRAMRead16(a+2); + elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc); goto end; } if (a=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) { +end: + elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc); +#ifdef EMU_CORE_DEBUG + if (a>=Pico.romsize) { lastread_a = a; lastread_d[lrp_cyc++&15] = d; } @@ -440,18 +433,13 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a) // ----------------------------------------------------------------- // Write Ram -#ifndef _ASM_MEMORY_C -PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d) +#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS) +PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d) { -#ifdef __debug_io - dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) + elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); +#ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif - //if ((a&0xe0ffff)==0xe0a9ba+0x69c) - //if(a==0x200000||a==0x200001) printf("w8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT()); - // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram log_io(a, 8, 1); @@ -461,34 +449,27 @@ PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d) } #endif -void CPU_CALL PicoWrite16(u32 a,u16 d) +void PicoWrite16(u32 a,u16 d) { -#ifdef __debug_io - dprintf("w16: %06x, %04x", a&0xffffff, d); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) + elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d); +#ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif - //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c) - // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc); - //if(a==0x200000) printf("w16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT()); if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram log_io(a, 16, 1); a&=0xfffffe; + if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP OtherWrite16(a,d); } -static void CPU_CALL PicoWrite32(u32 a,u32 d) +static void PicoWrite32(u32 a,u32 d) { -#ifdef __debug_io - dprintf("w32: %06x, %08x", a&0xffffff, d); -#endif -#if defined(EMU_C68K) && defined(EMU_M68K) + elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d); +#ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif - //if(a==0x200000) printf("w32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT()); if ((a&0xe00000)==0xe00000) { @@ -500,61 +481,76 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d) log_io(a, 32, 1); a&=0xfffffe; + if ((a&0xe700e0)==0xc00000) + { + // VDP: + PicoVideoWrite(a, (u16)(d>>16)); + PicoVideoWrite(a+2,(u16)d); + return; + } + OtherWrite16(a, (u16)(d>>16)); OtherWrite16(a+2,(u16)d); } // ----------------------------------------------------------------- + +// TODO: asm code +static void OtherWrite16End(u32 a,u32 d,int realsize) +{ + PicoWrite8Hook(a, d>>8, realsize); + PicoWrite8Hook(a+1,d&0xff, realsize); +} + +u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End; +void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End; +void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End; + +PICO_INTERNAL void PicoMemResetHooks(void) +{ + // default unmapped/cart specific handlers + PicoRead16Hook = OtherRead16End; + PicoWrite8Hook = OtherWrite8End; + PicoWrite16Hook = OtherWrite16End; +} + PICO_INTERNAL void PicoMemSetup(void) { -#ifdef EMU_C68K // Setup memory callbacks: - PicoCpu.checkpc=PicoCheckPc; - PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8; - PicoCpu.fetch16=PicoCpu.read16=PicoRead16; - PicoCpu.fetch32=PicoCpu.read32=PicoRead32; - PicoCpu.write8 =PicoWrite8; - PicoCpu.write16=PicoWrite16; - PicoCpu.write32=PicoWrite32; +#ifdef EMU_C68K + PicoCpuCM68k.checkpc=PicoCheckPc; + PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8; + PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16; + PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32; + PicoCpuCM68k.write8 =PicoWrite8; + PicoCpuCM68k.write16=PicoWrite16; + PicoCpuCM68k.write32=PicoWrite32; +#endif +#ifdef EMU_F68K + PicoCpuFM68k.read_byte =PicoRead8; + PicoCpuFM68k.read_word =PicoRead16; + PicoCpuFM68k.read_long =PicoRead32; + PicoCpuFM68k.write_byte=PicoWrite8; + PicoCpuFM68k.write_word=PicoWrite16; + PicoCpuFM68k.write_long=PicoWrite32; + + // setup FAME fetchmap + { + int i; + // by default, point everything to fitst 64k of ROM + for (i = 0; i < M68K_FETCHBANK1; i++) + PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); + // now real ROM + for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++) + PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom; + // .. and RAM + for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++) + PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS)); + } #endif } -#ifdef EMU_A68K -struct A68KInter -{ - u32 unknown; - u8 (__fastcall *Read8) (u32 a); - u16 (__fastcall *Read16)(u32 a); - u32 (__fastcall *Read32)(u32 a); - void (__fastcall *Write8) (u32 a,u8 d); - void (__fastcall *Write16) (u32 a,u16 d); - void (__fastcall *Write32) (u32 a,u32 d); - void (__fastcall *ChangePc)(u32 a); - u8 (__fastcall *PcRel8) (u32 a); - u16 (__fastcall *PcRel16)(u32 a); - u32 (__fastcall *PcRel32)(u32 a); - u16 (__fastcall *Dir16)(u32 a); - u32 (__fastcall *Dir32)(u32 a); -}; - -struct A68KInter a68k_memory_intf= -{ - 0, - PicoRead8, - PicoRead16, - PicoRead32, - PicoWrite8, - PicoWrite16, - PicoWrite32, - PicoCheckPc, - PicoRead8, - PicoRead16, - PicoRead32, - PicoRead16, // unused - PicoRead32, // unused -}; -#endif #ifdef EMU_M68K unsigned int m68k_read_pcrelative_CD8 (unsigned int a); @@ -562,33 +558,36 @@ unsigned int m68k_read_pcrelative_CD16(unsigned int a); unsigned int m68k_read_pcrelative_CD32(unsigned int a); // these are allowed to access RAM -static unsigned int m68k_read_8 (unsigned int a, int do_fake) { +static unsigned int m68k_read_8 (unsigned int a, int do_fake) +{ a&=0xffffff; - if(PicoMCD&1) return m68k_read_pcrelative_CD8(a); - if(a>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if(PicoOpt&1) ret = (u8) YM2612Read(); - goto end; + if (PicoOpt&1) ret = (u8) YM2612Read(); + return ret; } if (a>=0x8000) { + extern u32 PicoReadM68k8(u32 a); u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; - ret = (u8) PicoRead8(addr68k); + if (PicoMCD & 1) + ret = PicoReadM68k8(addr68k); + else ret = PicoRead8(addr68k); elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret); - goto end; + return ret; } - // should not be needed || dprintf("z80_read RAM"); - if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; } + // should not be needed, cores should be able to access RAM themselves + if (a<0x4000) return Pico.zram[a&0x1fff]; elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret); - -end: return ret; } -PICO_INTERNAL unsigned short z80_read16(unsigned short a) -{ - //dprintf("z80_read16"); - - return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) ); -} - +#ifndef _USE_CZ80 PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a) +#else +PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data) +#endif { - //if (a<0x4000) - // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0)); - if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if(PicoOpt&1) emustatus|=YM2612Write(a, data); + if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1; return; } @@ -747,25 +742,33 @@ PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a) if (a>=0x8000) { + extern void PicoWriteM68k8(u32 a,u8 d); u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data); - PicoWrite8(addr68k, data); + if (PicoMCD & 1) + PicoWriteM68k8(addr68k, data); + else PicoWrite8(addr68k, data); return; } - // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr); + // should not be needed if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; } elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data); } -PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a) +#ifndef _USE_CZ80 +PICO_INTERNAL unsigned short z80_read16(unsigned short a) { - //dprintf("z80_write16"); + return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) ); +} +PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a) +{ z80_write((unsigned char) data,a); z80_write((unsigned char)(data>>8),(u16)(a+1)); } +#endif