X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FMemory.c;h=88e3a3220edf77b5b526996edd773b203b6ea33d;hb=52250671ae14d00dfcb52d137f73c9b565493279;hp=ca92e814d41bb362e47914b48beaaf1df0d68559;hpb=b5e5172d049a83251874fb33e65a53c9654dc0bc;p=picodrive.git diff --git a/Pico/Memory.c b/Pico/Memory.c index ca92e81..88e3a32 100644 --- a/Pico/Memory.c +++ b/Pico/Memory.c @@ -1,14 +1,12 @@ // This is part of Pico Library // (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006 notaz, All rights reserved. +// (c) Copyright 2006,2007 notaz, All rights reserved. // Free for non-commercial use. // For commercial use, separate licencing terms must be obtained. -//#define __debug_io - #include "PicoInt.h" #include "sound/ym2612.h" @@ -39,6 +37,8 @@ extern unsigned int ppop; #ifdef IO_STATS void log_io(unsigned int addr, int bits, int rw); +#elif defined(_MSC_VER) +#define log_io #else #define log_io(...) #endif @@ -67,7 +67,7 @@ static __inline int PicoMemBase(u32 pc) #endif -static u32 PicoCheckPc(u32 pc) +PICO_INTERNAL u32 PicoCheckPc(u32 pc) { u32 ret=0; #if defined(EMU_C68K) @@ -112,7 +112,8 @@ int PadRead(int i) // orr the bits, which are set as output value = data_reg&(Pico.ioports[i+4]|0x80); - if(PicoOpt & 0x20) { // 6 button gamepad enabled + if (PicoOpt & POPT_6BTN_PAD) + { int phase = Pico.m.padTHPhase[i]; if(phase == 2 && !(data_reg&0x40)) { // TH @@ -141,16 +142,33 @@ static u32 SRAMRead(u32 a) { unsigned int sreg = Pico.m.sram_reg; - if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM + if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM elprintf(EL_SRAMIO, "normal sram detected."); Pico.m.sram_reg|=0x10; // should be normal SRAM } - if(sreg & 4) // EEPROM read + if (sreg & 4) // EEPROM read return SRAMReadEEPROM(); else // if(sreg & 1) // (sreg&5) is one of prerequisites return *(u8 *)(SRam.data-SRam.start+a); } +#ifndef _ASM_MEMORY_C +static +#endif +u32 SRAMRead16(u32 a) +{ + u32 d; + if (Pico.m.sram_reg & 4) { + d = SRAMReadEEPROM(); + d |= d << 8; + } else { + u8 *pm=(u8 *)(SRam.data-SRam.start+a); + d =*pm++ << 8; + d|=*pm++; + } + return d; +} + static void SRAMWrite(u32 a, u32 d) { unsigned int sreg = Pico.m.sram_reg; @@ -188,13 +206,18 @@ static void SRAMWrite(u32 a, u32 d) } // for nonstandard reads -#ifndef _ASM_MEMORY_C -static -#endif -u32 OtherRead16End(u32 a, int realsize) +static u32 OtherRead16End(u32 a, int realsize) { u32 d=0; + // 32x test +/* + if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA + else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS + else if (a == 0xa15100) { d = 0x0080; goto end; } + else +*/ + // for games with simple protection devices, discovered by Haze // some dumb detection is used, but that should be enough to make things work if ((a>>22) == 1 && Pico.romsize >= 512*1024) { @@ -289,23 +312,11 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) #endif elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); - if(a >= 0xA13004 && a < 0xA13040) { - // dumb 12-in-1 or 4-in-1 banking support - int len; - a &= 0x3f; a <<= 16; - len = Pico.romsize - a; - if (len <= 0) return; // invalid/missing bank - if (len > 0x200000) len = 0x200000; // 2 megs - memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe. - return; - } - // for games with simple protection devices, discovered by Haze - else if ((a>>22) == 1) + if ((a>>22) == 1) Pico.m.prot_bytes[(a>>2)&1] = (u8)d; } - #include "MemoryCmn.c" @@ -334,12 +345,13 @@ PICO_INTERNAL_ASM u32 PicoRead8(u32 a) log_io(a, 8, 0); if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram - d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8; + if ((a&0xe700e0)==0xc00000) // VDP + d=PicoVideoRead(a); + else d=OtherRead16(a&~1, 8); + if ((a&1)==0) d>>=8; end: -#ifdef __debug_io - dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); -#endif + elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); #ifdef EMU_CORE_DEBUG if (a>=Pico.romsize) { lastread_a = a; @@ -360,8 +372,7 @@ PICO_INTERNAL_ASM u32 PicoRead16(u32 a) #ifndef EMU_CORE_DEBUG // sram if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { - d = SRAMRead(a); - d |= d<<8; + d = SRAMRead16(a); elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc); goto end; } @@ -370,12 +381,12 @@ PICO_INTERNAL_ASM u32 PicoRead16(u32 a) if (a=Pico.romsize) { lastread_a = a; @@ -395,8 +406,7 @@ PICO_INTERNAL_ASM u32 PicoRead32(u32 a) // sram if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { - d = (SRAMRead(a)<<16)|SRAMRead(a+2); - d |= d<<8; + d = (SRAMRead16(a)<<16)|SRAMRead16(a+2); elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc); goto end; } @@ -404,12 +414,12 @@ PICO_INTERNAL_ASM u32 PicoRead32(u32 a) if (a=Pico.romsize) { lastread_a = a; @@ -426,9 +436,7 @@ end: #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS) PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d) { -#ifdef __debug_io - dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); -#endif + elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); #ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif @@ -443,9 +451,7 @@ PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d) void PicoWrite16(u32 a,u16 d) { -#ifdef __debug_io - dprintf("w16: %06x, %04x", a&0xffffff, d); -#endif + elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d); #ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif @@ -454,14 +460,13 @@ void PicoWrite16(u32 a,u16 d) log_io(a, 16, 1); a&=0xfffffe; + if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP OtherWrite16(a,d); } static void PicoWrite32(u32 a,u32 d) { -#ifdef __debug_io - dprintf("w32: %06x, %08x", a&0xffffff, d); -#endif + elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d); #ifdef EMU_CORE_DEBUG lastwrite_cyc_d[lwp_cyc++&15] = d; #endif @@ -476,12 +481,43 @@ static void PicoWrite32(u32 a,u32 d) log_io(a, 32, 1); a&=0xfffffe; + if ((a&0xe700e0)==0xc00000) + { + // VDP: + PicoVideoWrite(a, (u16)(d>>16)); + PicoVideoWrite(a+2,(u16)d); + return; + } + OtherWrite16(a, (u16)(d>>16)); OtherWrite16(a+2,(u16)d); } // ----------------------------------------------------------------- + +static void OtherWrite16End(u32 a,u32 d,int realsize) +{ + PicoWrite8Hook(a, d>>8, realsize); + PicoWrite8Hook(a+1,d&0xff, realsize); +} + +u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End; +void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End; +void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End; + +PICO_INTERNAL void PicoMemResetHooks(void) +{ + // default unmapped/cart specific handlers + PicoRead16Hook = OtherRead16End; + PicoWrite8Hook = OtherWrite8End; + PicoWrite16Hook = OtherWrite16End; +} + +#ifdef EMU_M68K +static void m68k_mem_setup(void); +#endif + PICO_INTERNAL void PicoMemSetup(void) { // Setup memory callbacks: @@ -505,7 +541,7 @@ PICO_INTERNAL void PicoMemSetup(void) // setup FAME fetchmap { int i; - // by default, point everything to fitst 64k of ROM + // by default, point everything to first 64k of ROM for (i = 0; i < M68K_FETCHBANK1; i++) PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); // now real ROM @@ -516,15 +552,24 @@ PICO_INTERNAL void PicoMemSetup(void) PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS)); } #endif +#ifdef EMU_M68K + m68k_mem_setup(); +#endif } - +/* some nasty things below :( */ #ifdef EMU_M68K -unsigned int m68k_read_pcrelative_CD8 (unsigned int a); -unsigned int m68k_read_pcrelative_CD16(unsigned int a); -unsigned int m68k_read_pcrelative_CD32(unsigned int a); - -// these are allowed to access RAM +unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL; +void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL; +void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL; +void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL; +unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL; +unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL; + +// these are here for core debugging mode static unsigned int m68k_read_8 (unsigned int a, int do_fake) { a&=0xffffff; @@ -532,9 +577,7 @@ static unsigned int m68k_read_8 (unsigned int a, int do_fake) #ifdef EMU_CORE_DEBUG if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15]; #endif - if(PicoMCD&1) return m68k_read_pcrelative_CD8(a); - if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram - return 0; + return pm68k_read_memory_pcr_8(a); } static unsigned int m68k_read_16(unsigned int a, int do_fake) { @@ -543,9 +586,7 @@ static unsigned int m68k_read_16(unsigned int a, int do_fake) #ifdef EMU_CORE_DEBUG if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15]; #endif - if(PicoMCD&1) return m68k_read_pcrelative_CD16(a); - if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram - return 0; + return pm68k_read_memory_pcr_16(a); } static unsigned int m68k_read_32(unsigned int a, int do_fake) { @@ -554,9 +595,7 @@ static unsigned int m68k_read_32(unsigned int a, int do_fake) #ifdef EMU_CORE_DEBUG if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15]; #endif - if(PicoMCD&1) return m68k_read_pcrelative_CD32(a); - if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram - return 0; + return pm68k_read_memory_pcr_32(a); } unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); } @@ -568,6 +607,24 @@ unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); } unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); } +static unsigned int m68k_read_memory_pcr_8(unsigned int a) +{ + if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram + return 0; +} + +static unsigned int m68k_read_memory_pcr_16(unsigned int a) +{ + if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram + return 0; +} + +static unsigned int m68k_read_memory_pcr_32(unsigned int a) +{ + if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram + return 0; +} + #ifdef EMU_CORE_DEBUG // ROM only unsigned int m68k_read_memory_8(unsigned int a) @@ -576,9 +633,7 @@ unsigned int m68k_read_memory_8(unsigned int a) if (a= 228) + z80_scanline++, z80_scanline_cycles += 228; + return z80_scanline; + } + + if (Pico.m.scanline != -1) + return Pico.m.scanline; + + return vcounts[SekCyclesDone()>>8]; } -unsigned int m68k_read_memory_32(unsigned int address) +/* probably not should be in this file, but it's near related code here */ +void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new) { - return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address); + int xcycles = z80_cycles << 8; + + /* check for overflows */ + if ((mode_old & 4) && xcycles > timer_a_next_oflow) + ym2612.OPN.ST.status |= 1; + + if ((mode_old & 8) && xcycles > timer_b_next_oflow) + ym2612.OPN.ST.status |= 2; + + /* update timer a */ + if (mode_old & 1) + while (xcycles > timer_a_next_oflow) + timer_a_next_oflow += timer_a_step; + + if ((mode_old ^ mode_new) & 1) // turning on/off + { + if (mode_old & 1) { + timer_a_offset = timer_a_next_oflow - xcycles; + timer_a_next_oflow = TIMER_NO_OFLOW; + } + else + timer_a_next_oflow = xcycles + timer_a_offset; + } + if (mode_new & 1) + elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles); + + /* update timer b */ + if (mode_old & 2) + while (xcycles > timer_b_next_oflow) + timer_b_next_oflow += timer_b_step; + + if ((mode_old ^ mode_new) & 2) + { + if (mode_old & 2) { + timer_b_offset = timer_b_next_oflow - xcycles; + timer_b_next_oflow = TIMER_NO_OFLOW; + } + else + timer_b_next_oflow = xcycles + timer_b_offset; + } + if (mode_new & 2) + elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles); +} + +// ym2612 DAC and timer I/O handlers for z80 +int ym2612_write_local(u32 a, u32 d, int is_from_z80) +{ + int addr; + + a &= 3; + if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */ + { + int scanline = get_scanline(is_from_z80); + //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80); + ym2612.dacout = ((int)d - 0x80) << 6; + if (PsndOut && ym2612.dacen && scanline >= PsndDacLine) + PsndDoDAC(scanline); + return 0; + } + + switch (a) + { + case 0: /* address port 0 */ + ym2612.OPN.ST.address = d; + ym2612.addr_A1 = 0; +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1); +#endif + return 0; + + case 1: /* data port 0 */ + if (ym2612.addr_A1 != 0) + return 0; + + addr = ym2612.OPN.ST.address; + ym2612.REGS[addr] = d; + + switch (addr) + { + case 0x24: // timer A High 8 + case 0x25: { // timer A Low 2 + int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2)) + : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3)); + if (ym2612.OPN.ST.TA != TAnew) + { + //elprintf(EL_STATUS, "timer a set %i", TAnew); + ym2612.OPN.ST.TA = TAnew; + //ym2612.OPN.ST.TAC = (1024-TAnew)*18; + //ym2612.OPN.ST.TAT = 0; + timer_a_step = timer_a_offset = TIMER_A_TICK_ZCYCLES * (1024 - TAnew); + if (ym2612.OPN.ST.mode & 1) { + int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone()); + timer_a_next_oflow = (cycles << 8) + timer_a_step; + } + elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8); + } + return 0; + } + case 0x26: // timer B + if (ym2612.OPN.ST.TB != d) { + //elprintf(EL_STATUS, "timer b set %i", d); + ym2612.OPN.ST.TB = d; + //ym2612.OPN.ST.TBC = (256-d) * 288; + //ym2612.OPN.ST.TBT = 0; + timer_b_step = timer_b_offset = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800 + if (ym2612.OPN.ST.mode & 2) { + int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone()); + timer_b_next_oflow = (cycles << 8) + timer_b_step; + } + elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8); + } + return 0; + case 0x27: { /* mode, timer control */ + int old_mode = ym2612.OPN.ST.mode; + int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone()); + ym2612.OPN.ST.mode = d; + + elprintf(EL_YMTIMER, "st mode %02x", d); + ym2612_sync_timers(cycles, old_mode, d); + + /* reset Timer a flag */ + if (d & 0x10) + ym2612.OPN.ST.status &= ~1; + + /* reset Timer b flag */ + if (d & 0x20) + ym2612.OPN.ST.status &= ~2; + + if ((d ^ old_mode) & 0xc0) { +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80)); +#endif + return 1; + } + return 0; + } + case 0x2b: { /* DAC Sel (YM2612) */ + int scanline = get_scanline(is_from_z80); + ym2612.dacen = d & 0x80; + if (d & 0x80) PsndDacLine = scanline; +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline); +#endif + return 0; + } + } + break; + + case 2: /* address port 1 */ + ym2612.OPN.ST.address = d; + ym2612.addr_A1 = 1; +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1); +#endif + return 0; + + case 3: /* data port 1 */ + if (ym2612.addr_A1 != 1) + return 0; + + addr = ym2612.OPN.ST.address | 0x100; + ym2612.REGS[addr] = d; + break; + } + +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) + return YM2612Write_940(a, d, get_scanline(is_from_z80)); +#endif + return YM2612Write_(a, d); } -void m68k_write_memory_8(unsigned int address, unsigned int value) + +#define ym2612_read_local() \ + if (xcycles >= timer_a_next_oflow) \ + ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \ + if (xcycles >= timer_b_next_oflow) \ + ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2 + +u32 ym2612_read_local_z80(void) { - if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value); + int xcycles = z80_cyclesDone() << 8; + + ym2612_read_local(); + + elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status, + timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228); + return ym2612.OPN.ST.status; } -void m68k_write_memory_16(unsigned int address, unsigned int value) +u32 ym2612_read_local_68k(void) { - if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value); + int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8; + + ym2612_read_local(); + + elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status, + timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228); + return ym2612.OPN.ST.status; } -void m68k_write_memory_32(unsigned int address, unsigned int value) +void ym2612_pack_state(void) { - if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value); + // timers are saved as tick counts, in 16.16 int format + int tac, tat = 0, tbc, tbt = 0; + tac = 1024 - ym2612.OPN.ST.TA; + tbc = 256 - ym2612.OPN.ST.TB; + if (timer_a_next_oflow != TIMER_NO_OFLOW) + tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536); + if (timer_b_next_oflow != TIMER_NO_OFLOW) + tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536); + elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac); + elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc); + +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) + YM2612PicoStateSave2_940(tat, tbt); + else +#endif + YM2612PicoStateSave2(tat, tbt); } + +void ym2612_unpack_state(void) +{ + int i, ret, tac, tat, tbc, tbt; + YM2612PicoStateLoad(); + + // feed all the registers and update internal state + for (i = 0x20; i < 0xA0; i++) { + ym2612_write_local(0, i, 0); + ym2612_write_local(1, ym2612.REGS[i], 0); + } + for (i = 0x30; i < 0xA0; i++) { + ym2612_write_local(2, i, 0); + ym2612_write_local(3, ym2612.REGS[i|0x100], 0); + } + for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards + ym2612_write_local(2, i, 0); + ym2612_write_local(3, ym2612.REGS[i|0x100], 0); + ym2612_write_local(0, i, 0); + ym2612_write_local(1, ym2612.REGS[i], 0); + } + for (i = 0xB0; i < 0xB8; i++) { + ym2612_write_local(0, i, 0); + ym2612_write_local(1, ym2612.REGS[i], 0); + ym2612_write_local(2, i, 0); + ym2612_write_local(3, ym2612.REGS[i|0x100], 0); + } + +#ifdef __GP2X__ + if (PicoOpt & POPT_EXT_FM) + ret = YM2612PicoStateLoad2_940(&tat, &tbt); + else #endif -#endif // EMU_M68K + ret = YM2612PicoStateLoad2(&tat, &tbt); + if (ret != 0) { + elprintf(EL_STATUS, "old ym2612 state"); + return; // no saved timers + } + tac = (1024 - ym2612.OPN.ST.TA) << 16; + tbc = (256 - ym2612.OPN.ST.TB) << 16; + if (ym2612.OPN.ST.mode & 1) + timer_a_next_oflow = (double)(tac - tat) / (double)tac * timer_a_step; + else + timer_a_next_oflow = TIMER_NO_OFLOW; + if (ym2612.OPN.ST.mode & 2) + timer_b_next_oflow = (double)(tbc - tbt) / (double)tbc * timer_b_step; + else + timer_b_next_oflow = TIMER_NO_OFLOW; + elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8); + elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8); +} // ----------------------------------------------------------------- // z80 memhandlers @@ -660,31 +990,31 @@ PICO_INTERNAL unsigned char z80_read(unsigned short a) { u8 ret = 0; -#ifndef _USE_DRZ80 - if (a<0x4000) return Pico.zram[a&0x1fff]; -#endif - if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if (PicoOpt&1) ret = (u8) YM2612Read(); + if (PicoOpt&POPT_EN_FM) ret = ym2612_read_local_z80(); return ret; } if (a>=0x8000) { + extern u32 PicoReadM68k8(u32 a); u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; - ret = (u8) PicoRead8(addr68k); + if (addr68k < Pico.romsize) { ret = Pico.rom[addr68k^1]; goto bnkend; } + elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret); + if (PicoAHW & PAHW_MCD) + ret = PicoReadM68k8(addr68k); + else ret = PicoRead8(addr68k); +bnkend: elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret); return ret; } -#ifdef _USE_DRZ80 - // should not be needed || dprintf("z80_read RAM"); + // should not be needed, cores should be able to access RAM themselves if (a<0x4000) return Pico.zram[a&0x1fff]; -#endif elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret); return ret; @@ -696,19 +1026,15 @@ PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a) PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data) #endif { -#ifndef _USE_DRZ80 - if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; } -#endif - if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1; + if(PicoOpt&POPT_EN_FM) emustatus|=ym2612_write_local(a, data, 1) & 1; return; } if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17 { - if(PicoOpt&2) SN76496Write(data); + if(PicoOpt&POPT_EN_PSG) SN76496Write(data); return; } @@ -722,18 +1048,19 @@ PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data) if (a>=0x8000) { + extern void PicoWriteM68k8(u32 a,u8 d); u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data); - PicoWrite8(addr68k, data); + if (PicoAHW & PAHW_MCD) + PicoWriteM68k8(addr68k, data); + else PicoWrite8(addr68k, data); return; } -#ifdef _USE_DRZ80 - // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr); + // should not be needed if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; } -#endif elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data); }