X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FMemory.c;h=963d30b7761bae0d6af5d82833b4240a7eea7e98;hb=3aa1e148a28da9b4e10e824984f7b3a4908b1ace;hp=dc9c7386404bb0b8b0c54ad33a8b4e3d4d77d990;hpb=fb9bec948efc6c7edca8f5463bc0c3522f96c165;p=picodrive.git

diff --git a/Pico/Memory.c b/Pico/Memory.c
index dc9c738..963d30b 100644
--- a/Pico/Memory.c
+++ b/Pico/Memory.c
@@ -45,7 +45,7 @@ void log_io(unsigned int addr, int bits, int rw);
 #define log_io(...)
 #endif
 
-#if defined(EMU_C68K) || defined(EMU_A68K)
+#if defined(EMU_C68K)
 static __inline int PicoMemBase(u32 pc)
 {
   int membase=0;
@@ -69,29 +69,23 @@ static __inline int PicoMemBase(u32 pc)
 #endif
 
 
-#ifdef EMU_A68K
-extern u8 *OP_ROM=NULL,*OP_RAM=NULL;
-#endif
-
 static u32 CPU_CALL PicoCheckPc(u32 pc)
 {
   u32 ret=0;
 #if defined(EMU_C68K)
-  pc-=PicoCpu.membase; // Get real pc
+  pc-=PicoCpuCM68k.membase; // Get real pc
 //  pc&=0xfffffe;
   pc&=~1;
   if ((pc<<8) == 0)
+  {
+    printf("%i:%03i: game crash detected @ %06x\n", Pico.m.frame_count, Pico.m.scanline, SekPc);
     return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off
+  }
 
-  PicoCpu.membase=PicoMemBase(pc&0x00ffffff);
-  PicoCpu.membase-=pc&0xff000000;
-
-  ret = PicoCpu.membase+pc;
-#elif defined(EMU_A68K)
-  OP_ROM=(u8 *)PicoMemBase(pc);
+  PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);
+  PicoCpuCM68k.membase-=pc&0xff000000;
 
-  // don't bother calling us back unless it's outside the 64k segment
-  M68000_regs.AsmBank=(pc>>16);
+  ret = PicoCpuCM68k.membase+pc;
 #endif
   return ret;
 }
@@ -144,14 +138,56 @@ int PadRead(int i)
 
 
 #ifndef _ASM_MEMORY_C
-// address must already be checked
-static int SRAMRead(u32 a)
+static
+#endif
+u32 SRAMRead(u32 a)
 {
-  u8 *d = SRam.data-SRam.start+a;
-  return (d[0]<<8)|d[1];
+  unsigned int sreg = Pico.m.sram_reg;
+  if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
+    elprintf(EL_SRAMIO, "normal sram detected.");
+    Pico.m.sram_reg|=0x10; // should be normal SRAM
+  }
+  if(sreg & 4) // EEPROM read
+    return SRAMReadEEPROM();
+  else // if(sreg & 1) // (sreg&5) is one of prerequisites
+    return *(u8 *)(SRam.data-SRam.start+a);
 }
-#endif
 
+static void SRAMWrite(u32 a, u32 d)
+{
+  unsigned int sreg = Pico.m.sram_reg;
+  if(!(sreg & 0x10)) {
+    // not detected SRAM
+    if((a&~1)==0x200000) {
+      elprintf(EL_SRAMIO, "eeprom detected.");
+      sreg|=4; // this should be a game with EEPROM (like NBA Jam)
+      SRam.start=0x200000; SRam.end=SRam.start+1;
+    } else
+      elprintf(EL_SRAMIO, "normal sram detected.");
+    sreg|=0x10;
+    Pico.m.sram_reg=sreg;
+  }
+  if(sreg & 4) { // EEPROM write
+    // this diff must be at most 16 for NBA Jam to work
+    if(SekCyclesDoneT()-lastSSRamWrite < 16) {
+      // just update pending state
+      elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);
+      SRAMUpdPending(a, d);
+    } else {
+      int old=sreg;
+      SRAMWriteEEPROM(sreg>>6); // execute pending
+      SRAMUpdPending(a, d);
+      if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed
+        lastSSRamWrite = SekCyclesDoneT();
+    }
+  } else if(!(sreg & 2)) {
+    u8 *pm=(u8 *)(SRam.data-SRam.start+a);
+    if(*pm != (u8)d) {
+      SRam.changed = 1;
+      *pm=(u8)d;
+    }
+  }
+}
 
 // for nonstandard reads
 #ifndef _ASM_MEMORY_C
@@ -161,8 +197,6 @@ u32 OtherRead16End(u32 a, int realsize)
 {
   u32 d=0;
 
-  dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);
-
   // for games with simple protection devices, discovered by Haze
   // some dumb detection is used, but that should be enough to make things work
   if ((a>>22) == 1 && Pico.romsize >= 512*1024) {
@@ -224,7 +258,7 @@ u32 OtherRead16End(u32 a, int realsize)
   }
 
 end:
-  dprintf("ret = %04x", d);
+  elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
   return d;
 }
 
@@ -234,35 +268,9 @@ end:
 static void OtherWrite8End(u32 a,u32 d,int realsize)
 {
   // sram
-  //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());
-  //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());
   if(a >= SRam.start && a <= SRam.end) {
-    dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
-    unsigned int sreg = Pico.m.sram_reg;
-    if(!(sreg & 0x10)) {
-      // not detected SRAM
-      if((a&~1)==0x200000) {
-        Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)
-        SRam.start=0x200000; SRam.end=SRam.start+1;
-      }
-      Pico.m.sram_reg|=0x10;
-    }
-    if(sreg & 4) { // EEPROM write
-      if(SekCyclesDoneT()-lastSSRamWrite < 46) {
-        // just update pending state
-        SRAMUpdPending(a, d);
-      } else {
-        SRAMWriteEEPROM(sreg>>6); // execute pending
-        SRAMUpdPending(a, d);
-        lastSSRamWrite = SekCyclesDoneT();
-      }
-    } else if(!(sreg & 2)) {
-      u8 *pm=(u8 *)(SRam.data-SRam.start+a);
-      if(*pm != (u8)d) {
-        SRam.changed = 1;
-        *pm=(u8)d;
-      }
-    }
+    elprintf(EL_SRAMIO, "sram w8  [%06x] %02x @ %06x", a, d, SekPc);
+    SRAMWrite(a, d);
     return;
   }
 
@@ -275,13 +283,13 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
 #else
   // sram access register
   if(a == 0xA130F1) {
-    dprintf("sram reg=%02x", d);
+    elprintf(EL_SRAMIO, "sram reg=%02x", d);
     Pico.m.sram_reg &= ~3;
     Pico.m.sram_reg |= (u8)(d&3);
     return;
   }
 #endif
-  dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
+  elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
 
   if(a >= 0xA13004 && a < 0xA13040) {
     // dumb 12-in-1 or 4-in-1 banking support
@@ -317,18 +325,10 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
 
 #if !(defined(EMU_C68K) && defined(EMU_M68K))
   // sram
-  if(a >= SRam.start && a <= SRam.end) {
-    unsigned int sreg = Pico.m.sram_reg;
-    if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
-      Pico.m.sram_reg|=0x10; // should be normal SRAM
-    }
-    if(sreg & 4) { // EEPROM read
-      d = SRAMReadEEPROM();
-      goto end;
-    } else if(sreg & 1) {
-      d = *(u8 *)(SRam.data-SRam.start+a);
-      goto end;
-    }
+  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
+    d = SRAMRead(a);
+    elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
+    goto end;
   }
 #endif
 
@@ -338,15 +338,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
 
   d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;
 
-  end:
-
-  //if ((a&0xe0ffff)==0xe0AE57+0x69c)
-  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);
-  //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
-  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);
-
-  //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());
-  //dprintf("r8 : %06x,   %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);
+end:
 #ifdef __debug_io
   dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);
 #endif
@@ -369,8 +361,10 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
 
 #if !(defined(EMU_C68K) && defined(EMU_M68K))
   // sram
-  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {
+  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
     d = SRAMRead(a);
+    d |= d<<8;
+    elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
     goto end;
   }
 #endif
@@ -380,10 +374,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
 
   d = OtherRead16(a, 16);
 
-  end:
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)
-  //  dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
-
+end:
 #ifdef __debug_io
   dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
 #endif
@@ -405,8 +396,10 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
   a&=0xfffffe;
 
   // sram
-  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {
+  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
     d = (SRAMRead(a)<<16)|SRAMRead(a+2);
+    d |= d<<8;
+    elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);
     goto end;
   }
 
@@ -415,7 +408,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
 
   d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
 
-  end:
+end:
 #ifdef __debug_io
   dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
 #endif
@@ -442,6 +435,7 @@ PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)
   lastwrite_cyc_d[lwp_cyc++&15] = d;
 #endif
   //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
+  //if(a==0x200000||a==0x200001) printf("w8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());
   //  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);
 
   if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram
@@ -460,8 +454,6 @@ void CPU_CALL PicoWrite16(u32 a,u16 d)
 #if defined(EMU_C68K) && defined(EMU_M68K)
   lastwrite_cyc_d[lwp_cyc++&15] = d;
 #endif
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)
-  //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
 
   if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram
   log_io(a, 16, 1);
@@ -497,53 +489,40 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d)
 // -----------------------------------------------------------------
 PICO_INTERNAL void PicoMemSetup(void)
 {
-#ifdef EMU_C68K
   // Setup memory callbacks:
-  PicoCpu.checkpc=PicoCheckPc;
-  PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;
-  PicoCpu.fetch16=PicoCpu.read16=PicoRead16;
-  PicoCpu.fetch32=PicoCpu.read32=PicoRead32;
-  PicoCpu.write8 =PicoWrite8;
-  PicoCpu.write16=PicoWrite16;
-  PicoCpu.write32=PicoWrite32;
+#ifdef EMU_C68K
+  PicoCpuCM68k.checkpc=PicoCheckPc;
+  PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;
+  PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;
+  PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;
+  PicoCpuCM68k.write8 =PicoWrite8;
+  PicoCpuCM68k.write16=PicoWrite16;
+  PicoCpuCM68k.write32=PicoWrite32;
+#endif
+#ifdef EMU_F68K
+  PicoCpuFM68k.read_byte =PicoRead8;
+  PicoCpuFM68k.read_word =PicoRead16;
+  PicoCpuFM68k.read_long =PicoRead32;
+  PicoCpuFM68k.write_byte=PicoWrite8;
+  PicoCpuFM68k.write_word=PicoWrite16;
+  PicoCpuFM68k.write_long=PicoWrite32;
+
+  // setup FAME fetchmap
+  {
+    int i;
+    // by default, point everything to fitst 64k of ROM
+    for (i = 0; i < M68K_FETCHBANK1; i++)
+      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
+    // now real ROM
+    for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
+      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
+    // .. and RAM
+    for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
+      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
+  }
 #endif
 }
 
-#ifdef EMU_A68K
-struct A68KInter
-{
-  u32 unknown;
-  u8  (__fastcall *Read8) (u32 a);
-  u16 (__fastcall *Read16)(u32 a);
-  u32 (__fastcall *Read32)(u32 a);
-  void (__fastcall *Write8)  (u32 a,u8 d);
-  void (__fastcall *Write16) (u32 a,u16 d);
-  void (__fastcall *Write32) (u32 a,u32 d);
-  void (__fastcall *ChangePc)(u32 a);
-  u8  (__fastcall *PcRel8) (u32 a);
-  u16 (__fastcall *PcRel16)(u32 a);
-  u32 (__fastcall *PcRel32)(u32 a);
-  u16 (__fastcall *Dir16)(u32 a);
-  u32 (__fastcall *Dir32)(u32 a);
-};
-
-struct A68KInter a68k_memory_intf=
-{
-  0,
-  PicoRead8,
-  PicoRead16,
-  PicoRead32,
-  PicoWrite8,
-  PicoWrite16,
-  PicoWrite32,
-  PicoCheckPc,
-  PicoRead8,
-  PicoRead16,
-  PicoRead32,
-  PicoRead16, // unused
-  PicoRead32, // unused
-};
-#endif
 
 #ifdef EMU_M68K
 unsigned int  m68k_read_pcrelative_CD8 (unsigned int a);
@@ -636,14 +615,17 @@ void PicoWriteCD8w (unsigned int a, unsigned char d);
 void PicoWriteCD16w(unsigned int a, unsigned short d);
 void PicoWriteCD32w(unsigned int a, unsigned int d);
 
+/* it appears that Musashi doesn't always mask the unused bits */
 unsigned int  m68k_read_memory_8(unsigned int address)
 {
-    return (PicoMCD&1) ? PicoReadCD8w(address)  : PicoRead8(address);
+    unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);
+    return d&0xff;
 }
 
 unsigned int  m68k_read_memory_16(unsigned int address)
 {
-    return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);
+    unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);
+    return d&0xffff;
 }
 
 unsigned int  m68k_read_memory_32(unsigned int address)
@@ -689,13 +671,15 @@ PICO_INTERNAL unsigned char z80_read(unsigned short a)
     addr68k+=a&0x7fff;
 
     ret = (u8) PicoRead8(addr68k);
-    //dprintf("z80->68k w8 : %06x,   %02x", addr68k, ret);
+    elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
     goto end;
   }
 
   // should not be needed || dprintf("z80_read RAM");
   if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }
 
+  elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);
+
 end:
   return ret;
 }
@@ -714,7 +698,7 @@ PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)
 
   if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)
   {
-    if(PicoOpt&1) emustatus|=YM2612Write(a, data);
+    if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;
     return;
   }
 
@@ -737,13 +721,15 @@ PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)
     u32 addr68k;
     addr68k=Pico.m.z80_bank68k<<15;
     addr68k+=a&0x7fff;
+    elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
     PicoWrite8(addr68k, data);
-    //dprintf("z80->68k w8 : %06x,   %02x", addr68k, data);
     return;
   }
 
   // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);
   if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }
+
+  elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
 }
 
 PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)