X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FMemory.c;h=b0aa7afa2806ff637164b2e92d75c425ec8959e5;hb=70357ce52578dee0dd3b3663902cf872c3d34258;hp=48f1fedb1430eb723ab5491a982a1800209db15d;hpb=2d0b15bb2c532cacdbc8fcecb915177b1bd5f2af;p=picodrive.git diff --git a/Pico/Memory.c b/Pico/Memory.c index 48f1fed..b0aa7af 100644 --- a/Pico/Memory.c +++ b/Pico/Memory.c @@ -11,19 +11,22 @@ #include "PicoInt.h" -#include "sound/sound.h" #include "sound/ym2612.h" #include "sound/sn76496.h" +#ifndef UTYPES_DEFINED typedef unsigned char u8; typedef unsigned short u16; typedef unsigned int u32; +#define UTYPES_DEFINED +#endif extern unsigned int lastSSRamWrite; // used by serial SRAM code #ifdef _ASM_MEMORY_C -u8 PicoRead8(u32 a); -u16 PicoRead16(u32 a); +u32 PicoRead8(u32 a); +u32 PicoRead16(u32 a); +void PicoWrite8(u32 a,u8 d); void PicoWriteRomHW_SSF2(u32 a,u32 d); void PicoWriteRomHW_in1 (u32 a,u32 d); #endif @@ -36,7 +39,13 @@ int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0; extern unsigned int ppop; #endif -#if defined(EMU_C68K) || defined(EMU_A68K) +#ifdef IO_STATS +void log_io(unsigned int addr, int bits, int rw); +#else +#define log_io(...) +#endif + +#if defined(EMU_C68K) static __inline int PicoMemBase(u32 pc) { int membase=0; @@ -60,55 +69,125 @@ static __inline int PicoMemBase(u32 pc) #endif -#ifdef EMU_A68K -extern u8 *OP_ROM=NULL,*OP_RAM=NULL; -#endif - static u32 CPU_CALL PicoCheckPc(u32 pc) { u32 ret=0; #if defined(EMU_C68K) pc-=PicoCpu.membase; // Get real pc - pc&=0xfffffe; - if (pc == 0) +// pc&=0xfffffe; + pc&=~1; + if ((pc<<8) == 0) + { + printf("%i:%03i: game crash detected @ %06x\n", Pico.m.frame_count, Pico.m.scanline, SekPc); return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off + } - PicoCpu.membase=PicoMemBase(pc); + PicoCpu.membase=PicoMemBase(pc&0x00ffffff); + PicoCpu.membase-=pc&0xff000000; ret = PicoCpu.membase+pc; -#elif defined(EMU_A68K) - OP_ROM=(u8 *)PicoMemBase(pc); - - // don't bother calling us back unless it's outside the 64k segment - M68000_regs.AsmBank=(pc>>16); #endif return ret; } -int PicoInitPc(u32 pc) +PICO_INTERNAL int PicoInitPc(u32 pc) { PicoCheckPc(pc); return 0; } #ifndef _ASM_MEMORY_C -void PicoMemReset() +PICO_INTERNAL_ASM void PicoMemReset(void) { } #endif // ----------------------------------------------------------------- -#ifndef _ASM_MEMORY_C -// address must already be checked -static int SRAMRead(u32 a) +int PadRead(int i) { - u8 *d = SRam.data-SRam.start+a; - return (d[0]<<8)|d[1]; + int pad,value,data_reg; + pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU + data_reg=Pico.ioports[i+1]; + + // orr the bits, which are set as output + value = data_reg&(Pico.ioports[i+4]|0x80); + + if(PicoOpt & 0x20) { // 6 button gamepad enabled + int phase = Pico.m.padTHPhase[i]; + + if(phase == 2 && !(data_reg&0x40)) { // TH + value|=(pad&0xc0)>>2; // ?0SA 0000 + return value; + } else if(phase == 3) { + if(data_reg&0x40) + value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ + else + value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111 + return value; + } + } + + if(data_reg&0x40) // TH + value|=(pad&0x3f); // ?1CB RLDU + else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU + + return value; // will mirror later } + + +#ifndef _ASM_MEMORY_C +static #endif +u32 SRAMRead(u32 a) +{ + unsigned int sreg = Pico.m.sram_reg; + if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM + elprintf(EL_SRAMIO, "normal sram detected."); + Pico.m.sram_reg|=0x10; // should be normal SRAM + } + if(sreg & 4) // EEPROM read + return SRAMReadEEPROM(); + else // if(sreg & 1) // (sreg&5) is one of prerequisites + return *(u8 *)(SRam.data-SRam.start+a); +} +static void SRAMWrite(u32 a, u32 d) +{ + unsigned int sreg = Pico.m.sram_reg; + if(!(sreg & 0x10)) { + // not detected SRAM + if((a&~1)==0x200000) { + elprintf(EL_SRAMIO, "eeprom detected."); + sreg|=4; // this should be a game with EEPROM (like NBA Jam) + SRam.start=0x200000; SRam.end=SRam.start+1; + } else + elprintf(EL_SRAMIO, "normal sram detected."); + sreg|=0x10; + Pico.m.sram_reg=sreg; + } + if(sreg & 4) { // EEPROM write + // this diff must be at most 16 for NBA Jam to work + if(SekCyclesDoneT()-lastSSRamWrite < 16) { + // just update pending state + elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite); + SRAMUpdPending(a, d); + } else { + int old=sreg; + SRAMWriteEEPROM(sreg>>6); // execute pending + SRAMUpdPending(a, d); + if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed + lastSSRamWrite = SekCyclesDoneT(); + } + } else if(!(sreg & 2)) { + u8 *pm=(u8 *)(SRam.data-SRam.start+a); + if(*pm != (u8)d) { + SRam.changed = 1; + *pm=(u8)d; + } + } +} // for nonstandard reads #ifndef _ASM_MEMORY_C @@ -118,8 +197,6 @@ u32 OtherRead16End(u32 a, int realsize) { u32 d=0; - dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc); - // for games with simple protection devices, discovered by Haze // some dumb detection is used, but that should be enough to make things work if ((a>>22) == 1 && Pico.romsize >= 512*1024) { @@ -181,7 +258,7 @@ u32 OtherRead16End(u32 a, int realsize) } end: - dprintf("ret = %04x", d); + elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc); return d; } @@ -191,35 +268,9 @@ end: static void OtherWrite8End(u32 a,u32 d,int realsize) { // sram - //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone()); - //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT()); if(a >= SRam.start && a <= SRam.end) { - dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); - unsigned int sreg = Pico.m.sram_reg; - if(!(sreg & 0x10)) { - // not detected SRAM - if((a&~1)==0x200000) { - Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam) - SRam.start=0x200000; SRam.end=SRam.start+1; - } - Pico.m.sram_reg|=0x10; - } - if(sreg & 4) { // EEPROM write - if(SekCyclesDoneT()-lastSSRamWrite < 46) { - // just update pending state - SRAMUpdPending(a, d); - } else { - SRAMWriteEEPROM(sreg>>6); // execute pending - SRAMUpdPending(a, d); - lastSSRamWrite = SekCyclesDoneT(); - } - } else if(!(sreg & 2)) { - u8 *pm=(u8 *)(SRam.data-SRam.start+a); - if(*pm != (u8)d) { - SRam.changed = 1; - *pm=(u8)d; - } - } + elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc); + SRAMWrite(a, d); return; } @@ -232,13 +283,13 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) #else // sram access register if(a == 0xA130F1) { - dprintf("sram reg=%02x", d); + elprintf(EL_SRAMIO, "sram reg=%02x", d); Pico.m.sram_reg &= ~3; Pico.m.sram_reg |= (u8)(d&3); return; } #endif - dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); + elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); if(a >= 0xA13004 && a < 0xA13040) { // dumb 12-in-1 or 4-in-1 banking support @@ -264,7 +315,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize) // Read Rom and read Ram #ifndef _ASM_MEMORY_C -u8 CPU_CALL PicoRead8(u32 a) +PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a) { u32 d=0; @@ -274,35 +325,20 @@ u8 CPU_CALL PicoRead8(u32 a) #if !(defined(EMU_C68K) && defined(EMU_M68K)) // sram - if(a >= SRam.start && a <= SRam.end) { - unsigned int sreg = Pico.m.sram_reg; - if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM - Pico.m.sram_reg|=0x10; // should be normal SRAM - } - if(sreg & 4) { // EEPROM read - d = SRAMReadEEPROM(); - goto end; - } else if(sreg & 1) { - d = *(u8 *)(SRam.data-SRam.start+a); - goto end; - } + if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { + d = SRAMRead(a); + elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc); + goto end; } #endif if (a>=8; - end: - - //if ((a&0xe0ffff)==0xe0AE57+0x69c) - // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); - //if ((a&0xe0ffff)==0xe0a9ba+0x69c) - // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); - - //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT()); - //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline); +end: #ifdef __debug_io dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc); #endif @@ -312,12 +348,12 @@ u8 CPU_CALL PicoRead8(u32 a) lastread_d[lrp_cyc++&15] = (u8)d; } #endif - return (u8)d; + return d; } -u16 CPU_CALL PicoRead16(u32 a) +PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a) { - u16 d=0; + u32 d=0; if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram @@ -325,20 +361,20 @@ u16 CPU_CALL PicoRead16(u32 a) #if !(defined(EMU_C68K) && defined(EMU_M68K)) // sram - if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) { - d = (u16) SRAMRead(a); + if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { + d = SRAMRead(a); + d |= d<<8; + elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc); goto end; } #endif if (a= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) { + if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) { d = (SRAMRead(a)<<16)|SRAMRead(a+2); + d |= d<<8; + elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc); goto end; } if (a>16); pm[1]=(u16)d; return; } + log_io(a, 32, 1); a&=0xfffffe; OtherWrite16(a, (u16)(d>>16)); @@ -444,10 +487,10 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d) // ----------------------------------------------------------------- -void PicoMemSetup() +PICO_INTERNAL void PicoMemSetup(void) { -#ifdef EMU_C68K // Setup memory callbacks: +#ifdef EMU_C68K PicoCpu.checkpc=PicoCheckPc; PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8; PicoCpu.fetch16=PicoCpu.read16=PicoRead16; @@ -456,43 +499,16 @@ void PicoMemSetup() PicoCpu.write16=PicoWrite16; PicoCpu.write32=PicoWrite32; #endif +#ifdef EMU_F68K + PicoCpuM68k.read_byte =PicoRead8; + PicoCpuM68k.read_word =PicoRead16; + PicoCpuM68k.read_long =PicoRead32; + PicoCpuM68k.write_byte=PicoWrite8; + PicoCpuM68k.write_word=PicoWrite16; + PicoCpuM68k.write_long=PicoWrite32; +#endif } -#ifdef EMU_A68K -struct A68KInter -{ - u32 unknown; - u8 (__fastcall *Read8) (u32 a); - u16 (__fastcall *Read16)(u32 a); - u32 (__fastcall *Read32)(u32 a); - void (__fastcall *Write8) (u32 a,u8 d); - void (__fastcall *Write16) (u32 a,u16 d); - void (__fastcall *Write32) (u32 a,u32 d); - void (__fastcall *ChangePc)(u32 a); - u8 (__fastcall *PcRel8) (u32 a); - u16 (__fastcall *PcRel16)(u32 a); - u32 (__fastcall *PcRel32)(u32 a); - u16 (__fastcall *Dir16)(u32 a); - u32 (__fastcall *Dir32)(u32 a); -}; - -struct A68KInter a68k_memory_intf= -{ - 0, - PicoRead8, - PicoRead16, - PicoRead32, - PicoWrite8, - PicoWrite16, - PicoWrite32, - PicoCheckPc, - PicoRead8, - PicoRead16, - PicoRead32, - PicoRead16, // unused - PicoRead32, // unused -}; -#endif #ifdef EMU_M68K unsigned int m68k_read_pcrelative_CD8 (unsigned int a); @@ -504,7 +520,9 @@ static unsigned int m68k_read_8 (unsigned int a, int do_fake) { a&=0xffffff; if(PicoMCD&1) return m68k_read_pcrelative_CD8(a); if(a68k w8 : %06x, %02x", addr68k, ret); + elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret); goto end; } // should not be needed || dprintf("z80_read RAM"); if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; } + elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret); + end: return ret; } -unsigned short z80_read16(unsigned short a) +PICO_INTERNAL unsigned short z80_read16(unsigned short a) { //dprintf("z80_read16"); return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) ); } -void z80_write(unsigned char data, unsigned short a) +PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a) { //if (a<0x4000) // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0)); if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald) { - if(PicoOpt&1) emustatus|=YM2612Write(a, data); + if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1; return; } @@ -680,16 +707,18 @@ void z80_write(unsigned char data, unsigned short a) u32 addr68k; addr68k=Pico.m.z80_bank68k<<15; addr68k+=a&0x7fff; + elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data); PicoWrite8(addr68k, data); - //dprintf("z80->68k w8 : %06x, %02x", addr68k, data); return; } // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr); if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; } + + elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data); } -void z80_write16(unsigned short data, unsigned short a) +PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a) { //dprintf("z80_write16");