X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FPicoInt.h;h=7a81ba6fa4e4e5df014ac52db113d937b9532bd8;hb=8ab3e3c1cf696cb776b14ab511f98aa8ab22797e;hp=fa7f7ece275f9c5ed2df20a673c41c84a5a00d05;hpb=ab0607f7e4bb7cb12e6c0c18dce6f9c77ac466ad;p=picodrive.git diff --git a/Pico/PicoInt.h b/Pico/PicoInt.h index fa7f7ec..7a81ba6 100644 --- a/Pico/PicoInt.h +++ b/Pico/PicoInt.h @@ -1,19 +1,30 @@ -// Pico Library - Header File +// Pico Library - Internal Header File // (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006 notaz, All rights reserved. +// (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved. // Free for non-commercial use. // For commercial use, separate licencing terms must be obtained. +#ifndef PICO_INTERNAL_INCLUDED +#define PICO_INTERNAL_INCLUDED #include #include #include #include "Pico.h" +// +#define USE_POLL_DETECT -// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project +#ifndef PICO_INTERNAL +#define PICO_INTERNAL +#endif +#ifndef PICO_INTERNAL_ASM +#define PICO_INTERNAL_ASM +#endif + +// to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project #ifdef __cplusplus extern "C" { @@ -23,41 +34,69 @@ extern "C" { // ----------------------- 68000 CPU ----------------------- #ifdef EMU_C68K #include "../cpu/Cyclone/Cyclone.h" -extern struct Cyclone PicoCpu; -#define SekCyclesLeft PicoCpu.cycles // cycles left for this run -#define SekSetCyclesLeft(c) PicoCpu.cycles=c -#define SekPc (PicoCpu.pc-PicoCpu.membase) +extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; +#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run +#define SekCyclesLeft \ + (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) +#define SekCyclesLeftS68k \ + ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles) +#define SekSetCyclesLeftNoMCD(c) PicoCpuCM68k.cycles=c +#define SekSetCyclesLeft(c) { \ + if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \ +} +#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase) +#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase) +#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } } +#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } } #endif -#ifdef EMU_A68K -void __cdecl M68000_RUN(); -// The format of the data in a68k.asm (at the _M68000_regs location) -struct A68KContext -{ - unsigned int d[8],a[8]; - unsigned int isp,srh,ccr,xc,pc,irq,sr; - int (*IrqCallback) (int nIrq); - unsigned int ppc; - void *pResetCallback; - unsigned int sfc,dfc,usp,vbr; - unsigned int AsmBank,CpuVersion; -}; -struct A68KContext M68000_regs; -extern int m68k_ICount; -#define SekCyclesLeft m68k_ICount -#define SekSetCyclesLeft(c) m68k_ICount=c -#define SekPc M68000_regs.pc +#ifdef EMU_F68K +#include "../cpu/fame/fame.h" +M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; +#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter +#define SekCyclesLeft \ + (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) +#define SekCyclesLeftS68k \ + ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter) +#define SekSetCyclesLeftNoMCD(c) PicoCpuFM68k.io_cycle_counter=c +#define SekSetCyclesLeft(c) { \ + if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \ +} +#define SekPc m68k_get_pc(&PicoCpuFM68k) +#define SekPcS68k m68k_get_pc(&PicoCpuFS68k) +#define SekSetStop(x) { \ + PicoCpuFM68k.execinfo &= ~M68K_HALTED; \ + if (x) { PicoCpuFM68k.execinfo |= M68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \ +} +#define SekSetStopS68k(x) { \ + PicoCpuFS68k.execinfo &= ~M68K_HALTED; \ + if (x) { PicoCpuFS68k.execinfo |= M68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \ +} #endif #ifdef EMU_M68K #include "../cpu/musashi/m68kcpu.h" -extern m68ki_cpu_core PicoM68kCPU; // MD's CPU -extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU +extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #ifndef SekCyclesLeft -#define SekCyclesLeft m68k_cycles_remaining() -#define SekSetCyclesLeft(c) SET_CYCLES(c) -#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC) -#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC) +#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles +#define SekCyclesLeft \ + (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) +#define SekCyclesLeftS68k \ + ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles) +#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c) +#define SekSetCyclesLeft(c) { \ + if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \ +} +#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC) +#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC) +#define SekSetStop(x) { \ + if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \ + else PicoCpuMM68k.stopped=0; \ +} +#define SekSetStopS68k(x) { \ + if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \ + else PicoCpuMS68k.stopped=0; \ +} #endif #endif @@ -65,7 +104,11 @@ extern int SekCycleCnt; // cycles done in this frame extern int SekCycleAim; // cycle aim extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame -#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;} +#define SekCyclesReset() { \ + SekCycleCntT+=SekCycleAim; \ + SekCycleCnt-=SekCycleAim; \ + SekCycleAim=0; \ +} #define SekCyclesBurn(c) SekCycleCnt+=c #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere) #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom @@ -79,51 +122,66 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame extern int SekCycleCntS68k; extern int SekCycleAimS68k; -#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;} +#define SekCyclesResetS68k() { \ + SekCycleCntS68k-=SekCycleAimS68k; \ + SekCycleAimS68k=0; \ +} +#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k) + +// debug cyclone +#if defined(EMU_C68K) && defined(EMU_M68K) +#undef SekSetCyclesLeftNoMCD +#undef SekSetCyclesLeft +#undef SekCyclesBurn +#undef SekEndRun +#define SekSetCyclesLeftNoMCD(c) +#define SekSetCyclesLeft(c) +#define SekCyclesBurn(c) c +#define SekEndRun(c) +#endif -// does not work as expected -//extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled +// --------------------------------------------------------- extern int PicoMCD; -// --------------------------------------------------------- - // main oscillator clock which controls timing #define OSC_NTSC 53693100 -#define OSC_PAL 53203424 // not accurate +// seems to be accurate, see scans from http://www.hot.ee/tmeeco/ +#define OSC_PAL 53203424 struct PicoVideo { unsigned char reg[0x20]; - unsigned int command; // 32-bit Command - unsigned char pending; // 1 if waiting for second half of 32-bit command - unsigned char type; // Command type (v/c/vsram read/write) - unsigned short addr; // Read/Write address - int status; // Status bits + unsigned int command; // 32-bit Command + unsigned char pending; // 1 if waiting for second half of 32-bit command + unsigned char type; // Command type (v/c/vsram read/write) + unsigned short addr; // Read/Write address + int status; // Status bits unsigned char pending_ints; // pending interrupts: ??VH???? - unsigned char pad[0x13]; + signed char lwrite_cnt; // VDP write count during active display line + unsigned char pad[0x12]; }; struct PicoMisc { unsigned char rotate; unsigned char z80Run; - unsigned char padTHPhase[2]; // phase of gamepad TH switches - short scanline; // 0 to 261||311; -1 in fast mode - char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before) - unsigned char hardware; // Hardware value for country - unsigned char pal; // 1=PAL 0=NTSC - unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? - unsigned short z80_bank68k; + unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches + short scanline; // 04 0 to 261||311; -1 in fast mode + char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before) + unsigned char hardware; // 07 Hardware value for country + unsigned char pal; // 08 1=PAL 0=NTSC + unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access) + unsigned short z80_bank68k; // 0a unsigned short z80_lastaddr; // this is for Z80 faking unsigned char z80_fakeval; unsigned char pad0; - unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay - unsigned short sram_addr; // EEPROM address register - unsigned char sram_cycle; // EEPROM SRAM cycle number - unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs - unsigned char prot_bytes[2]; // simple protection fakeing - unsigned short dma_bytes; // + unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay + unsigned short eeprom_addr; // EEPROM address register + unsigned char eeprom_cycle; // EEPROM SRAM cycle number + unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs + unsigned char prot_bytes[2]; // simple protection faking + unsigned short dma_xfers; unsigned char pad[2]; unsigned int frame_count; // mainly for movies }; @@ -149,104 +207,226 @@ struct Pico // sram struct PicoSRAM { - unsigned char *data; // actual data - unsigned int start; // start address in 68k address space + unsigned char *data; // actual data + unsigned int start; // start address in 68k address space unsigned int end; - unsigned char resize; // 1=SRAM size changed and needs to be reallocated on PicoReset - unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset + unsigned char unused1; // 0c: unused + unsigned char unused2; unsigned char changed; - unsigned char pad; + unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words + unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out + unsigned char eeprom_bit_cl; // bit number for cl + unsigned char eeprom_bit_in; // bit number for in + unsigned char eeprom_bit_out; // bit number for out }; // MCD #include "cd/cd_sys.h" #include "cd/LC89510.h" +#include "cd/gfx_cd.h" + +struct mcd_pcm +{ + unsigned char control; // reg7 + unsigned char enabled; // reg8 + unsigned char cur_ch; + unsigned char bank; + int pad1; + + struct pcm_chan // 08, size 0x10 + { + unsigned char regs[8]; + unsigned int addr; // .08: played sample address + int pad; + } ch[8]; +}; struct mcd_misc { unsigned short hint_vector; unsigned char busreq; - unsigned char pad0; - + unsigned char s68k_pend_ints; + unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending + unsigned int counter75hz; + unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023) + unsigned char audio_track; // playing audio track # (zero based) + char pad1; + int timer_int3; // 10 + unsigned int timer_stopwatch; + unsigned char bcram_reg; // 18: battery-backed RAM cart register + unsigned char pad2; + unsigned short pad3; + int pad[9]; }; typedef struct { - unsigned char bios[0x20000]; // 128K - union { - unsigned char prg_ram[0x80000]; // 512K + unsigned char bios[0x20000]; // 000000: 128K + union { // 020000: 512K + unsigned char prg_ram[0x80000]; unsigned char prg_ram_b[4][0x20000]; }; - unsigned char word_ram[0x40000]; // 256K - unsigned char bram[0x2000]; // 8K - unsigned char s68k_regs[0x200]; + union { // 0a0000: 256K + struct { + unsigned char word_ram2M[0x40000]; + unsigned char unused[0x20000]; + }; + struct { + unsigned char unused[0x20000]; + unsigned char word_ram1M[2][0x20000]; + }; + }; + union { // 100000: 64K + unsigned char pcm_ram[0x10000]; + unsigned char pcm_ram_b[0x10][0x1000]; + }; + unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs + unsigned char bram[0x2000]; // 110200: 8K + struct mcd_misc m; // 112200: misc + struct mcd_pcm pcm; // 112240: + _scd_toc TOC; // not to be saved CDD cdd; CDC cdc; _scd scd; - struct mcd_misc m; + Rot_Comp rot_comp; } mcd_state; #define Pico_mcd ((mcd_state *)Pico.rom) +// Area.c +PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub); +PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub); + +// cd/Area.c +PICO_INTERNAL int PicoCdSaveState(void *file); +PICO_INTERNAL int PicoCdLoadState(void *file); + +// Cart.c +PICO_INTERNAL void PicoCartDetect(void); // Draw.c -int PicoLine(int scan); -void PicoFrameStart(); +PICO_INTERNAL int PicoLine(int scan); +PICO_INTERNAL void PicoFrameStart(void); // Draw2.c -void PicoFrameFull(); +PICO_INTERNAL void PicoFrameFull(); // Memory.c -int PicoInitPc(unsigned int pc); -unsigned int CPU_CALL PicoRead32(unsigned int a); -int PicoMemInit(); -void PicoMemReset(); -void PicoDasm(int start,int len); -unsigned char z80_read(unsigned short a); -unsigned short z80_read16(unsigned short a); -void z80_write(unsigned char data, unsigned short a); -void z80_write16(unsigned short data, unsigned short a); +PICO_INTERNAL int PicoInitPc(unsigned int pc); +PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a); +PICO_INTERNAL void PicoMemSetup(void); +PICO_INTERNAL_ASM void PicoMemReset(void); +PICO_INTERNAL int PadRead(int i); +PICO_INTERNAL unsigned char z80_read(unsigned short a); +PICO_INTERNAL unsigned short z80_read16(unsigned short a); +PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a); +PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a); // cd/Memory.c -unsigned char PicoReadCD8 (unsigned int a); -unsigned short PicoReadCD16(unsigned int a); -unsigned int PicoReadCD32(unsigned int a); -void PicoWriteCD8 (unsigned int a, unsigned char d); -void PicoWriteCD16(unsigned int a, unsigned short d); -void PicoWriteCD32(unsigned int a, unsigned int d); +PICO_INTERNAL void PicoMemSetupCD(void); +PICO_INTERNAL_ASM void PicoMemResetCD(int r3); +PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3); // Pico.c extern struct Pico Pico; extern struct PicoSRAM SRam; extern int emustatus; -int CheckDMA(void); +extern int z80startCycle, z80stopCycle; // in 68k cycles +PICO_INTERNAL int CheckDMA(void); // cd/Pico.c -int PicoInitMCD(void); -void PicoExitMCD(void); -int PicoResetMCD(int hard); +PICO_INTERNAL int PicoInitMCD(void); +PICO_INTERNAL void PicoExitMCD(void); +PICO_INTERNAL int PicoResetMCD(int hard); +PICO_INTERNAL int PicoFrameMCD(void); // Sek.c -int SekInit(void); -int SekReset(void); -int SekInterrupt(int irq); -void SekState(unsigned char *data); +PICO_INTERNAL int SekInit(void); +PICO_INTERNAL int SekReset(void); +PICO_INTERNAL int SekInterrupt(int irq); +PICO_INTERNAL void SekState(int *data); +PICO_INTERNAL void SekSetRealTAS(int use_real); // cd/Sek.c -int SekInitS68k(void); -int SekResetS68k(void); -int SekInterruptS68k(int irq); +PICO_INTERNAL int SekInitS68k(void); +PICO_INTERNAL int SekResetS68k(void); +PICO_INTERNAL int SekInterruptS68k(int irq); + +// sound/sound.c +extern int PsndLen_exc_cnt; +extern int PsndLen_exc_add; // VideoPort.c -void PicoVideoWrite(unsigned int a,unsigned short d); -unsigned int PicoVideoRead(unsigned int a); +PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d); +PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a); // Misc.c -void SRAMWriteEEPROM(unsigned int d); -unsigned int SRAMReadEEPROM(); -void SRAMUpdPending(unsigned int a, unsigned int d); +PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d); +PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d); +PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void); +PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count); +PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count); +PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count +PICO_INTERNAL_ASM void memset32(int *dest, int c, int count); + +// cd/Misc.c +PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m); +PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m); + +// cd/buffering.c +PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba); + +// sound/sound.c +PICO_INTERNAL void sound_reset(void); +PICO_INTERNAL void sound_timers_and_dac(int raster); +PICO_INTERNAL int sound_render(int offset, int length); +PICO_INTERNAL void sound_clear(void); +// z80 functionality wrappers +PICO_INTERNAL void z80_init(void); +PICO_INTERNAL void z80_resetCycles(void); +PICO_INTERNAL void z80_int(void); +PICO_INTERNAL int z80_run(int cycles); +PICO_INTERNAL void z80_pack(unsigned char *data); +PICO_INTERNAL void z80_unpack(unsigned char *data); +PICO_INTERNAL void z80_reset(void); +PICO_INTERNAL void z80_exit(void); #ifdef __cplusplus } // End of extern "C" #endif + +// emulation event logging +#ifndef EL_LOGMASK +#define EL_LOGMASK 0 +#endif + +#define EL_HVCNT 0x0001 /* hv counter reads */ +#define EL_SR 0x0002 /* SR reads */ +#define EL_INTS 0x0004 /* ints and acks */ +#define EL_YM2612R 0x0008 /* 68k ym2612 reads */ +#define EL_INTSW 0x0010 /* log irq switching on/off */ +#define EL_ASVDP 0x0020 /* VDP accesses during active scan */ +#define EL_VDPDMA 0x0040 /* VDP DMA transfers and their timing */ +#define EL_BUSREQ 0x0080 /* z80 busreq r/w or reset w */ +#define EL_Z80BNK 0x0100 /* z80 i/o through bank area */ +#define EL_SRAMIO 0x0200 /* sram i/o */ +#define EL_EEPROM 0x0400 /* eeprom debug */ +#define EL_UIO 0x0800 /* unmapped i/o */ +#define EL_IO 0x1000 /* all i/o (TODO) */ + +#define EL_STATUS 0x4000 /* status messages */ +#define EL_ANOMALY 0x8000 /* some unexpected conditions */ + +#if EL_LOGMASK +#define elprintf(w,f,...) \ +{ \ + if ((w) & EL_LOGMASK) \ + printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \ +} +#else +#define elprintf(w,f,...) +#endif + +#endif // PICO_INTERNAL_INCLUDED +