X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FPicoInt.h;h=9aead10701059351c5053b915a9f74a843fb9e0d;hb=9d917eea21607c7c239d4b0cd850d660c0c8e4c5;hp=f495bb658f9a6506c0e171baab3723ae2766f16d;hpb=eff55556cff77fd64cff4be32e449e0a58aed6fe;p=picodrive.git diff --git a/Pico/PicoInt.h b/Pico/PicoInt.h index f495bb6..9aead10 100644 --- a/Pico/PicoInt.h +++ b/Pico/PicoInt.h @@ -24,7 +24,7 @@ #define PICO_INTERNAL_ASM #endif -// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project +// to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project #ifdef __cplusplus extern "C" { @@ -34,66 +34,78 @@ extern "C" { // ----------------------- 68000 CPU ----------------------- #ifdef EMU_C68K #include "../cpu/Cyclone/Cyclone.h" -extern struct Cyclone PicoCpu, PicoCpuS68k; -#define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run +extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; +#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run #define SekCyclesLeft \ (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) #define SekCyclesLeftS68k \ - ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles) -#define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c + ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles) +#define SekSetCyclesLeftNoMCD(c) PicoCpuCM68k.cycles=c #define SekSetCyclesLeft(c) { \ if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \ } -#define SekPc (PicoCpu.pc-PicoCpu.membase) -#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase) -#define SekSetStop(x) { PicoCpu.state_flags&=~1; if (x) { PicoCpu.state_flags|=1; PicoCpu.cycles=0; } } -#define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } } +#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase) +#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase) +#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } } +#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } } +#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7)) +#ifdef EMU_M68K +#define EMU_CORE_DEBUG +#endif #endif -#ifdef EMU_A68K -void __cdecl M68000_RUN(); -// The format of the data in a68k.asm (at the _M68000_regs location) -struct A68KContext -{ - unsigned int d[8],a[8]; - unsigned int isp,srh,ccr,xc,pc,irq,sr; - int (*IrqCallback) (int nIrq); - unsigned int ppc; - void *pResetCallback; - unsigned int sfc,dfc,usp,vbr; - unsigned int AsmBank,CpuVersion; -}; -struct A68KContext M68000_regs; -extern int m68k_ICount; -#define SekCyclesLeft m68k_ICount -#define SekSetCyclesLeft(c) m68k_ICount=c -#define SekPc M68000_regs.pc +#ifdef EMU_F68K +#include "../cpu/fame/fame.h" +M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; +#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter +#define SekCyclesLeft \ + (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) +#define SekCyclesLeftS68k \ + ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter) +#define SekSetCyclesLeftNoMCD(c) PicoCpuFM68k.io_cycle_counter=c +#define SekSetCyclesLeft(c) { \ + if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \ +} +#define SekPc fm68k_get_pc(&PicoCpuFM68k) +#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k) +#define SekSetStop(x) { \ + PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \ + if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \ +} +#define SekSetStopS68k(x) { \ + PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \ + if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \ +} +#define SekShouldInterrupt fm68k_would_interrupt() +#ifdef EMU_M68K +#define EMU_CORE_DEBUG +#endif #endif #ifdef EMU_M68K #include "../cpu/musashi/m68kcpu.h" -extern m68ki_cpu_core PicoM68kCPU; // MD's CPU -extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU +extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #ifndef SekCyclesLeft -#define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles +#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles #define SekCyclesLeft \ (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) #define SekCyclesLeftS68k \ - ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles) + ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles) #define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c) #define SekSetCyclesLeft(c) { \ if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \ } -#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC) -#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC) +#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC) +#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC) #define SekSetStop(x) { \ - if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \ - else PicoM68kCPU.stopped=0; \ + if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \ + else PicoCpuMM68k.stopped=0; \ } #define SekSetStopS68k(x) { \ - if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \ - else PicoS68kCPU.stopped=0; \ + if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \ + else PicoCpuMS68k.stopped=0; \ } +#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK) #endif #endif @@ -101,7 +113,11 @@ extern int SekCycleCnt; // cycles done in this frame extern int SekCycleAim; // cycle aim extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame -#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;} +#define SekCyclesReset() { \ + SekCycleCntT+=SekCycleAim; \ + SekCycleCnt-=SekCycleAim; \ + SekCycleAim=0; \ +} #define SekCyclesBurn(c) SekCycleCnt+=c #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere) #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom @@ -115,11 +131,13 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame extern int SekCycleCntS68k; extern int SekCycleAimS68k; -#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;} +#define SekCyclesResetS68k() { \ + SekCycleCntS68k-=SekCycleAimS68k; \ + SekCycleAimS68k=0; \ +} #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k) -// debug cyclone -#if defined(EMU_C68K) && defined(EMU_M68K) +#ifdef EMU_CORE_DEBUG #undef SekSetCyclesLeftNoMCD #undef SekSetCyclesLeft #undef SekCyclesBurn @@ -130,46 +148,48 @@ extern int SekCycleAimS68k; #define SekEndRun(c) #endif -extern int PicoMCD; - // --------------------------------------------------------- +extern int PicoMCD; + // main oscillator clock which controls timing #define OSC_NTSC 53693100 -#define OSC_PAL 53203424 // not accurate +// seems to be accurate, see scans from http://www.hot.ee/tmeeco/ +#define OSC_PAL 53203424 struct PicoVideo { unsigned char reg[0x20]; - unsigned int command; // 32-bit Command - unsigned char pending; // 1 if waiting for second half of 32-bit command - unsigned char type; // Command type (v/c/vsram read/write) - unsigned short addr; // Read/Write address - int status; // Status bits + unsigned int command; // 32-bit Command + unsigned char pending; // 1 if waiting for second half of 32-bit command + unsigned char type; // Command type (v/c/vsram read/write) + unsigned short addr; // Read/Write address + int status; // Status bits unsigned char pending_ints; // pending interrupts: ??VH???? - unsigned char pad[0x13]; + signed char lwrite_cnt; // VDP write count during active display line + unsigned char pad[0x12]; }; struct PicoMisc { unsigned char rotate; unsigned char z80Run; - unsigned char padTHPhase[2]; // phase of gamepad TH switches - short scanline; // 0 to 261||311; -1 in fast mode - char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before) - unsigned char hardware; // Hardware value for country - unsigned char pal; // 1=PAL 0=NTSC - unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access) - unsigned short z80_bank68k; + unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches + short scanline; // 04 0 to 261||311; -1 in fast mode + char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before) + unsigned char hardware; // 07 Hardware value for country + unsigned char pal; // 08 1=PAL 0=NTSC + unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access) + unsigned short z80_bank68k; // 0a unsigned short z80_lastaddr; // this is for Z80 faking unsigned char z80_fakeval; unsigned char pad0; - unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay - unsigned short sram_addr; // EEPROM address register - unsigned char sram_cycle; // EEPROM SRAM cycle number - unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs + unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay + unsigned short eeprom_addr; // EEPROM address register + unsigned char eeprom_cycle; // EEPROM SRAM cycle number + unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs unsigned char prot_bytes[2]; // simple protection faking - unsigned short dma_bytes; // + unsigned short dma_xfers; unsigned char pad[2]; unsigned int frame_count; // mainly for movies }; @@ -198,10 +218,14 @@ struct PicoSRAM unsigned char *data; // actual data unsigned int start; // start address in 68k address space unsigned int end; - unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset - unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset + unsigned char unused1; // 0c: unused + unsigned char unused2; unsigned char changed; - unsigned char pad; + unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words + unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out + unsigned char eeprom_bit_cl; // bit number for cl + unsigned char eeprom_bit_in; // bit number for in + unsigned char eeprom_bit_out; // bit number for out }; // MCD @@ -285,6 +309,12 @@ PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub); PICO_INTERNAL int PicoCdSaveState(void *file); PICO_INTERNAL int PicoCdLoadState(void *file); +// Cart.c +PICO_INTERNAL void PicoCartDetect(void); + +// Debug.c +int CM_compareRun(int cyc); + // Draw.c PICO_INTERNAL int PicoLine(int scan); PICO_INTERNAL void PicoFrameStart(void); @@ -294,13 +324,18 @@ PICO_INTERNAL void PicoFrameFull(); // Memory.c PICO_INTERNAL int PicoInitPc(unsigned int pc); -PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a); +PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a); PICO_INTERNAL void PicoMemSetup(void); PICO_INTERNAL_ASM void PicoMemReset(void); +PICO_INTERNAL int PadRead(int i); PICO_INTERNAL unsigned char z80_read(unsigned short a); -PICO_INTERNAL unsigned short z80_read16(unsigned short a); +#ifndef _USE_CZ80 PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a); PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a); +PICO_INTERNAL unsigned short z80_read16(unsigned short a); +#else +PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data); +#endif // cd/Memory.c PICO_INTERNAL void PicoMemSetupCD(void); @@ -315,7 +350,8 @@ extern int z80startCycle, z80stopCycle; // in 68k cycles PICO_INTERNAL int CheckDMA(void); // cd/Pico.c -PICO_INTERNAL int PicoInitMCD(void); +PICO_INTERNAL int PicoInitMCD(void); +PICO_INTERNAL void PicoExitMCD(void); PICO_INTERNAL int PicoResetMCD(int hard); PICO_INTERNAL int PicoFrameMCD(void); @@ -323,7 +359,7 @@ PICO_INTERNAL int PicoFrameMCD(void); PICO_INTERNAL int SekInit(void); PICO_INTERNAL int SekReset(void); PICO_INTERNAL int SekInterrupt(int irq); -PICO_INTERNAL void SekState(unsigned char *data); +PICO_INTERNAL void SekState(int *data); PICO_INTERNAL void SekSetRealTAS(int use_real); // cd/Sek.c @@ -356,10 +392,10 @@ PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m); PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba); // sound/sound.c -PICO_INTERNAL void sound_reset(void); -PICO_INTERNAL void sound_timers_and_dac(int raster); -PICO_INTERNAL int sound_render(int offset, int length); -PICO_INTERNAL void sound_clear(void); +PICO_INTERNAL void PsndReset(void); +PICO_INTERNAL void Psnd_timers_and_dac(int raster); +PICO_INTERNAL int PsndRender(int offset, int length); +PICO_INTERNAL void PsndClear(void); // z80 functionality wrappers PICO_INTERNAL void z80_init(void); PICO_INTERNAL void z80_resetCycles(void); @@ -375,5 +411,37 @@ PICO_INTERNAL void z80_exit(void); } // End of extern "C" #endif +// emulation event logging +#ifndef EL_LOGMASK +#define EL_LOGMASK 0 +#endif + +#define EL_HVCNT 0x0001 /* hv counter reads */ +#define EL_SR 0x0002 /* SR reads */ +#define EL_INTS 0x0004 /* ints and acks */ +#define EL_YM2612R 0x0008 /* 68k ym2612 reads */ +#define EL_INTSW 0x0010 /* log irq switching on/off */ +#define EL_ASVDP 0x0020 /* VDP accesses during active scan */ +#define EL_VDPDMA 0x0040 /* VDP DMA transfers and their timing */ +#define EL_BUSREQ 0x0080 /* z80 busreq r/w or reset w */ +#define EL_Z80BNK 0x0100 /* z80 i/o through bank area */ +#define EL_SRAMIO 0x0200 /* sram i/o */ +#define EL_EEPROM 0x0400 /* eeprom debug */ +#define EL_UIO 0x0800 /* unmapped i/o */ +#define EL_IO 0x1000 /* all i/o (TODO) */ + +#define EL_STATUS 0x4000 /* status messages */ +#define EL_ANOMALY 0x8000 /* some unexpected conditions */ + +#if EL_LOGMASK +#define elprintf(w,f,...) \ +{ \ + if ((w) & EL_LOGMASK) \ + printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \ +} +#else +#define elprintf(w,f,...) +#endif + #endif // PICO_INTERNAL_INCLUDED