X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2FPicoInt.h;h=a6fceff1474c2f2dbb217f26292332dbb3b8c5f0;hb=70357ce52578dee0dd3b3663902cf872c3d34258;hp=7af451c0c87d2f0e898dc7492838c0495d2c6e31;hpb=b8cbd802cd88916c20d3fc8175c226a12d3ebbc4;p=picodrive.git

diff --git a/Pico/PicoInt.h b/Pico/PicoInt.h
index 7af451c..a6fceff 100644
--- a/Pico/PicoInt.h
+++ b/Pico/PicoInt.h
@@ -24,7 +24,7 @@
 #define PICO_INTERNAL_ASM
 #endif
 
-// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project
+// to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project
 
 #ifdef __cplusplus
 extern "C" {
@@ -50,24 +50,28 @@ extern struct Cyclone PicoCpu, PicoCpuS68k;
 #define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }
 #endif
 
-#ifdef EMU_A68K
-void __cdecl M68000_RUN();
-// The format of the data in a68k.asm (at the _M68000_regs location)
-struct A68KContext
-{
-  unsigned int d[8],a[8];
-  unsigned int isp,srh,ccr,xc,pc,irq,sr;
-  int (*IrqCallback) (int nIrq);
-  unsigned int ppc;
-  void *pResetCallback;
-  unsigned int sfc,dfc,usp,vbr;
-  unsigned int AsmBank,CpuVersion;
-};
-struct A68KContext M68000_regs;
-extern int m68k_ICount;
-#define SekCyclesLeft m68k_ICount
-#define SekSetCyclesLeft(c) m68k_ICount=c
-#define SekPc M68000_regs.pc
+#ifdef EMU_F68K
+#include "../cpu/fame/fame.h"
+M68K_CONTEXT PicoCpuM68k, PicoCpuS68k;
+#define SekCyclesLeftNoMCD PicoCpuM68k.io_cycle_counter
+#define SekCyclesLeft \
+	(((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
+#define SekCyclesLeftS68k \
+	((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.io_cycle_counter)
+#define SekSetCyclesLeftNoMCD(c) PicoCpuM68k.io_cycle_counter=c
+#define SekSetCyclesLeft(c) { \
+	if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
+}
+#define SekPc     m68k_get_pc(&PicoCpuM68k)
+#define SekPcS68k m68k_get_pc(&PicoCpuS68k)
+#define SekSetStop(x) { \
+	PicoCpuM68k.execinfo &= ~M68K_HALTED; \
+	if (x) { PicoCpuM68k.execinfo |= M68K_HALTED; PicoCpuM68k.io_cycle_counter = 0; } \
+}
+#define SekSetStopS68k(x) { \
+	PicoCpuS68k.execinfo &= ~M68K_HALTED; \
+	if (x) { PicoCpuS68k.execinfo |= M68K_HALTED; PicoCpuS68k.io_cycle_counter = 0; } \
+}
 #endif
 
 #ifdef EMU_M68K
@@ -119,7 +123,10 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
 extern int SekCycleCntS68k;
 extern int SekCycleAimS68k;
 
-#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}
+#define SekCyclesResetS68k() { \
+	SekCycleCntS68k-=SekCycleAimS68k; \
+	SekCycleAimS68k=0; \
+}
 #define SekCyclesDoneS68k()  (SekCycleAimS68k-SekCyclesLeftS68k)
 
 // debug cyclone
@@ -134,10 +141,10 @@ extern int SekCycleAimS68k;
 #define SekEndRun(c)
 #endif
 
-extern int PicoMCD;
-
 // ---------------------------------------------------------
 
+extern int PicoMCD;
+
 // main oscillator clock which controls timing
 #define OSC_NTSC 53693100
 // seems to be accurate, see scans from http://www.hot.ee/tmeeco/
@@ -171,9 +178,9 @@ struct PicoMisc
   unsigned char  z80_fakeval;
   unsigned char  pad0;
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay
-  unsigned short sram_addr;  // EEPROM address register
-  unsigned char sram_cycle;  // EEPROM SRAM cycle number
-  unsigned char sram_slave;  // EEPROM slave word for X24C02 and better SRAMs
+  unsigned short eeprom_addr;  // EEPROM address register
+  unsigned char  eeprom_cycle; // EEPROM SRAM cycle number
+  unsigned char  eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
   unsigned char prot_bytes[2]; // simple protection faking
   unsigned short dma_xfers;
   unsigned char pad[2];
@@ -204,10 +211,14 @@ struct PicoSRAM
   unsigned char *data;		// actual data
   unsigned int start;		// start address in 68k address space
   unsigned int end;
-  unsigned char resize;		// 0c: 1=SRAM size changed and needs to be reallocated on PicoReset
-  unsigned char reg_back;	// copy of Pico.m.sram_reg to set after reset
+  unsigned char unused1;	// 0c: unused
+  unsigned char unused2;
   unsigned char changed;
-  unsigned char pad;
+  unsigned char eeprom_type;    // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words
+  unsigned char eeprom_abits;	// eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out
+  unsigned char eeprom_bit_cl;	// bit number for cl
+  unsigned char eeprom_bit_in;  // bit number for in
+  unsigned char eeprom_bit_out; // bit number for out
 };
 
 // MCD
@@ -291,6 +302,9 @@ PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
 PICO_INTERNAL int PicoCdSaveState(void *file);
 PICO_INTERNAL int PicoCdLoadState(void *file);
 
+// Cart.c
+PICO_INTERNAL void PicoCartDetect(void);
+
 // Draw.c
 PICO_INTERNAL int PicoLine(int scan);
 PICO_INTERNAL void PicoFrameStart(void);
@@ -395,8 +409,12 @@ PICO_INTERNAL void z80_exit(void);
 #define EL_INTSW   0x0010 /* log irq switching on/off */
 #define EL_ASVDP   0x0020 /* VDP accesses during active scan */
 #define EL_VDPDMA  0x0040 /* VDP DMA transfers and their timing */
-#define EL_BUSREQ  0x0080 /* z80 busreq r/w */
+#define EL_BUSREQ  0x0080 /* z80 busreq r/w or reset w */
 #define EL_Z80BNK  0x0100 /* z80 i/o through bank area */
+#define EL_SRAMIO  0x0200 /* sram i/o */
+#define EL_EEPROM  0x0400 /* eeprom debug */
+#define EL_UIO     0x0800 /* unmapped i/o */
+#define EL_IO      0x1000 /* all i/o (TODO) */
 
 #define EL_STATUS  0x4000 /* status messages */
 #define EL_ANOMALY 0x8000 /* some unexpected conditions */