X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2Fcarthw%2Fsvp%2Fgen_arm.c;h=46be2db5da5fe3d764e786c208a393013b719482;hb=84100c0fd5a5abb6b1e712aa1feb33388362695d;hp=87e8368045f91cbf44dc253d6d55fae7c4d5f679;hpb=0e4d7ba5f42c0649d9dcc905d29b04d5a11ecd9c;p=picodrive.git

diff --git a/Pico/carthw/svp/gen_arm.c b/Pico/carthw/svp/gen_arm.c
index 87e8368..46be2db 100644
--- a/Pico/carthw/svp/gen_arm.c
+++ b/Pico/carthw/svp/gen_arm.c
@@ -1,3 +1,8 @@
+// Basic macros to emit ARM instructions and some utils
+
+// (c) Copyright 2008, Grazvydas "notaz" Ignotas
+// Free for non-commercial use.
+
 #define EMIT(x) *tcache_ptr++ = x
 
 #define A_R4M  (1 << 4)
@@ -15,6 +20,7 @@
 #define A_COND_NE 0x1
 #define A_COND_MI 0x4
 #define A_COND_PL 0x5
+#define A_COND_LE 0xd
 
 /* addressing mode 1 */
 #define A_AM1_LSL 0
@@ -52,6 +58,7 @@
 #define EOP_AND_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_AND,0,rn,rd,ror2,imm8)
 #define EOP_SUB_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_SUB,0,rn,rd,ror2,imm8)
 #define EOP_TST_IMM(   rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_TST,1,rn, 0,ror2,imm8)
+#define EOP_CMP_IMM(   rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_CMP,1,rn, 0,ror2,imm8)
 #define EOP_RSB_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_RSB,0,rn,rd,ror2,imm8)
 
 #define EOP_MOV_REG(s,   rd,shift_imm,shift_op,rm) EOP_C_DOP_REG_XIMM(A_COND_AL,A_OP_MOV,s, 0,rd,shift_imm,shift_op,rm)
@@ -91,9 +98,13 @@
 	EMIT(((cond)<<28) | 0x05000000 | ((u)<<23) | ((b)<<22) | ((l)<<20) | ((rn)<<16) | ((rd)<<12) | (offset_12))
 
 /* addressing mode 3 */
-#define EOP_C_AM3_IMM(cond,u,l,rn,rd,s,h,offset_8) \
-	EMIT(((cond)<<28) | 0x01400090 | ((u)<<23) | ((l)<<20) | ((rn)<<16) | ((rd)<<12) | (((offset_8)&0xf0)<<4) | \
-			((s)<<6) | ((h)<<5) | ((offset_8)&0xf))
+#define EOP_C_AM3(cond,u,r,l,rn,rd,s,h,immed_reg) \
+	EMIT(((cond)<<28) | 0x01000090 | ((u)<<23) | ((r)<<22) | ((l)<<20) | ((rn)<<16) | ((rd)<<12) | \
+			((s)<<6) | ((h)<<5) | (immed_reg))
+
+#define EOP_C_AM3_IMM(cond,u,l,rn,rd,s,h,offset_8) EOP_C_AM3(cond,u,1,l,rn,rd,s,h,(((offset_8)&0xf0)<<4)|((offset_8)&0xf))
+
+#define EOP_C_AM3_REG(cond,u,l,rn,rd,s,h,rm)       EOP_C_AM3(cond,u,0,l,rn,rd,s,h,rm)
 
 /* ldr and str */
 #define EOP_LDR_IMM(   rd,rn,offset_12) EOP_C_AM2_IMM(A_COND_AL,1,0,1,rn,rd,offset_12)
@@ -104,8 +115,10 @@
 
 #define EOP_LDRH_IMM(   rd,rn,offset_8)  EOP_C_AM3_IMM(A_COND_AL,1,1,rn,rd,0,1,offset_8)
 #define EOP_LDRH_SIMPLE(rd,rn)           EOP_C_AM3_IMM(A_COND_AL,1,1,rn,rd,0,1,0)
+#define EOP_LDRH_REG(   rd,rn,rm)        EOP_C_AM3_REG(A_COND_AL,1,1,rn,rd,0,1,rm)
 #define EOP_STRH_IMM(   rd,rn,offset_8)  EOP_C_AM3_IMM(A_COND_AL,1,0,rn,rd,0,1,offset_8)
 #define EOP_STRH_SIMPLE(rd,rn)           EOP_C_AM3_IMM(A_COND_AL,1,0,rn,rd,0,1,0)
+#define EOP_STRH_REG(   rd,rn,rm)        EOP_C_AM3_REG(A_COND_AL,1,0,rn,rd,0,1,rm)
 
 /* ldm and stm */
 #define EOP_XXM(cond,p,u,s,w,l,rn,list) \
@@ -165,15 +178,6 @@ static void emit_mov_const(int cond, int d, unsigned int val)
 		EOP_C_DOP_IMM(cond, need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 0, val&0xff);
 }
 
-/*
-static void check_offset_12(unsigned int val)
-{
-	if (!(val & ~0xfff)) return;
-	printf("offset_12 overflow %04x\n", val);
-	exit(1);
-}
-*/
-
 static void check_offset_24(int val)
 {
 	if (val >= (int)0xff000000 && val <= 0x00ffffff) return;
@@ -181,42 +185,27 @@ static void check_offset_24(int val)
 	exit(1);
 }
 
-static void emit_call(void *target)
+static void emit_call(int cond, void *target)
 {
 	int val = (unsigned int *)target - tcache_ptr - 2;
 	check_offset_24(val);
 
-	EOP_BL(val & 0xffffff);			// bl target
+	EOP_C_B(cond,1,val & 0xffffff);			// bl target
 }
 
-static void emit_block_prologue(void)
+static void emit_jump(int cond, void *target)
 {
-	// stack regs
-	EOP_STMFD_ST(A_R4M|A_R5M|A_R6M|A_R7M|A_R8M|A_R9M|A_R10M|A_R11M|A_R14M);	// stmfd r13!, {r4-r11,lr}
-	emit_call(regfile_load);
-	EOP_MOV_IMM(11, 0, 0);			// mov r11, #0
-}
-
-static void emit_block_epilogue(int icount)
-{
-	if (icount > 0xff) { printf("large icount: %i\n", icount); icount = 0xff; }
-	emit_call(regfile_store);
-	EOP_ADD_IMM(0,11,0,icount);		// add r0, r11, #icount
-	EOP_LDMFD_ST(A_R4M|A_R5M|A_R6M|A_R7M|A_R8M|A_R9M|A_R10M|A_R11M|A_R14M);	// ldmfd r13!, {r4-r11,lr}
-	EOP_BX(14);				// bx r14
-}
+	int val = (unsigned int *)target - tcache_ptr - 2;
+	check_offset_24(val);
 
-static void emit_pc_dump(int pc)
-{
-	emit_mov_const(A_COND_AL, 3, pc<<16);
-	EOP_STR_IMM(3,7,0x400+6*4);		// str r3, [r7, #(0x400+6*8)]
+	EOP_C_B(cond,0,val & 0xffffff);			// b target
 }
 
-static void handle_caches()
+static void handle_caches(void)
 {
 #ifdef ARM
-	extern void flush_inval_caches(const void *start_addr, const void *end_addr);
-	flush_inval_caches(tcache, tcache_ptr);
+	extern void cache_flush_d_inval_i(const void *start_addr, const void *end_addr);
+	cache_flush_d_inval_i(tcache, tcache_ptr);
 #endif
 }