X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2Fcd%2FMemory.c;h=b6a4a8210e4d56decda729827a4742d36c9ebbed;hb=83bd0b76aba19ff62368cfee76089e15579e3b7c;hp=21cc12a854957a3c91861e96969fe956b8a43170;hpb=ab0607f7e4bb7cb12e6c0c18dce6f9c77ac466ad;p=picodrive.git diff --git a/Pico/cd/Memory.c b/Pico/cd/Memory.c index 21cc12a..b6a4a82 100644 --- a/Pico/cd/Memory.c +++ b/Pico/cd/Memory.c @@ -1,7 +1,7 @@ // This is part of Pico Library // (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006 notaz, All rights reserved. +// (c) Copyright 2007 notaz, All rights reserved. // Free for non-commercial use. // For commercial use, separate licencing terms must be obtained. @@ -17,6 +17,9 @@ #include "../sound/sn76496.h" #include "gfx_cd.h" +#include "pcm.h" + +#include "cell_map.c" typedef unsigned char u8; typedef unsigned short u16; @@ -24,15 +27,13 @@ typedef unsigned int u32; //#define __debug_io //#define __debug_io2 -#define rdprintf dprintf -//#define rdprintf(...) +//#define rdprintf dprintf +#define rdprintf(...) +//#define wrdprintf dprintf +#define wrdprintf(...) // ----------------------------------------------------------------- -// extern m68ki_cpu_core m68ki_cpu; - -extern int counter75hz; - static u32 m68k_reg_read16(u32 a) { @@ -46,23 +47,24 @@ static u32 m68k_reg_read16(u32 a) goto end; case 2: d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7); - dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc); + dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k); goto end; case 4: d = Pico_mcd->s68k_regs[4]<<8; goto end; case 6: - d = Pico_mcd->m.hint_vector; + d = *(u16 *)(Pico_mcd->bios + 0x72); goto end; case 8: d = Read_CDC_Host(0); goto end; case 0xA: - dprintf("m68k reserved read"); + dprintf("m68k FIXME: reserved read"); goto end; case 0xC: - dprintf("m68k stopwatch read"); - break; + dprintf("m68k stopwatch timer read"); + d = Pico_mcd->m.timer_stopwatch >> 16; + goto end; } if (a < 0x30) { @@ -71,7 +73,7 @@ static u32 m68k_reg_read16(u32 a) goto end; } - dprintf("m68k_regs invalid read @ %02x", a); + dprintf("m68k_regs FIXME invalid read @ %02x", a); end: @@ -91,12 +93,12 @@ static void m68k_reg_write8(u32 a, u32 d) return; case 1: d &= 3; - if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset + if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1)); if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1); - if ((PicoMCD&2) && (d&3)==1) { + if ((Pico_mcd->m.state_flags&1) && (d&3)==1) { SekResetS68k(); // S68k comes out of RESET or BRQ state - PicoMCD&=~2; + Pico_mcd->m.state_flags&=~1; dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft); } Pico_mcd->m.busreq = d; @@ -117,16 +119,14 @@ static void m68k_reg_write8(u32 a, u32 d) Pico_mcd->s68k_regs[3] = d; // really use s68k side register return; case 6: - *((char *)&Pico_mcd->m.hint_vector+1) = d; + Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer return; case 7: - *(char *)&Pico_mcd->m.hint_vector = d; + Pico_mcd->bios[0x72] = d; + dprintf("hint vector set to %08x", PicoRead32(0x70)); return; case 0xe: //dprintf("m68k: comm flag: %02x", d); - - //dprintf("s68k @ %06x", SekPcS68k); - Pico_mcd->s68k_regs[0xe] = d; return; } @@ -136,10 +136,20 @@ static void m68k_reg_write8(u32 a, u32 d) return; } - dprintf("m68k: invalid write? [%02x] %02x", a, d); + dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d); } +#define READ_FONT_DATA(basemask) \ +{ \ + unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \ + unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \ + if (fnt & (basemask << 0)) d = col1 ; else d = col0; \ + if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \ + if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \ + if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \ +} + static u32 s68k_reg_read16(u32 a) { @@ -162,11 +172,27 @@ static u32 s68k_reg_read16(u32 a) d = Read_CDC_Host(1); // Gens returns 0 here on byte reads goto end; case 0xC: - dprintf("s68k stopwatch read"); + dprintf("s68k stopwatch timer read"); + d = Pico_mcd->m.timer_stopwatch >> 16; + goto end; + case 0x30: + dprintf("s68k int3 timer read"); break; case 0x34: // fader d = 0; // no busy bit goto end; + case 0x50: // font data (check: Lunar 2, Silpheed) + READ_FONT_DATA(0x00100000); + goto end; + case 0x52: + READ_FONT_DATA(0x00010000); + goto end; + case 0x54: + READ_FONT_DATA(0x10000000); + goto end; + case 0x56: + READ_FONT_DATA(0x01000000); + goto end; } d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1]; @@ -186,17 +212,27 @@ static void s68k_reg_write8(u32 a, u32 d) switch (a) { case 2: return; // only m68k can change WP - case 3: + case 3: { + int dold = Pico_mcd->s68k_regs[3]; dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc); d &= 0x1d; if (d&4) { - d |= Pico_mcd->s68k_regs[3]&0xc2; - if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit + d |= dold&0xc2; + if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit + if (!(dold & 4)) { + dprintf("wram mode 2M->1M"); + wram_2M_to_1M(Pico_mcd->word_ram2M); + } } else { d |= Pico_mcd->s68k_regs[3]&0xc3; if (d&1) d &= ~2; // return word RAM to m68k in 2M mode + if (dold & 4) { + dprintf("wram mode 1M->2M"); + wram_1M_to_2M(Pico_mcd->word_ram2M); + } } break; + } case 4: dprintf("s68k CDC dest: %x", d&7); Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode @@ -210,11 +246,23 @@ static void s68k_reg_write8(u32 a, u32 d) case 0xa: dprintf("s68k set CDC dma addr"); break; + case 0xc: + case 0xd: + dprintf("s68k set stopwatch timer"); + Pico_mcd->m.timer_stopwatch = 0; + return; + case 0xe: + Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair + Pico_mcd->m.timer_stopwatch = 0; + return; + case 0x31: + dprintf("s68k set int3 timer: %02x", d); + Pico_mcd->m.timer_int3 = d << 16; + break; case 0x33: // IRQ mask dprintf("s68k irq mask: %02x", d); if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) { CDD_Export_Status(); - // counter75hz = 0; // ??? } break; case 0x34: // fader @@ -227,7 +275,6 @@ static void s68k_reg_write8(u32 a, u32 d) Pico_mcd->s68k_regs[0x37] = d&7; if ((d&4) && !(d_old&4)) { CDD_Export_Status(); - // counter75hz = 0; // ??? } return; } @@ -237,9 +284,9 @@ static void s68k_reg_write8(u32 a, u32 d) return; } - if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42)) + if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42)) { - dprintf("m68k: invalid write @ %02x?", a); + dprintf("s68k FIXME: invalid write @ %02x?", a); return; } @@ -248,200 +295,33 @@ static void s68k_reg_write8(u32 a, u32 d) - - -static int PadRead(int i) -{ - int pad=0,value=0,TH; - pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU - TH=Pico.ioports[i+1]&0x40; - - if(PicoOpt & 0x20) { // 6 button gamepad enabled - int phase = Pico.m.padTHPhase[i]; - - if(phase == 2 && !TH) { - value=(pad&0xc0)>>2; // ?0SA 0000 - goto end; - } else if(phase == 3 && TH) { - value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ - goto end; - } else if(phase == 3 && !TH) { - value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111 - goto end; - } - } - - if(TH) value=(pad&0x3f); // ?1CB RLDU - else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU - - end: - - // orr the bits, which are set as output - value |= Pico.ioports[i+1]&Pico.ioports[i+4]; - - return value; // will mirror later -} - -static u8 z80Read8(u32 a) -{ - if(Pico.m.z80Run&1) return 0; - - a&=0x1fff; - - if(!(PicoOpt&4)) { - // Z80 disabled, do some faking - static u8 zerosent = 0; - if(a == Pico.m.z80_lastaddr) { // probably polling something - u8 d = Pico.m.z80_fakeval; - if((d & 0xf) == 0xf && !zerosent) { - d = 0; zerosent = 1; - } else { - Pico.m.z80_fakeval++; - zerosent = 0; - } - return d; - } else { - Pico.m.z80_fakeval = 0; - } - } - - Pico.m.z80_lastaddr = (u16) a; - return Pico.zram[a]; -} - - -// for nonstandard reads -static u32 UnusualRead16(u32 a, int realsize) -{ - u32 d=0; - - dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc); - - - dprintf("ret = %04x", d); - return d; -} - -static u32 OtherRead16(u32 a, int realsize) +static u32 OtherRead16End(u32 a, int realsize) { u32 d=0; - if ((a&0xff0000)==0xa00000) { - if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped) - if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled - d=0xffff; goto end; - } - if ((a&0xffffe0)==0xa10000) { // I/O ports - a=(a>>1)&0xf; - switch(a) { - case 0: d=Pico.m.hardware; break; // Hardware value (Version register) - case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break; - case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break; - default: d=Pico.ioports[a]; break; // IO ports can be used as RAM - } - d|=d<<8; - goto end; - } - // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers - if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; } - - if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; } - if ((a&0xffffc0)==0xa12000) { d=m68k_reg_read16(a); goto end; } - d = UnusualRead16(a, realsize); + dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc); end: return d; } -//extern UINT32 mz80GetRegisterValue(void *, UINT32); -static void OtherWrite8(u32 a,u32 d,int realsize) +static void OtherWrite8End(u32 a, u32 d, int realsize) { - if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound - if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram - if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound - if ((a&0xffffe0)==0xa10000) { // I/O ports - a=(a>>1)&0xf; - // 6 button gamepad: if TH went from 0 to 1, gamepad changes state - if(PicoOpt&0x20) { - if(a==1) { - Pico.m.padDelay[0] = 0; - if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++; - } - else if(a==2) { - Pico.m.padDelay[1] = 0; - if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++; - } - } - Pico.ioports[a]=(u8)d; // IO ports can be used as RAM - return; - } - if (a==0xa11100) { - extern int z80startCycle, z80stopCycle; - //int lineCycles=(488-SekCyclesLeft)&0x1ff; - d&=1; d^=1; - if(!d) { - // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III) - if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20); - z80stopCycle = SekCyclesDone(); - //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints() - } else { - z80startCycle = SekCyclesDone(); - //if(Pico.m.scanline != -1) - //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16; - } - //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc); - Pico.m.z80Run=(u8)d; return; - } - if (a==0xa11200) { if(!(d&1)) z80_reset(); return; } - - if ((a&0xff7f00)==0xa06000) // Z80 BANK register - { - Pico.m.z80_bank68k>>=1; - Pico.m.z80_bank68k|=(d&1)<<8; - Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one - return; - } - - if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored - if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; } - dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); + dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc); } -static void OtherWrite16(u32 a,u32 d) -{ - if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } - if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only) - - if ((a&0xffffe0)==0xa10000) { // I/O ports - a=(a>>1)&0xf; - // 6 button gamepad: if TH went from 0 to 1, gamepad changes state - if(PicoOpt&0x20) { - if(a==1) { - Pico.m.padDelay[0] = 0; - if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++; - } - else if(a==2) { - Pico.m.padDelay[1] = 0; - if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++; - } - } - Pico.ioports[a]=(u8)d; // IO ports can be used as RAM - return; - } - if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; } - if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; } - OtherWrite8(a, d>>8, 16); - OtherWrite8(a+1,d&0xff, 16); -} +#undef _ASM_MEMORY_C +#include "../MemoryCmn.c" + // ----------------------------------------------------------------- // Read Rom and read Ram @@ -463,22 +343,36 @@ u8 PicoReadM68k8(u32 a) goto end; } +#if 0 + if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000) + { + int i; + FILE *ff; + unsigned short *ram = (unsigned short *) Pico.ram; + // unswap and dump RAM + for (i = 0; i < 0x10000/2; i++) + ram[i] = (ram[i]>>8) | (ram[i]<<8); + ff = fopen("ram.bin", "wb"); + fwrite(ram, 1, 0x10000, ff); + fclose(ff); + exit(0); + } +#endif + // word RAM if ((a&0xfc0000)==0x200000) { - dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc); + wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc); if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - if (a >= 0x220000) { - dprintf("cell"); - } else { - a=((a&0x1fffe)<<1)|(a&1); - if (Pico_mcd->s68k_regs[3]&1) a+=2; - d = Pico_mcd->word_ram[a^1]; - } + int bank = Pico_mcd->s68k_regs[3]&1; + if (a >= 0x220000) + a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged + else a &= 0x1ffff; + d = Pico_mcd->word_ram1M[bank][a^1]; } else { // allow access in any mode, like Gens does - d = Pico_mcd->word_ram[(a^1)&0x3ffff]; + d = Pico_mcd->word_ram2M[(a^1)&0x3ffff]; } - dprintf("ret = %02x", (u8)d); + wrdprintf("ret = %02x", (u8)d); goto end; } @@ -520,20 +414,18 @@ u16 PicoReadM68k16(u32 a) // word RAM if ((a&0xfc0000)==0x200000) { - dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc); + wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc); if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - if (a >= 0x220000) { - dprintf("cell"); - } else { - a=((a&0x1fffe)<<1); - if (Pico_mcd->s68k_regs[3]&1) a+=2; - d = *(u16 *)(Pico_mcd->word_ram+a); - } + int bank = Pico_mcd->s68k_regs[3]&1; + if (a >= 0x220000) + a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged + else a &= 0x1fffe; + d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a); } else { // allow access in any mode, like Gens does - d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); + d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); } - dprintf("ret = %04x", d); + wrdprintf("ret = %04x", d); goto end; } @@ -574,21 +466,24 @@ u32 PicoReadM68k32(u32 a) // word RAM if ((a&0xfc0000)==0x200000) { - dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc); + wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc); if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - if (a >= 0x220000) { - dprintf("cell"); + int bank = Pico_mcd->s68k_regs[3]&1; + if (a >= 0x220000) { // cell arranged + u32 a1, a2; + a1 = (a&2) | (cell_map(a >> 2) << 2); + if (a&2) a2 = cell_map((a+2) >> 2) << 2; + else a2 = a1 + 2; + d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16; + d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2); } else { - a=((a&0x1fffe)<<1); - if (Pico_mcd->s68k_regs[3]&1) a+=2; - d = *(u16 *)(Pico_mcd->word_ram+a) << 16; - d |= *(u16 *)(Pico_mcd->word_ram+a+4); + u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1]; } } else { // allow access in any mode, like Gens does - u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1]; + u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1]; } - dprintf("ret = %08x", d); + wrdprintf("ret = %08x", d); goto end; } @@ -636,18 +531,16 @@ void PicoWriteM68k8(u32 a,u8 d) // word RAM if ((a&0xfc0000)==0x200000) { - dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc); + wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc); if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - if (a >= 0x220000) { - dprintf("cell"); - } else { - a=((a&0x1fffe)<<1)|(a&1); - if (Pico_mcd->s68k_regs[3]&1) a+=2; - *(u8 *)(Pico_mcd->word_ram+(a^1))=d; - } + int bank = Pico_mcd->s68k_regs[3]&1; + if (a >= 0x220000) + a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged + else a &= 0x1ffff; + *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d; } else { // allow access in any mode, like Gens does - *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d; + *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d; } return; } @@ -682,18 +575,16 @@ void PicoWriteM68k16(u32 a,u16 d) // word RAM if ((a&0xfc0000)==0x200000) { - dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc); + wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc); if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - if (a >= 0x220000) { - dprintf("cell"); - } else { - a=((a&0x1fffe)<<1); - if (Pico_mcd->s68k_regs[3]&1) a+=2; - *(u16 *)(Pico_mcd->word_ram+a)=d; - } + int bank = Pico_mcd->s68k_regs[3]&1; + if (a >= 0x220000) + a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged + else a &= 0x1fffe; + *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d; } else { // allow access in any mode, like Gens does - *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d; + *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d; } return; } @@ -732,19 +623,23 @@ void PicoWriteM68k32(u32 a,u32 d) // word RAM if ((a&0xfc0000)==0x200000) { if (d != 0) // don't log clears - dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc); + wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc); if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - if (a >= 0x220000) { - dprintf("cell"); + int bank = Pico_mcd->s68k_regs[3]&1; + if (a >= 0x220000) { // cell arranged + u32 a1, a2; + a1 = (a&2) | (cell_map(a >> 2) << 2); + if (a&2) a2 = cell_map((a+2) >> 2) << 2; + else a2 = a1 + 2; + *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16; + *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d; } else { - a=((a&0x1fffe)<<1); - if (Pico_mcd->s68k_regs[3]&1) a+=2; - *(u16 *)(Pico_mcd->word_ram+a) = d>>16; - *(u16 *)(Pico_mcd->word_ram+a+4) = d; + u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + pm[0]=(u16)(d>>16); pm[1]=(u16)d; } } else { // allow access in any mode, like Gens does - u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); + u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); pm[0]=(u16)(d>>16); pm[1]=(u16)d; } return; @@ -753,22 +648,6 @@ void PicoWriteM68k32(u32 a,u32 d) if ((a&0xffffc0)==0xa12000) rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc); -#if 0 - if ((a&0x3f) == 0x1c && SekPc == 0xffff05ba) - { - int i; - FILE *ff; - unsigned short *ram = (unsigned short *) Pico.ram; - // unswap and dump RAM - for (i = 0; i < 0x10000/2; i++) - ram[i] = (ram[i]>>8) | (ram[i]<<8); - ff = fopen("ram.bin", "wb"); - fwrite(ram, 1, 0x10000, ff); - fclose(ff); - exit(0); - } -#endif - OtherWrite16(a, (u16)(d>>16)); OtherWrite16(a+2,(u16)d); } @@ -793,7 +672,7 @@ u8 PicoReadS68k8(u32 a) if ((a&0xfffe00) == 0xff8000) { a &= 0x1ff; rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k); - if (a >= 0x50 && a < 0x68) + if (a >= 0x58 && a < 0x68) d = gfx_cd_read(a&~1); else d = s68k_reg_read16(a&~1); if ((a&1)==0) d>>=8; @@ -803,24 +682,45 @@ u8 PicoReadS68k8(u32 a) // word RAM (2M area) if ((a&0xfc0000)==0x080000) { // 080000-0bffff - dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc); - if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - // TODO (decode) - dprintf("(decode)"); + // test: batman returns + wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k); + if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode? + int bank = !(Pico_mcd->s68k_regs[3]&1); + d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]; + if (a&1) d &= 0x0f; + else d >>= 4; + dprintf("FIXME: decode"); } else { // allow access in any mode, like Gens does - d = Pico_mcd->word_ram[(a^1)&0x3ffff]; + d = Pico_mcd->word_ram2M[(a^1)&0x3ffff]; } - dprintf("ret = %02x", (u8)d); + wrdprintf("ret = %02x", (u8)d); goto end; } // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff - dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc); - a=((a&0x1fffe)<<1)|(a&1); - if (!(Pico_mcd->s68k_regs[3]&1)) a+=2; - d = Pico_mcd->word_ram[a^1]; + int bank; + wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k); +// if (!(Pico_mcd->s68k_regs[3]&4)) +// dprintf("s68k_wram1M FIXME: wrong mode"); + bank = !(Pico_mcd->s68k_regs[3]&1); + d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff]; + wrdprintf("ret = %02x", (u8)d); + goto end; + } + + // PCM + if ((a&0xff8000)==0xff0000) { + dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k); + a &= 0x7fff; + if (a >= 0x2000) + d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff]; + else if (a >= 0x20) { + a &= 0x1e; + d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT; + if (a & 2) d >>= 8; + } dprintf("ret = %02x", (u8)d); goto end; } @@ -844,7 +744,7 @@ u8 PicoReadS68k8(u32 a) u16 PicoReadS68k16(u32 a) { - u16 d=0; + u32 d=0; a&=0xfffffe; @@ -858,7 +758,7 @@ u16 PicoReadS68k16(u32 a) if ((a&0xfffe00) == 0xff8000) { a &= 0x1fe; rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k); - if (a >= 0x50 && a < 0x68) + if (a >= 0x58 && a < 0x68) d = gfx_cd_read(a); else d = s68k_reg_read16(a); rdprintf("ret = %04x", d); @@ -867,38 +767,57 @@ u16 PicoReadS68k16(u32 a) // word RAM (2M area) if ((a&0xfc0000)==0x080000) { // 080000-0bffff - dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc); - if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - // TODO (decode) - dprintf("(decode)"); + wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k); + if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode? + int bank = !(Pico_mcd->s68k_regs[3]&1); + d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]; + d |= d << 4; d &= ~0xf0; + dprintf("FIXME: decode"); } else { // allow access in any mode, like Gens does - d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); + d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); } - dprintf("ret = %04x", d); + wrdprintf("ret = %04x", d); goto end; } // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff - dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc); - a=((a&0x1fffe)<<1); - if (!(Pico_mcd->s68k_regs[3]&1)) a+=2; - d = *(u16 *)(Pico_mcd->word_ram+a); - dprintf("ret = %04x", d); + int bank; + wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k); +// if (!(Pico_mcd->s68k_regs[3]&4)) +// dprintf("s68k_wram1M FIXME: wrong mode"); + bank = !(Pico_mcd->s68k_regs[3]&1); + d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + wrdprintf("ret = %04x", d); goto end; } // bram if ((a&0xff0000)==0xfe0000) { - dprintf("s68k_bram r16: [%06x] @%06x", a, SekPc); + dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k); a = (a>>1)&0x1fff; - d = Pico_mcd->bram[a++]; // Gens does little endian here, an so do we.. + d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we.. d|= Pico_mcd->bram[a++] << 8; dprintf("ret = %04x", d); goto end; } + // PCM + if ((a&0xff8000)==0xff0000) { + dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k); + a &= 0x7fff; + if (a >= 0x2000) + d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff]; + else if (a >= 0x20) { + a &= 0x1e; + d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT; + if (a & 2) d >>= 8; + } + dprintf("ret = %04x", d); + goto end; + } + dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k); end: @@ -927,7 +846,7 @@ u32 PicoReadS68k32(u32 a) if ((a&0xfffe00) == 0xff8000) { a &= 0x1fe; rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k); - if (a >= 0x50 && a < 0x68) + if (a >= 0x58 && a < 0x68) d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2); else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2); rdprintf("ret = %08x", d); @@ -936,32 +855,60 @@ u32 PicoReadS68k32(u32 a) // word RAM (2M area) if ((a&0xfc0000)==0x080000) { // 080000-0bffff - dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc); - if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - // TODO (decode) - dprintf("(decode)"); + wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k); + if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode? + int bank = !(Pico_mcd->s68k_regs[3]&1); + a >>= 1; + d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16; + d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff]; + d |= d << 4; d &= 0x0f0f0f0f; + dprintf("FIXME: decode"); } else { // allow access in any mode, like Gens does - u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1]; + u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1]; } - dprintf("ret = %08x", d); + wrdprintf("ret = %08x", d); goto end; } // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff - dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPc); - a=((a&0x1fffe)<<1); - if (!(Pico_mcd->s68k_regs[3]&1)) a+=2; - d = *(u16 *)(Pico_mcd->word_ram+a) << 16; - d |= *(u16 *)(Pico_mcd->word_ram+a+4); + int bank; + wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k); +// if (!(Pico_mcd->s68k_regs[3]&4)) +// dprintf("s68k_wram1M FIXME: wrong mode"); + bank = !(Pico_mcd->s68k_regs[3]&1); + u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1]; + wrdprintf("ret = %08x", d); + goto end; + } + + // PCM + if ((a&0xff8000)==0xff0000) { + dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k); + a &= 0x7fff; + if (a >= 0x2000) { + a >>= 1; + d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16; + d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff]; + } else if (a >= 0x20) { + a &= 0x1e; + if (a & 2) { + a >>= 2; + d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000; + d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff; + } else { + d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT; + d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE + } + } dprintf("ret = %08x", d); goto end; } // bram if ((a&0xff0000)==0xfe0000) { - dprintf("s68k_bram r32: [%06x] @%06x", a, SekPc); + dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k); a = (a>>1)&0x1fff; d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion.. d|= Pico_mcd->bram[a++] << 24; @@ -999,14 +946,11 @@ void PicoWriteS68k8(u32 a,u8 d) return; } - if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack - return; - // regs if ((a&0xfffe00) == 0xff8000) { a &= 0x1ff; rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k); - if (a >= 0x50 && a < 0x68) + if (a >= 0x58 && a < 0x68) gfx_cd_write(a&~1, (d<<8)|d); else s68k_reg_write8(a,d); return; @@ -1014,24 +958,40 @@ void PicoWriteS68k8(u32 a,u8 d) // word RAM (2M area) if ((a&0xfc0000)==0x080000) { // 080000-0bffff - dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc); - if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - // TODO (decode) - dprintf("(decode)"); + wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k); + if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode? + int bank = !(Pico_mcd->s68k_regs[3]&1); + if (a&1) d &= 0x0f; + else d >>= 4; + Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]=d; + dprintf("FIXME: decode"); } else { // allow access in any mode, like Gens does - *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d; + *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d; } return; } // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff + // Wing Commander tries to write here in wrong mode + int bank; if (d) - dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc); - a=((a&0x1fffe)<<1)|(a&1); - if (!(Pico_mcd->s68k_regs[3]&1)) a+=2; - *(u8 *)(Pico_mcd->word_ram+(a^1))=d; + wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k); +// if (!(Pico_mcd->s68k_regs[3]&4)) +// dprintf("s68k_wram1M FIXME: wrong mode"); + bank = !(Pico_mcd->s68k_regs[3]&1); + *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d; + return; + } + + // PCM + if ((a&0xff8000)==0xff0000) { + a &= 0x7fff; + if (a >= 0x2000) + Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d; + else if (a < 0x12) + pcm_write(a>>1, d); return; } @@ -1064,9 +1024,13 @@ void PicoWriteS68k16(u32 a,u16 d) if ((a&0xfffe00) == 0xff8000) { a &= 0x1fe; rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k); - if (a >= 0x50 && a < 0x68) + if (a >= 0x58 && a < 0x68) gfx_cd_write(a, d); else { + if (a == 0xe) { // special case, 2 byte writes would be handled differently + Pico_mcd->s68k_regs[0xf] = d; + return; + } s68k_reg_write8(a, d>>8); s68k_reg_write8(a+1,d&0xff); } @@ -1075,30 +1039,44 @@ void PicoWriteS68k16(u32 a,u16 d) // word RAM (2M area) if ((a&0xfc0000)==0x080000) { // 080000-0bffff - dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc); - if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - // TODO (decode) - dprintf("(decode)"); + wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k); + if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode? + int bank = !(Pico_mcd->s68k_regs[3]&1); + d &= ~0xf0; d |= d >> 8; + Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff] = d; + dprintf("FIXME: decode"); } else { // allow access in any mode, like Gens does - *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d; + *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d; } return; } // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff + int bank; if (d) - dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc); - a=((a&0x1fffe)<<1); - if (!(Pico_mcd->s68k_regs[3]&1)) a+=2; - *(u16 *)(Pico_mcd->word_ram+a)=d; + wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k); +// if (!(Pico_mcd->s68k_regs[3]&4)) +// dprintf("s68k_wram1M FIXME: wrong mode"); + bank = !(Pico_mcd->s68k_regs[3]&1); + *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d; + return; + } + + // PCM + if ((a&0xff8000)==0xff0000) { + a &= 0x7fff; + if (a >= 0x2000) + Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d; + else if (a < 0x12) + pcm_write(a>>1, d & 0xff); return; } // bram if ((a&0xff0000)==0xfe0000) { - dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPc); + dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k); a = (a>>1)&0x1fff; Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we.. Pico_mcd->bram[a++] = d >> 8; @@ -1129,7 +1107,7 @@ void PicoWriteS68k32(u32 a,u32 d) if ((a&0xfffe00) == 0xff8000) { a &= 0x1fe; rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k); - if (a >= 0x50 && a < 0x68) { + if (a >= 0x58 && a < 0x68) { gfx_cd_write(a, d>>16); gfx_cd_write(a+2, d&0xffff); } else { @@ -1143,13 +1121,17 @@ void PicoWriteS68k32(u32 a,u32 d) // word RAM (2M area) if ((a&0xfc0000)==0x080000) { // 080000-0bffff - dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc); - if (Pico_mcd->s68k_regs[3]&4) { // 1M mode? - // TODO (decode) - dprintf("(decode)"); + wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k); + if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode? + int bank = !(Pico_mcd->s68k_regs[3]&1); + a >>= 1; + d &= 0x0f0f0f0f; d |= d >> 4; + Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] = d >> 16; + Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff] = d; + dprintf("FIXME: decode"); } else { // allow access in any mode, like Gens does - u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); + u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); pm[0]=(u16)(d>>16); pm[1]=(u16)d; } return; @@ -1157,18 +1139,36 @@ void PicoWriteS68k32(u32 a,u32 d) // word RAM (1M area) if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff + int bank; + u16 *pm; if (d) - dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc); - a=((a&0x1fffe)<<1); - if (!(Pico_mcd->s68k_regs[3]&1)) a+=2; - *(u16 *)(Pico_mcd->word_ram+a) = d>>16; - *(u16 *)(Pico_mcd->word_ram+a+4) = d; + wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k); +// if (!(Pico_mcd->s68k_regs[3]&4)) +// dprintf("s68k_wram1M FIXME: wrong mode"); + bank = !(Pico_mcd->s68k_regs[3]&1); + pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + pm[0]=(u16)(d>>16); pm[1]=(u16)d; + return; + } + + // PCM + if ((a&0xff8000)==0xff0000) { + a &= 0x7fff; + if (a >= 0x2000) { + a >>= 1; + Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16); + Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d; + } else if (a < 0x12) { + a >>= 1; + pcm_write(a, (d>>16) & 0xff); + pcm_write(a+1, d & 0xff); + } return; } // bram if ((a&0xff0000)==0xfe0000) { - dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPc); + dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k); a = (a>>1)&0x1fff; Pico_mcd->bram[a++] = d >> 16; // middle endian? verify? Pico_mcd->bram[a++] = d >> 24; @@ -1185,6 +1185,100 @@ void PicoWriteS68k32(u32 a,u32 d) // ----------------------------------------------------------------- + +#if defined(EMU_C68K) +static __inline int PicoMemBaseM68k(u32 pc) +{ + if ((pc&0xe00000)==0xe00000) + return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram + + if (pc < 0x20000) + return (int)Pico_mcd->bios; // Program Counter in BIOS + + if ((pc&0xfc0000)==0x200000) + { + if (!(Pico_mcd->s68k_regs[3]&4)) + return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram + if (pc < 0x220000) { + int bank = (Pico_mcd->s68k_regs[3]&1); + return (int)Pico_mcd->word_ram1M[bank] - 0x200000; + } + } + + // Error - Program Counter is invalid + dprintf("m68k FIXME: unhandled jump to %06x", pc); + + return (int)Pico_mcd->bios; +} + + +static u32 PicoCheckPcM68k(u32 pc) +{ + pc-=PicoCpu.membase; // Get real pc + pc&=0xfffffe; + + PicoCpu.membase=PicoMemBaseM68k(pc); + + return PicoCpu.membase+pc; +} + + +static __inline int PicoMemBaseS68k(u32 pc) +{ + if (pc < 0x80000) // PRG RAM + return (int)Pico_mcd->prg_ram; + + if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..) + return (int)Pico_mcd->word_ram2M - 0x080000; + + if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area + int bank = !(Pico_mcd->s68k_regs[3]&1); + return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000; + } + + // Error - Program Counter is invalid + dprintf("s68k FIXME: unhandled jump to %06x", pc); + + return (int)Pico_mcd->prg_ram; +} + + +static u32 PicoCheckPcS68k(u32 pc) +{ + pc-=PicoCpuS68k.membase; // Get real pc + pc&=0xfffffe; + + PicoCpuS68k.membase=PicoMemBaseS68k(pc); + + return PicoCpuS68k.membase+pc; +} +#endif + + +void PicoMemSetupCD() +{ + dprintf("PicoMemSetupCD()"); +#ifdef EMU_C68K + // Setup m68k memory callbacks: + PicoCpu.checkpc=PicoCheckPcM68k; + PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8; + PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16; + PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32; + PicoCpu.write8 =PicoWriteM68k8; + PicoCpu.write16=PicoWriteM68k16; + PicoCpu.write32=PicoWriteM68k32; + // s68k + PicoCpuS68k.checkpc=PicoCheckPcS68k; + PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8; + PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16; + PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32; + PicoCpuS68k.write8 =PicoWriteS68k8; + PicoCpuS68k.write16=PicoWriteS68k16; + PicoCpuS68k.write32=PicoWriteS68k32; +#endif +} + + #ifdef EMU_M68K unsigned char PicoReadCD8w (unsigned int a) { return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a); @@ -1210,10 +1304,25 @@ unsigned int m68k_read_pcrelative_CD8 (unsigned int a) { a&=0xffffff; if(m68ki_cpu_p == &PicoS68kCPU) { if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram - else dprintf("s68k read_pcrel8 @ %06x", a); + if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff) + return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff)); + if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff) + int bank = !(Pico_mcd->s68k_regs[3]&1); + return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff)); + } + dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a); } else { - if(as68k_regs[3]&4)) // 2M? + return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff)); + else if (a < 0x220000) { + int bank = Pico_mcd->s68k_regs[3]&1; + return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff)); + } + } + dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a); } return 0;//(u8) lastread_d; } @@ -1221,23 +1330,56 @@ unsigned int m68k_read_pcrelative_CD16(unsigned int a) { a&=0xffffff; if(m68ki_cpu_p == &PicoS68kCPU) { if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram - else dprintf("s68k read_pcrel16 @ %06x", a); + if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff) + return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); + if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff) + int bank = !(Pico_mcd->s68k_regs[3]&1); + return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + } + dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a); } else { - if(as68k_regs[3]&4)) // 2M? + return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); + else if (a < 0x220000) { + int bank = Pico_mcd->s68k_regs[3]&1; + return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + } + } + dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a); } - return 0;//(u16) lastread_d; + return 0; } unsigned int m68k_read_pcrelative_CD32(unsigned int a) { + u16 *pm; a&=0xffffff; if(m68ki_cpu_p == &PicoS68kCPU) { if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram - else dprintf("s68k read_pcrel32 @ %06x", a); + if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff) + { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; } + if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff) + int bank = !(Pico_mcd->s68k_regs[3]&1); + pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + return (pm[0]<<16)|pm[1]; + } + dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a); } else { - if(as68k_regs[3]&4)) // 2M? + { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; } + else if (a < 0x220000) { + int bank = Pico_mcd->s68k_regs[3]&1; + pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); + return (pm[0]<<16)|pm[1]; + } + } + dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a); } - return 0; //lastread_d; + return 0; } #endif // EMU_M68K