X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2Fcd%2FMemory.c;h=c941806e4c0a80e589a06d848e765ec850c79b58;hb=1cd356a33daf2eec34e52c075b06d62866f5fb2f;hp=b8322d8aba690ce0eae7ecdea8d6bacd4b11fb8a;hpb=cc68a136aa179a5f32fe40208371eb9c2b0aadae;p=picodrive.git

diff --git a/Pico/cd/Memory.c b/Pico/cd/Memory.c
index b8322d8..c941806 100644
--- a/Pico/cd/Memory.c
+++ b/Pico/cd/Memory.c
@@ -1,7 +1,7 @@
 // This is part of Pico Library
 
 // (c) Copyright 2004 Dave, All rights reserved.
-// (c) Copyright 2006 notaz, All rights reserved.
+// (c) Copyright 2007 notaz, All rights reserved.
 // Free for non-commercial use.
 
 // For commercial use, separate licencing terms must be obtained.
@@ -16,42 +16,51 @@
 #include "../sound/ym2612.h"
 #include "../sound/sn76496.h"
 
+#include "gfx_cd.h"
+#include "pcm.h"
+
 typedef unsigned char  u8;
 typedef unsigned short u16;
 typedef unsigned int   u32;
 
 //#define __debug_io
 //#define __debug_io2
+//#define rdprintf dprintf
+#define rdprintf(...)
 
 // -----------------------------------------------------------------
 
-extern m68ki_cpu_core m68ki_cpu;
-
-extern int counter75hz;
-
 
-static u32 m68k_reg_read16(u32 a, int realsize)
+static u32 m68k_reg_read16(u32 a)
 {
   u32 d=0;
   a &= 0x3e;
-  dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
+  // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
 
   switch (a) {
+    case 0:
+      d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
+      goto end;
     case 2:
-      d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1] | 1; // for now 2M to m68k
+      d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
+      dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
+      goto end;
+    case 4:
+      d = Pico_mcd->s68k_regs[4]<<8;
+      goto end;
+    case 6:
+      d = Pico_mcd->m.hint_vector;
       goto end;
     case 8:
-      dprintf("m68k host data read");
       d = Read_CDC_Host(0);
       goto end;
+    case 0xA:
+      dprintf("m68k reserved read");
+      goto end;
     case 0xC:
-      dprintf("m68k stopwatch read");
-      break;
-  }
-
-  if (a < 0xE) {
-    d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1];
-    goto end;
+      dprintf("m68k stopwatch timer read");
+      d = Pico_mcd->m.timer_stopwatch >> 16;
+      goto end;
   }
 
   if (a < 0x30) {
@@ -64,77 +73,97 @@ static u32 m68k_reg_read16(u32 a, int realsize)
 
 end:
 
-  dprintf("ret = %04x", d);
+  // dprintf("ret = %04x", d);
   return d;
 }
 
-static void m68k_reg_write8(u32 a, u32 d, int realsize)
+static void m68k_reg_write8(u32 a, u32 d)
 {
   a &= 0x3f;
-  dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
+  // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
 
   switch (a) {
     case 0:
+      d &= 1;
       if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
-      break;
+      return;
     case 1:
-      if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset
-      if ( (Pico_mcd->m68k_regs[1]&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
-      if ( (Pico_mcd->m68k_regs[1]&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
-      if (/*!(Pico_mcd->m68k_regs[1]&1) &&*/ (PicoMCD&2) && (d&3)==1) {
+      d &= 3;
+      if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
+      if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
+      if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
+      if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
         SekResetS68k(); // S68k comes out of RESET or BRQ state
-	PicoMCD&=~2;
-	dprintf("m68k: resetting s68k");
+	Pico_mcd->m.state_flags&=~1;
+	dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
       }
-      break;
+      Pico_mcd->m.busreq = d;
+      return;
+    case 2:
+      Pico_mcd->s68k_regs[2] = d; // really use s68k side register
+      return;
     case 3:
-      if ((Pico_mcd->m68k_regs[3]>>6) != ((d>>6)&3))
-        dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->m68k_regs[a]>>6), ((d>>6)&3));
-      if ((Pico_mcd->m68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
-      if ((Pico_mcd->m68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
-                                                   ((d&2) ? "word ram to s68k" : "word ram to m68k"));
-      break;
+      dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
+      d &= 0xc2;
+      if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
+        dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
+      //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
+      //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
+      //                                             ((d&2) ? "word ram to s68k" : "word ram to m68k"));
+      d |= Pico_mcd->s68k_regs[3]&0x1d;
+      if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
+      Pico_mcd->s68k_regs[3] = d; // really use s68k side register
+      return;
+    case 6:
+      *((char *)&Pico_mcd->m.hint_vector+1) = d;
+      Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
+      return;
+    case 7:
+      *(char *)&Pico_mcd->m.hint_vector = d;
+      Pico_mcd->bios[0x72] = d;
+      return;
     case 0xe:
-      dprintf("m68k: comm flag: %02x", d);
-
-      dprintf("s68k @ %06x", SekPcS68k);
-
+      //dprintf("m68k: comm flag: %02x", d);
       Pico_mcd->s68k_regs[0xe] = d;
-      break;
+      return;
   }
 
-  if ((a&0xff) == 0x10) {
+  if ((a&0xf0) == 0x10) {
       Pico_mcd->s68k_regs[a] = d;
+      return;
   }
 
-  if (a >= 0x20 || (a >= 0xa && a <= 0xd) || a == 0x0f)
-    dprintf("m68k: invalid write?");
-
-  if (a < 0x10)
-    Pico_mcd->m68k_regs[a] = (u8) d;
+  dprintf("m68k: invalid write? [%02x] %02x", a, d);
 }
 
 
 
-static u32 s68k_reg_read16(u32 a, int realsize)
+static u32 s68k_reg_read16(u32 a)
 {
   u32 d=0;
-  a &= 0x1fe;
 
-  dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
+  // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
 
   switch (a) {
     case 0:
-      d = 1; goto end; // ver = 0, not in reset state
+      d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
+      goto end;
+    case 2:
+      d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
+      dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
+      goto end;
     case 6:
       d = CDC_Read_Reg();
       goto end;
     case 8:
-      dprintf("s68k host data read");
-      d = Read_CDC_Host(1);
+      d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
       goto end;
     case 0xC:
-      dprintf("s68k stopwatch read");
+      dprintf("s68k stopwatch timer read");
+      d = Pico_mcd->m.timer_stopwatch >> 16;
+      goto end;
+    case 0x30:
+      dprintf("s68k int3 timer read");
       break;
     case 0x34: // fader
       d = 0; // no busy bit
@@ -145,24 +174,36 @@ static u32 s68k_reg_read16(u32 a, int realsize)
 
 end:
 
-  dprintf("ret = %04x", d);
+  // dprintf("ret = %04x", d);
 
   return d;
 }
 
-static void s68k_reg_write8(u32 a, u32 d, int realsize)
+static void s68k_reg_write8(u32 a, u32 d)
 {
-  a &= 0x1ff;
-  dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
+  //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
 
   // TODO: review against Gens
   switch (a) {
+    case 2:
+      return; // only m68k can change WP
+    case 3:
+      dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
+      d &= 0x1d;
+      if (d&4) {
+        d |= Pico_mcd->s68k_regs[3]&0xc2;
+        if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
+      } else {
+        d |= Pico_mcd->s68k_regs[3]&0xc3;
+        if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
+      }
+      break;
     case 4:
       dprintf("s68k CDC dest: %x", d&7);
       Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
       return;
     case 5:
-      dprintf("s68k CDC reg addr: %x", d&0xf);
+      //dprintf("s68k CDC reg addr: %x", d&0xf);
       break;
     case 7:
       CDC_Write_Reg(d);
@@ -170,31 +211,47 @@ static void s68k_reg_write8(u32 a, u32 d, int realsize)
     case 0xa:
       dprintf("s68k set CDC dma addr");
       break;
+    case 0xc:
+    case 0xd:
+      dprintf("s68k set stopwatch timer");
+      Pico_mcd->m.timer_stopwatch = 0;
+      return;
+    case 0xe:
+      Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
+      Pico_mcd->m.timer_stopwatch = 0;
+      return;
+    case 0x31:
+      dprintf("s68k set int3 timer: %02x", d);
+      Pico_mcd->m.timer_int3 = d << 16;
+      break;
     case 0x33: // IRQ mask
       dprintf("s68k irq mask: %02x", d);
       if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
         CDD_Export_Status();
-	// counter75hz = 0; // ???
       }
       break;
     case 0x34: // fader
       Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
       return;
-    case 0x37:
-      if ((d&4) && !(Pico_mcd->s68k_regs[0x37]&4)) {
+    case 0x36:
+      return; // d/m bit is unsetable
+    case 0x37: {
+      u32 d_old = Pico_mcd->s68k_regs[0x37];
+      Pico_mcd->s68k_regs[0x37] = d&7;
+      if ((d&4) && !(d_old&4)) {
         CDD_Export_Status();
-	// counter75hz = 0; // ???
       }
-      break;
+      return;
+    }
     case 0x4b:
       Pico_mcd->s68k_regs[a] = (u8) d;
       CDD_Import_Command();
       return;
   }
 
-  if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))
+  if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
   {
-    dprintf("m68k: invalid write @ %02x?", a);
+    dprintf("s68k: invalid write @ %02x?", a);
     return;
   }
 
@@ -302,7 +359,10 @@ static u32 OtherRead16(u32 a, int realsize)
 
   if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
 
-  if ((a&0xffffc0)==0xa12000) { d=m68k_reg_read16(a, realsize); goto end; }
+  if ((a&0xffffc0)==0xa12000) {
+    d=m68k_reg_read16(a);
+    goto end;
+  }
 
   d = UnusualRead16(a, realsize);
 
@@ -362,7 +422,7 @@ static void OtherWrite8(u32 a,u32 d,int realsize)
 
   if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored
 
-  if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d, realsize); return; }
+  if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
 
   dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
 }
@@ -410,15 +470,56 @@ u8 PicoReadM68k8(u32 a)
 
   // prg RAM
   if ((a&0xfe0000)==0x020000) {
-    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];
+    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
     d = *(prg_bank+((a^1)&0x1ffff));
     goto end;
   }
 
+#if 0
+  if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
+  {
+	  int i;
+	  FILE *ff;
+	  unsigned short *ram = (unsigned short *) Pico.ram;
+	  // unswap and dump RAM
+	  for (i = 0; i < 0x10000/2; i++)
+		  ram[i] = (ram[i]>>8) | (ram[i]<<8);
+	  ff = fopen("ram.bin", "wb");
+	  fwrite(ram, 1, 0x10000, ff);
+	  fclose(ff);
+	  exit(0);
+  }
+#endif
+
+  // word RAM
+  if ((a&0xfc0000)==0x200000) {
+    dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      if (a >= 0x220000) {
+        dprintf("cell");
+      } else {
+        a=((a&0x1fffe)<<1)|(a&1);
+	if (Pico_mcd->s68k_regs[3]&1) a+=2;
+        d = Pico_mcd->word_ram[a^1];
+      }
+    } else {
+      // allow access in any mode, like Gens does
+      d = Pico_mcd->word_ram[(a^1)&0x3ffff];
+    }
+    dprintf("ret = %02x", (u8)d);
+    goto end;
+  }
+
   if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
 
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
+
   d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
 
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("ret = %02x", (u8)d);
+
   end:
 
 #ifdef __debug_io
@@ -427,6 +528,7 @@ u8 PicoReadM68k8(u32 a)
   return (u8)d;
 }
 
+
 u16 PicoReadM68k16(u32 a)
 {
   u16 d=0;
@@ -439,13 +541,38 @@ u16 PicoReadM68k16(u32 a)
 
   // prg RAM
   if ((a&0xfe0000)==0x020000) {
-    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];
+    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
     d = *(u16 *)(prg_bank+(a&0x1fffe));
     goto end;
   }
 
+  // word RAM
+  if ((a&0xfc0000)==0x200000) {
+    dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      if (a >= 0x220000) {
+        dprintf("cell");
+      } else {
+        a=((a&0x1fffe)<<1);
+	if (Pico_mcd->s68k_regs[3]&1) a+=2;
+        d = *(u16 *)(Pico_mcd->word_ram+a);
+      }
+    } else {
+      // allow access in any mode, like Gens does
+      d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
+    }
+    dprintf("ret = %04x", d);
+    goto end;
+  }
+
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
+
   d = (u16)OtherRead16(a, 16);
 
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("ret = %04x", d);
+
   end:
 
 #ifdef __debug_io
@@ -454,6 +581,7 @@ u16 PicoReadM68k16(u32 a)
   return d;
 }
 
+
 u32 PicoReadM68k32(u32 a)
 {
   u32 d=0;
@@ -466,14 +594,40 @@ u32 PicoReadM68k32(u32 a)
 
   // prg RAM
   if ((a&0xfe0000)==0x020000) {
-    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];
+    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
     u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
     d = (pm[0]<<16)|pm[1];
     goto end;
   }
 
+  // word RAM
+  if ((a&0xfc0000)==0x200000) {
+    dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      if (a >= 0x220000) {
+        dprintf("cell");
+      } else {
+        a=((a&0x1fffe)<<1);
+	if (Pico_mcd->s68k_regs[3]&1) a+=2;
+        d  = *(u16 *)(Pico_mcd->word_ram+a) << 16;
+        d |= *(u16 *)(Pico_mcd->word_ram+a+4);
+      }
+    } else {
+      // allow access in any mode, like Gens does
+      u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
+    }
+    dprintf("ret = %08x", d);
+    goto end;
+  }
+
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
+
   d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
 
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("ret = %08x", d);
+
   end:
 #ifdef __debug_io
   dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
@@ -481,6 +635,7 @@ u32 PicoReadM68k32(u32 a)
   return d;
 }
 
+
 // -----------------------------------------------------------------
 //                            Write Ram
 
@@ -493,44 +648,91 @@ void PicoWriteM68k8(u32 a,u8 d)
   //  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);
 
 
-  if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram
+  if ((a&0xe00000)==0xe00000) { // Ram
+    *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
+    return;
+  }
 
   a&=0xffffff;
 
   // prg RAM
   if ((a&0xfe0000)==0x020000) {
-    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];
-    u8 *pm=(u8 *)(prg_bank+((a^1)&0x1ffff));
-    *pm=d;
+    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
+    *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
+    return;
+  }
+
+  // word RAM
+  if ((a&0xfc0000)==0x200000) {
+    dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      if (a >= 0x220000) {
+        dprintf("cell");
+      } else {
+        a=((a&0x1fffe)<<1)|(a&1);
+	if (Pico_mcd->s68k_regs[3]&1) a+=2;
+        *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
+      }
+    } else {
+      // allow access in any mode, like Gens does
+      *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
+    }
     return;
   }
 
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
+
   OtherWrite8(a,d,8);
 }
 
+
 void PicoWriteM68k16(u32 a,u16 d)
 {
 #ifdef __debug_io
   dprintf("w16: %06x, %04x", a&0xffffff, d);
 #endif
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)
   //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);
 
-  if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram
+  if ((a&0xe00000)==0xe00000) { // Ram
+    *(u16 *)(Pico.ram+(a&0xfffe))=d;
+    return;
+  }
 
   a&=0xfffffe;
 
   // prg RAM
   if ((a&0xfe0000)==0x020000) {
-    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];
+    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
     *(u16 *)(prg_bank+(a&0x1fffe))=d;
     return;
   }
 
+  // word RAM
+  if ((a&0xfc0000)==0x200000) {
+    dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      if (a >= 0x220000) {
+        dprintf("cell");
+      } else {
+        a=((a&0x1fffe)<<1);
+	if (Pico_mcd->s68k_regs[3]&1) a+=2;
+        *(u16 *)(Pico_mcd->word_ram+a)=d;
+      }
+    } else {
+      // allow access in any mode, like Gens does
+      *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
+    }
+    return;
+  }
+
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
 
   OtherWrite16(a,d);
 }
 
+
 void PicoWriteM68k32(u32 a,u32 d)
 {
 #ifdef __debug_io
@@ -549,12 +751,35 @@ void PicoWriteM68k32(u32 a,u32 d)
 
   // prg RAM
   if ((a&0xfe0000)==0x020000) {
-    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];
+    u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
     u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
     pm[0]=(u16)(d>>16); pm[1]=(u16)d;
     return;
   }
 
+  // word RAM
+  if ((a&0xfc0000)==0x200000) {
+    if (d != 0) // don't log clears
+      dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      if (a >= 0x220000) {
+        dprintf("cell");
+      } else {
+        a=((a&0x1fffe)<<1);
+	if (Pico_mcd->s68k_regs[3]&1) a+=2;
+        *(u16 *)(Pico_mcd->word_ram+a) = d>>16;
+        *(u16 *)(Pico_mcd->word_ram+a+4) = d;
+      }
+    } else {
+      // allow access in any mode, like Gens does
+      u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
+      pm[0]=(u16)(d>>16); pm[1]=(u16)d;
+    }
+    return;
+  }
+
+  if ((a&0xffffc0)==0xa12000)
+    rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
 
   OtherWrite16(a,  (u16)(d>>16));
   OtherWrite16(a+2,(u16)d);
@@ -578,7 +803,58 @@ u8 PicoReadS68k8(u32 a)
 
   // regs
   if ((a&0xfffe00) == 0xff8000) {
-    d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
+    a &= 0x1ff;
+    rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
+    if (a >= 0x50 && a < 0x68)
+         d = gfx_cd_read(a&~1);
+    else d = s68k_reg_read16(a&~1);
+    if ((a&1)==0) d>>=8;
+    rdprintf("ret = %02x", (u8)d);
+    goto end;
+  }
+
+  // word RAM (2M area)
+  if ((a&0xfc0000)==0x080000) { // 080000-0bffff
+    dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      // TODO (decode)
+      dprintf("(decode)");
+    } else {
+      // allow access in any mode, like Gens does
+      d = Pico_mcd->word_ram[(a^1)&0x3ffff];
+    }
+    dprintf("ret = %02x", (u8)d);
+    goto end;
+  }
+
+  // word RAM (1M area)
+  if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
+    dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
+    a=((a&0x1fffe)<<1)|(a&1);
+    if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
+    d = Pico_mcd->word_ram[a^1];
+    dprintf("ret = %02x", (u8)d);
+    goto end;
+  }
+
+  // PCM
+  if ((a&0xff8000)==0xff0000) {
+    dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
+    a &= 0x7fff;
+    if (a >= 0x2000)
+      d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
+    else if (a >= 0x20) {
+      a &= 0x1e;
+      d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
+      if (a & 2) d >>= 8;
+    }
+    dprintf("ret = %02x", (u8)d);
+    goto end;
+  }
+
+  // bram
+  if ((a&0xff0000)==0xfe0000) {
+    d = Pico_mcd->bram[(a>>1)&0x1fff];
     goto end;
   }
 
@@ -592,9 +868,10 @@ u8 PicoReadS68k8(u32 a)
   return (u8)d;
 }
 
+
 u16 PicoReadS68k16(u32 a)
 {
-  u16 d=0;
+  u32 d=0;
 
   a&=0xfffffe;
 
@@ -606,7 +883,61 @@ u16 PicoReadS68k16(u32 a)
 
   // regs
   if ((a&0xfffe00) == 0xff8000) {
-    d = s68k_reg_read16(a, 16);
+    a &= 0x1fe;
+    rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
+    if (a >= 0x50 && a < 0x68)
+         d = gfx_cd_read(a);
+    else d = s68k_reg_read16(a);
+    rdprintf("ret = %04x", d);
+    goto end;
+  }
+
+  // word RAM (2M area)
+  if ((a&0xfc0000)==0x080000) { // 080000-0bffff
+    dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      // TODO (decode)
+      dprintf("(decode)");
+    } else {
+      // allow access in any mode, like Gens does
+      d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
+    }
+    dprintf("ret = %04x", d);
+    goto end;
+  }
+
+  // word RAM (1M area)
+  if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
+    dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
+    a=((a&0x1fffe)<<1);
+    if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
+    d = *(u16 *)(Pico_mcd->word_ram+a);
+    dprintf("ret = %04x", d);
+    goto end;
+  }
+
+  // bram
+  if ((a&0xff0000)==0xfe0000) {
+    dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
+    a = (a>>1)&0x1fff;
+    d = Pico_mcd->bram[a++];		// Gens does little endian here, and so do we..
+    d|= Pico_mcd->bram[a++] << 8;
+    dprintf("ret = %04x", d);
+    goto end;
+  }
+
+  // PCM
+  if ((a&0xff8000)==0xff0000) {
+    dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
+    a &= 0x7fff;
+    if (a >= 0x2000)
+      d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
+    else if (a >= 0x20) {
+      a &= 0x1e;
+      d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
+      if (a & 2) d >>= 8;
+    }
+    dprintf("ret = %04x", d);
     goto end;
   }
 
@@ -620,6 +951,7 @@ u16 PicoReadS68k16(u32 a)
   return d;
 }
 
+
 u32 PicoReadS68k32(u32 a)
 {
   u32 d=0;
@@ -635,7 +967,72 @@ u32 PicoReadS68k32(u32 a)
 
   // regs
   if ((a&0xfffe00) == 0xff8000) {
-    d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);
+    a &= 0x1fe;
+    rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
+    if (a >= 0x50 && a < 0x68)
+         d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
+    else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
+    rdprintf("ret = %08x", d);
+    goto end;
+  }
+
+  // word RAM (2M area)
+  if ((a&0xfc0000)==0x080000) { // 080000-0bffff
+    dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      // TODO (decode)
+      dprintf("(decode)");
+    } else {
+      // allow access in any mode, like Gens does
+      u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
+    }
+    dprintf("ret = %08x", d);
+    goto end;
+  }
+
+  // word RAM (1M area)
+  if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
+    dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
+    a=((a&0x1fffe)<<1);
+    if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
+    d  = *(u16 *)(Pico_mcd->word_ram+a) << 16;
+    d |= *(u16 *)(Pico_mcd->word_ram+a+4);
+    dprintf("ret = %08x", d);
+    goto end;
+  }
+
+  // PCM
+  if ((a&0xff8000)==0xff0000) {
+    dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
+    a &= 0x7fff;
+    if (a >= 0x2000) {
+      a >>= 1;
+      d  = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
+      d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
+    } else if (a >= 0x20) {
+      a &= 0x1e;
+      if (a & 2) {
+        a >>= 2;
+        d  = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
+        d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT)   & 0xff;
+      } else {
+        d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
+        d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
+      }
+    }
+    dprintf("ret = %08x", d);
+    goto end;
+  }
+
+  // bram
+  if ((a&0xff0000)==0xfe0000) {
+    dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
+    a = (a>>1)&0x1fff;
+    d = Pico_mcd->bram[a++] << 16;		// middle endian? TODO: verify against Fusion..
+    d|= Pico_mcd->bram[a++] << 24;
+    d|= Pico_mcd->bram[a++];
+    d|= Pico_mcd->bram[a++] << 8;
+    dprintf("ret = %08x", d);
     goto end;
   }
 
@@ -649,6 +1046,7 @@ u32 PicoReadS68k32(u32 a)
   return d;
 }
 
+
 // -----------------------------------------------------------------
 
 void PicoWriteS68k8(u32 a,u8 d)
@@ -668,13 +1066,58 @@ void PicoWriteS68k8(u32 a,u8 d)
 
   // regs
   if ((a&0xfffe00) == 0xff8000) {
-    s68k_reg_write8(a,d,8);
+    a &= 0x1ff;
+    rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
+    if (a >= 0x50 && a < 0x68)
+         gfx_cd_write(a&~1, (d<<8)|d);
+    else s68k_reg_write8(a,d);
+    return;
+  }
+
+  // word RAM (2M area)
+  if ((a&0xfc0000)==0x080000) { // 080000-0bffff
+    dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      // TODO (decode)
+      dprintf("(decode)");
+    } else {
+      // allow access in any mode, like Gens does
+      *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
+    }
+    return;
+  }
+
+  // word RAM (1M area)
+  if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
+    if (d)
+      dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
+    a=((a&0x1fffe)<<1)|(a&1);
+    if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
+    *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
+    return;
+  }
+
+  // PCM
+  if ((a&0xff8000)==0xff0000) {
+    a &= 0x7fff;
+    if (a >= 0x2000)
+      Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
+    else if (a < 0x12)
+      pcm_write(a>>1, d);
+    return;
+  }
+
+  // bram
+  if ((a&0xff0000)==0xfe0000) {
+    Pico_mcd->bram[(a>>1)&0x1fff] = d;
+    SRam.changed = 1;
     return;
   }
 
   dprintf("s68k w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPcS68k);
 }
 
+
 void PicoWriteS68k16(u32 a,u16 d)
 {
 #ifdef __debug_io2
@@ -691,14 +1134,68 @@ void PicoWriteS68k16(u32 a,u16 d)
 
   // regs
   if ((a&0xfffe00) == 0xff8000) {
-    s68k_reg_write8(a,  d>>8, 16);
-    s68k_reg_write8(a+1,d&0xff, 16);
+    a &= 0x1fe;
+    rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
+    if (a >= 0x50 && a < 0x68)
+      gfx_cd_write(a, d);
+    else {
+      if (a == 0xe) { // special case, 2 byte writes would be handled differently
+        Pico_mcd->s68k_regs[0xf] = d;
+	return;
+      }
+      s68k_reg_write8(a,  d>>8);
+      s68k_reg_write8(a+1,d&0xff);
+    }
+    return;
+  }
+
+  // word RAM (2M area)
+  if ((a&0xfc0000)==0x080000) { // 080000-0bffff
+    dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      // TODO (decode)
+      dprintf("(decode)");
+    } else {
+      // allow access in any mode, like Gens does
+      *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
+    }
+    return;
+  }
+
+  // word RAM (1M area)
+  if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
+    if (d)
+      dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
+    a=((a&0x1fffe)<<1);
+    if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
+    *(u16 *)(Pico_mcd->word_ram+a)=d;
+    return;
+  }
+
+  // PCM
+  if ((a&0xff8000)==0xff0000) {
+    a &= 0x7fff;
+    if (a >= 0x2000)
+      Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
+    else if (a < 0x12)
+      pcm_write(a>>1, d & 0xff);
+    return;
+  }
+
+  // bram
+  if ((a&0xff0000)==0xfe0000) {
+    dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
+    a = (a>>1)&0x1fff;
+    Pico_mcd->bram[a++] = d;		// Gens does little endian here, an so do we..
+    Pico_mcd->bram[a++] = d >> 8;
+    SRam.changed = 1;
     return;
   }
 
   dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
 }
 
+
 void PicoWriteS68k32(u32 a,u32 d)
 {
 #ifdef __debug_io2
@@ -716,10 +1213,69 @@ void PicoWriteS68k32(u32 a,u32 d)
 
   // regs
   if ((a&0xfffe00) == 0xff8000) {
-    s68k_reg_write8(a,   d>>24, 32);
-    s68k_reg_write8(a+1,(d>>16)&0xff, 32);
-    s68k_reg_write8(a+2,(d>>8) &0xff, 32);
-    s68k_reg_write8(a+3, d     &0xff, 32);
+    a &= 0x1fe;
+    rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
+    if (a >= 0x50 && a < 0x68) {
+      gfx_cd_write(a,   d>>16);
+      gfx_cd_write(a+2, d&0xffff);
+    } else {
+      s68k_reg_write8(a,   d>>24);
+      s68k_reg_write8(a+1,(d>>16)&0xff);
+      s68k_reg_write8(a+2,(d>>8) &0xff);
+      s68k_reg_write8(a+3, d     &0xff);
+    }
+    return;
+  }
+
+  // word RAM (2M area)
+  if ((a&0xfc0000)==0x080000) { // 080000-0bffff
+    dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
+    if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
+      // TODO (decode)
+      dprintf("(decode)");
+    } else {
+      // allow access in any mode, like Gens does
+      u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
+      pm[0]=(u16)(d>>16); pm[1]=(u16)d;
+    }
+    return;
+  }
+
+  // word RAM (1M area)
+  if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
+    if (d)
+      dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
+    a=((a&0x1fffe)<<1);
+    if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
+    *(u16 *)(Pico_mcd->word_ram+a) = d>>16;
+    *(u16 *)(Pico_mcd->word_ram+a+4) = d;
+    return;
+  }
+
+  // PCM
+  if ((a&0xff8000)==0xff0000) {
+    a &= 0x7fff;
+    if (a >= 0x2000) {
+      a >>= 1;
+      Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
+      Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
+    } else if (a < 0x12) {
+      a >>= 1;
+      pcm_write(a,  (d>>16) & 0xff);
+      pcm_write(a+1, d & 0xff);
+    }
+    return;
+  }
+
+  // bram
+  if ((a&0xff0000)==0xfe0000) {
+    dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
+    a = (a>>1)&0x1fff;
+    Pico_mcd->bram[a++] = d >> 16;		// middle endian? verify?
+    Pico_mcd->bram[a++] = d >> 24;
+    Pico_mcd->bram[a++] = d;
+    Pico_mcd->bram[a++] = d >> 8;
+    SRam.changed = 1;
     return;
   }
 
@@ -730,6 +1286,97 @@ void PicoWriteS68k32(u32 a,u32 d)
 
 // -----------------------------------------------------------------
 
+
+#if defined(EMU_C68K)
+static __inline int PicoMemBaseM68k(u32 pc)
+{
+  int membase=0;
+
+  if (pc < 0x20000)
+  {
+    membase=(int)Pico_mcd->bios; // Program Counter in BIOS
+  }
+  else if ((pc&0xe00000)==0xe00000)
+  {
+    membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
+  }
+  else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))
+  {
+    membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram
+  }
+  else
+  {
+    // Error - Program Counter is invalid
+    dprintf("m68k: unhandled jump to %06x", pc);
+    membase=(int)Pico.rom;
+  }
+
+  return membase;
+}
+
+
+static u32 PicoCheckPcM68k(u32 pc)
+{
+  pc-=PicoCpu.membase; // Get real pc
+  pc&=0xfffffe;
+
+  PicoCpu.membase=PicoMemBaseM68k(pc);
+
+  return PicoCpu.membase+pc;
+}
+
+
+static __inline int PicoMemBaseS68k(u32 pc)
+{
+  int membase;
+
+  membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM
+  if (pc >= 0x80000)
+  {
+    // Error - Program Counter is invalid
+    dprintf("s68k: unhandled jump to %06x", pc);
+  }
+
+  return membase;
+}
+
+
+static u32 PicoCheckPcS68k(u32 pc)
+{
+  pc-=PicoCpuS68k.membase; // Get real pc
+  pc&=0xfffffe;
+
+  PicoCpuS68k.membase=PicoMemBaseS68k(pc);
+
+  return PicoCpuS68k.membase+pc;
+}
+#endif
+
+
+void PicoMemSetupCD()
+{
+  dprintf("PicoMemSetupCD()");
+#ifdef EMU_C68K
+  // Setup m68k memory callbacks:
+  PicoCpu.checkpc=PicoCheckPcM68k;
+  PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
+  PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
+  PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
+  PicoCpu.write8 =PicoWriteM68k8;
+  PicoCpu.write16=PicoWriteM68k16;
+  PicoCpu.write32=PicoWriteM68k32;
+  // s68k
+  PicoCpuS68k.checkpc=PicoCheckPcS68k;
+  PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
+  PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
+  PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
+  PicoCpuS68k.write8 =PicoWriteS68k8;
+  PicoCpuS68k.write16=PicoWriteS68k16;
+  PicoCpuS68k.write32=PicoWriteS68k32;
+#endif
+}
+
+
 #ifdef EMU_M68K
 unsigned char  PicoReadCD8w (unsigned int a) {
 	return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
@@ -755,10 +1402,13 @@ unsigned int  m68k_read_pcrelative_CD8 (unsigned int a) {
   a&=0xffffff;
   if(m68ki_cpu_p == &PicoS68kCPU) {
     if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
-    else dprintf("s68k read_pcrel8 @ %06x", a);
+    dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);
   } else {
-    if(a<Pico.romsize)         return *(u8 *)(Pico.rom+(a^1)); // Rom
+    if(a<0x20000)              return *(u8 *)(Pico.rom+(a^1)); // Bios
     if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
+    if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)
+      return Pico_mcd->word_ram[(a^1)&0x3fffe];
+    dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);
   }
   return 0;//(u8)  lastread_d;
 }
@@ -766,23 +1416,29 @@ unsigned int  m68k_read_pcrelative_CD16(unsigned int a) {
   a&=0xffffff;
   if(m68ki_cpu_p == &PicoS68kCPU) {
     if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
-    else dprintf("s68k read_pcrel16 @ %06x", a);
+    dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);
   } else {
-    if(a<Pico.romsize)         return *(u16 *)(Pico.rom+(a&~1)); // Rom
+    if(a<0x20000)              return *(u16 *)(Pico.rom+(a&~1)); // Bios
     if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
+    if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)
+      return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
+    dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);
   }
-  return 0;//(u16) lastread_d;
+  return 0;
 }
 unsigned int  m68k_read_pcrelative_CD32(unsigned int a) {
   a&=0xffffff;
   if(m68ki_cpu_p == &PicoS68kCPU) {
     if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
-    else dprintf("s68k read_pcrel32 @ %06x", a);
+    dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);
   } else {
-    if(a<Pico.romsize)         { u16 *pm=(u16 *)(Pico.rom+(a&~1));     return (pm[0]<<16)|pm[1]; }
+    if(a<0x20000)              { u16 *pm=(u16 *)(Pico.rom+(a&~1));     return (pm[0]<<16)|pm[1]; }
     if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
+    if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)
+      { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
+    dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);
   }
-  return 0; //lastread_d;
+  return 0;
 }
 #endif // EMU_M68K