X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=Pico%2Fsound%2Fym2612.c;h=294d621931e37098bb8c5fe454d6d1a505810c81;hb=db49317be10622fc8d2e766831483c7db2e17e0e;hp=75d5ad325522db3377a7f269a1d107b8733e34f5;hpb=85f8e92973ca60968cfb844d2119b669ce610c2d;p=picodrive.git diff --git a/Pico/sound/ym2612.c b/Pico/sound/ym2612.c index 75d5ad3..294d621 100644 --- a/Pico/sound/ym2612.c +++ b/Pico/sound/ym2612.c @@ -112,12 +112,11 @@ #include #include "ym2612.h" -#include "mix.h" #ifndef EXTERNAL_YM2612 #include // let it be 1 global to simplify things -static YM2612 ym2612; +YM2612 ym2612; #else extern YM2612 *ym2612_940; @@ -125,6 +124,8 @@ extern YM2612 *ym2612_940; #endif +void memset32(int *dest, int c, int count); + #ifndef __GNUC__ #pragma warning (disable:4100) // unreferenced formal parameter @@ -552,20 +553,21 @@ INLINE void set_timers( int v ) } -INLINE void FM_KEYON(FM_CH *CH , int s ) +INLINE void FM_KEYON(int c , int s ) { - FM_SLOT *SLOT = &CH->SLOT[s]; + FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s]; if( !SLOT->key ) { SLOT->key = 1; SLOT->phase = 0; /* restart Phase Generator */ SLOT->state = EG_ATT; /* phase -> Attack */ + ym2612.slot_mask |= (1<SLOT[s]; + FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s]; if( SLOT->key ) { SLOT->key = 0; @@ -843,6 +845,9 @@ typedef struct UINT32 pack; // 4c: stereo, lastchan, disabled, lfo_enabled | pan_r, pan_l, ams[2] | AMmasks[4] | FB[4] | lfo_ampm[16] UINT32 algo; /* 50: algo[3], was_update */ INT32 op1_out; +#ifdef _MIPS_ARCH_ALLEGREX + UINT32 pad1[3+8]; +#endif } chan_rend_context; @@ -884,7 +889,7 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length) { int out = 0; - if (ct->pack&0xf000) out = ((ct->op1_out>>16) + (ct->op1_out<<16>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */ + if (ct->pack&0xf000) out = ((ct->op1_out>>16) + ((ct->op1_out<<16)>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */ ct->op1_out <<= 16; ct->op1_out |= (unsigned short)op_calc1(ct->phase1, eg_out, out); } else { @@ -904,16 +909,6 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length) switch( ct->CH->ALGO ) { -#if 0 - case 0: smp = upd_algo0(ct); break; - case 1: smp = upd_algo1(ct); break; - case 2: smp = upd_algo2(ct); break; - case 3: smp = upd_algo3(ct); break; - case 4: smp = upd_algo4(ct); break; - case 5: smp = upd_algo5(ct); break; - case 6: smp = upd_algo6(ct); break; - case 7: smp = upd_algo7(ct); break; -#else case 0: { /* M1---C1---MEM---M2---C2---OUT */ @@ -1063,7 +1058,6 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length) } break; } -#endif } /* done calculating channel sample */ @@ -1091,55 +1085,66 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length) void chan_render_loop(chan_rend_context *ct, int *buffer, unsigned short length); #endif +static chan_rend_context crct; + +static void chan_render_prep(void) +{ + crct.eg_timer_add = ym2612.OPN.eg_timer_add; + crct.lfo_inc = ym2612.OPN.lfo_inc; +} -static int chan_render(int *buffer, int length, FM_CH *CH, UINT32 flags) // flags: stereo, lastchan, disabled, ?, pan_r, pan_l +static void chan_render_finish(void) { - chan_rend_context ct; + ym2612.OPN.eg_cnt = crct.eg_cnt; + ym2612.OPN.eg_timer = crct.eg_timer; + g_lfo_ampm = crct.pack >> 16; // need_save + ym2612.OPN.lfo_cnt = crct.lfo_cnt; +} - ct.CH = CH; - ct.mem = CH->mem_value; /* one sample delay memory */ - ct.lfo_cnt = ym2612.OPN.lfo_cnt; - ct.lfo_inc = ym2612.OPN.lfo_inc; +static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: stereo, ?, disabled, ?, pan_r, pan_l +{ + crct.CH = &ym2612.CH[c]; + crct.mem = crct.CH->mem_value; /* one sample delay memory */ + crct.lfo_cnt = ym2612.OPN.lfo_cnt; - flags &= 0x37; + flags &= 0x35; - if (ct.lfo_inc) { + if (crct.lfo_inc) { flags |= 8; flags |= g_lfo_ampm << 16; - flags |= CH->AMmasks << 8; - if (CH->ams == 8) // no ams - flags &= ~0xf00; - else flags |= (CH->ams&3)<<6; + flags |= crct.CH->AMmasks << 8; + if (crct.CH->ams == 8) // no ams + flags &= ~0xf00; + else flags |= (crct.CH->ams&3)<<6; } - flags |= (CH->FB&0xf)<<12; /* feedback shift */ - ct.pack = flags; + flags |= (crct.CH->FB&0xf)<<12; /* feedback shift */ + crct.pack = flags; - ct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */ - ct.eg_timer = ym2612.OPN.eg_timer; - ct.eg_timer_add = ym2612.OPN.eg_timer_add; + crct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */ + crct.eg_timer = ym2612.OPN.eg_timer; /* precalculate phase modulation incr */ - ct.phase1 = CH->SLOT[SLOT1].phase; - ct.phase2 = CH->SLOT[SLOT2].phase; - ct.phase3 = CH->SLOT[SLOT3].phase; - ct.phase4 = CH->SLOT[SLOT4].phase; + crct.phase1 = crct.CH->SLOT[SLOT1].phase; + crct.phase2 = crct.CH->SLOT[SLOT2].phase; + crct.phase3 = crct.CH->SLOT[SLOT3].phase; + crct.phase4 = crct.CH->SLOT[SLOT4].phase; /* current output from EG circuit (without AM from LFO) */ - ct.vol_out1 = CH->SLOT[SLOT1].tl + ((UINT32)CH->SLOT[SLOT1].volume); - ct.vol_out2 = CH->SLOT[SLOT2].tl + ((UINT32)CH->SLOT[SLOT2].volume); - ct.vol_out3 = CH->SLOT[SLOT3].tl + ((UINT32)CH->SLOT[SLOT3].volume); - ct.vol_out4 = CH->SLOT[SLOT4].tl + ((UINT32)CH->SLOT[SLOT4].volume); + crct.vol_out1 = crct.CH->SLOT[SLOT1].tl + ((UINT32)crct.CH->SLOT[SLOT1].volume); + crct.vol_out2 = crct.CH->SLOT[SLOT2].tl + ((UINT32)crct.CH->SLOT[SLOT2].volume); + crct.vol_out3 = crct.CH->SLOT[SLOT3].tl + ((UINT32)crct.CH->SLOT[SLOT3].volume); + crct.vol_out4 = crct.CH->SLOT[SLOT4].tl + ((UINT32)crct.CH->SLOT[SLOT4].volume); - ct.op1_out = CH->op1_out; - ct.algo = CH->ALGO & 7; + crct.op1_out = crct.CH->op1_out; + crct.algo = crct.CH->ALGO & 7; - if(CH->pms) + if(crct.CH->pms) { /* add support for 3 slot mode */ - UINT32 block_fnum = CH->block_fnum; + UINT32 block_fnum = crct.CH->block_fnum; UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8; - INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + ((ct.pack>>16)&0xff) ]; + INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + crct.CH->pms + ((crct.pack>>16)&0xff) ]; if (lfo_fn_table_index_offset) /* LFO phase modulation active */ { @@ -1157,45 +1162,42 @@ static int chan_render(int *buffer, int length, FM_CH *CH, UINT32 flags) // flag /* phase increment counter */ fc = fn_table[fn]>>(7-blk); - ct.incr1 = ((fc+CH->SLOT[SLOT1].DT[kc])*CH->SLOT[SLOT1].mul) >> 1; - ct.incr2 = ((fc+CH->SLOT[SLOT2].DT[kc])*CH->SLOT[SLOT2].mul) >> 1; - ct.incr3 = ((fc+CH->SLOT[SLOT3].DT[kc])*CH->SLOT[SLOT3].mul) >> 1; - ct.incr4 = ((fc+CH->SLOT[SLOT4].DT[kc])*CH->SLOT[SLOT4].mul) >> 1; + crct.incr1 = ((fc+crct.CH->SLOT[SLOT1].DT[kc])*crct.CH->SLOT[SLOT1].mul) >> 1; + crct.incr2 = ((fc+crct.CH->SLOT[SLOT2].DT[kc])*crct.CH->SLOT[SLOT2].mul) >> 1; + crct.incr3 = ((fc+crct.CH->SLOT[SLOT3].DT[kc])*crct.CH->SLOT[SLOT3].mul) >> 1; + crct.incr4 = ((fc+crct.CH->SLOT[SLOT4].DT[kc])*crct.CH->SLOT[SLOT4].mul) >> 1; } else /* LFO phase modulation = zero */ { - ct.incr1 = CH->SLOT[SLOT1].Incr; - ct.incr2 = CH->SLOT[SLOT2].Incr; - ct.incr3 = CH->SLOT[SLOT3].Incr; - ct.incr4 = CH->SLOT[SLOT4].Incr; + crct.incr1 = crct.CH->SLOT[SLOT1].Incr; + crct.incr2 = crct.CH->SLOT[SLOT2].Incr; + crct.incr3 = crct.CH->SLOT[SLOT3].Incr; + crct.incr4 = crct.CH->SLOT[SLOT4].Incr; } } else /* no LFO phase modulation */ { - ct.incr1 = CH->SLOT[SLOT1].Incr; - ct.incr2 = CH->SLOT[SLOT2].Incr; - ct.incr3 = CH->SLOT[SLOT3].Incr; - ct.incr4 = CH->SLOT[SLOT4].Incr; + crct.incr1 = crct.CH->SLOT[SLOT1].Incr; + crct.incr2 = crct.CH->SLOT[SLOT2].Incr; + crct.incr3 = crct.CH->SLOT[SLOT3].Incr; + crct.incr4 = crct.CH->SLOT[SLOT4].Incr; } - chan_render_loop(&ct, buffer, length); + chan_render_loop(&crct, buffer, length); - // write back persistent stuff: - if (flags & 2) { /* last channel */ - ym2612.OPN.eg_cnt = ct.eg_cnt; - ym2612.OPN.eg_timer = ct.eg_timer; - g_lfo_ampm = ct.pack >> 16; - ym2612.OPN.lfo_cnt = ct.lfo_cnt; + crct.CH->op1_out = crct.op1_out; + crct.CH->mem_value = crct.mem; + if (crct.CH->SLOT[SLOT1].state | crct.CH->SLOT[SLOT2].state | crct.CH->SLOT[SLOT3].state | crct.CH->SLOT[SLOT4].state) + { + crct.CH->SLOT[SLOT1].phase = crct.phase1; + crct.CH->SLOT[SLOT2].phase = crct.phase2; + crct.CH->SLOT[SLOT3].phase = crct.phase3; + crct.CH->SLOT[SLOT4].phase = crct.phase4; } + else + ym2612.slot_mask &= ~(0xf << (c*4)); - CH->op1_out = ct.op1_out; - CH->SLOT[SLOT1].phase = ct.phase1; - CH->SLOT[SLOT2].phase = ct.phase2; - CH->SLOT[SLOT3].phase = ct.phase3; - CH->SLOT[SLOT4].phase = ct.phase4; - CH->mem_value = ct.mem; - - return (ct.algo & 8) >> 3; // had output + return (crct.algo & 8) >> 3; // had output } /* update phase increment and envelope generator */ @@ -1213,10 +1215,10 @@ INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc) SLOT->ksr = ksr; /* calculate envelope generator rates */ - if ((SLOT->ar + SLOT->ksr) < 32+62) + if ((SLOT->ar + ksr) < 32+62) { - eg_sh = eg_rate_shift [SLOT->ar + SLOT->ksr ]; - eg_sel = eg_rate_select[SLOT->ar + SLOT->ksr ]; + eg_sh = eg_rate_shift [SLOT->ar + ksr ]; + eg_sel = eg_rate_select[SLOT->ar + ksr ]; } else { @@ -1226,18 +1228,18 @@ INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc) SLOT->eg_pack_ar = eg_inc_pack[eg_sel] | (eg_sh<<24); - eg_sh = eg_rate_shift [SLOT->d1r + SLOT->ksr]; - eg_sel = eg_rate_select[SLOT->d1r + SLOT->ksr]; + eg_sh = eg_rate_shift [SLOT->d1r + ksr]; + eg_sel = eg_rate_select[SLOT->d1r + ksr]; SLOT->eg_pack_d1r = eg_inc_pack[eg_sel] | (eg_sh<<24); - eg_sh = eg_rate_shift [SLOT->d2r + SLOT->ksr]; - eg_sel = eg_rate_select[SLOT->d2r + SLOT->ksr]; + eg_sh = eg_rate_shift [SLOT->d2r + ksr]; + eg_sel = eg_rate_select[SLOT->d2r + ksr]; SLOT->eg_pack_d2r = eg_inc_pack[eg_sel] | (eg_sh<<24); - eg_sh = eg_rate_shift [SLOT->rr + SLOT->ksr]; - eg_sel = eg_rate_select[SLOT->rr + SLOT->ksr]; + eg_sh = eg_rate_shift [SLOT->rr + ksr]; + eg_sel = eg_rate_select[SLOT->rr + ksr]; SLOT->eg_pack_rr = eg_inc_pack[eg_sel] | (eg_sh<<24); } @@ -1273,7 +1275,7 @@ static void init_timetables(const UINT8 *dttable) } -static void reset_channels(FM_CH *CH, int num) +static void reset_channels(FM_CH *CH) { int c,s; @@ -1283,7 +1285,7 @@ static void reset_channels(FM_CH *CH, int num) ym2612.OPN.ST.TB = 0; ym2612.OPN.ST.TBC = 0; - for( c = 0 ; c < num ; c++ ) + for( c = 0 ; c < 6 ; c++ ) { CH[c].fc = 0; for(s = 0 ; s < 4 ; s++ ) @@ -1291,7 +1293,9 @@ static void reset_channels(FM_CH *CH, int num) CH[c].SLOT[s].state= EG_OFF; CH[c].SLOT[s].volume = MAX_ATT_INDEX; } + CH[c].mem_value = CH[c].op1_out = 0; } + ym2612.slot_mask = 0; } /* initialize generic tables */ @@ -1400,6 +1404,7 @@ static void init_tables(void) /* CSM Key Controll */ +#if 0 INLINE void CSMKeyControll(FM_CH *CH) { /* this is wrong, atm */ @@ -1410,6 +1415,7 @@ INLINE void CSMKeyControll(FM_CH *CH) FM_KEYON(CH,SLOT3); FM_KEYON(CH,SLOT4); } +#endif /* prescaler set (and make time tables) */ @@ -1476,17 +1482,17 @@ static int OPNWriteReg(int r, int v) set_ar_ksr(CH,SLOT,v); break; - case 0x60: /* bit7 = AM ENABLE, DR */ + case 0x60: /* bit7 = AM ENABLE, DR | depends on ksr */ set_dr(SLOT,v); if(v&0x80) CH->AMmasks |= 1<AMmasks &= ~(1<>3; @@ -1525,7 +1531,7 @@ static int OPNWriteReg(int r, int v) ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7]; /* phase increment counter */ ym2612.OPN.SL3.fc[c] = fn_table[fn*2]>>(7-blk); - ym2612.OPN.SL3.block_fnum[c] = fn; + ym2612.OPN.SL3.block_fnum[c] = (blk<<11) | fn; ym2612.CH[2].SLOT[SLOT1].Incr=-1; } break; @@ -1582,10 +1588,6 @@ static int OPNWriteReg(int r, int v) /* YM2612 local section */ /*******************************************************************************/ -int *ym2612_dacen; -INT32 *ym2612_dacout; - - /* Generate samples for YM2612 */ int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty) { @@ -1595,6 +1597,24 @@ int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty) // if !is_buf_empty, it means it has valid samples to mix with, else it may contain trash if (is_buf_empty) memset32(buffer, 0, length<>2)) << 3; - active_chs |= chan_render(buffer, length, &ym2612.CH[4], stereo|((pan&0x300)>>4)) << 4; - active_chs |= chan_render(buffer, length, &ym2612.CH[5], stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)|2) << 5; + // flags: stereo, ?, disabled, ?, pan_r, pan_l + chan_render_prep(); + if (ym2612.slot_mask & 0x00000f) active_chs |= chan_render(buffer, length, 0, stereo|((pan&0x003)<<4)) << 0; + if (ym2612.slot_mask & 0x0000f0) active_chs |= chan_render(buffer, length, 1, stereo|((pan&0x00c)<<2)) << 1; + if (ym2612.slot_mask & 0x000f00) active_chs |= chan_render(buffer, length, 2, stereo|((pan&0x030) )) << 2; + if (ym2612.slot_mask & 0x00f000) active_chs |= chan_render(buffer, length, 3, stereo|((pan&0x0c0)>>2)) << 3; + if (ym2612.slot_mask & 0x0f0000) active_chs |= chan_render(buffer, length, 4, stereo|((pan&0x300)>>4)) << 4; + if (ym2612.slot_mask & 0xf00000) active_chs |= chan_render(buffer, length, 5, stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)) << 5; + chan_render_finish(); return active_chs; // 1 if buffer updated } @@ -1632,12 +1654,7 @@ int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty) /* initialize YM2612 emulator */ void YM2612Init_(int clock, int rate) { - // notaz - ym2612_dacen = &ym2612.dacen; - ym2612_dacout = &ym2612.dacout; - - /* clear everything but the regs */ - memset(ym2612.CH, 0, sizeof(ym2612)-sizeof(ym2612.REGS)-4); + memset(&ym2612, 0, sizeof(ym2612)); init_tables(); ym2612.OPN.ST.clock = clock; @@ -1653,18 +1670,23 @@ void YM2612ResetChip_(void) { int i; + memset(ym2612.REGS, 0, sizeof(ym2612.REGS)); + OPNSetPres( 6*24 ); set_timers( 0x30 ); /* mode 0 , timer reset */ + ym2612.REGS[0x27] = 0x30; ym2612.OPN.eg_timer = 0; ym2612.OPN.eg_cnt = 0; ym2612.OPN.ST.status = 0; - reset_channels( &ym2612.CH[0] , 6 ); + reset_channels( &ym2612.CH[0] ); for(i = 0xb6 ; i >= 0xb4 ; i-- ) { OPNWriteReg(i ,0xc0); OPNWriteReg(i|0x100,0xc0); + ym2612.REGS[i ] = 0xc0; + ym2612.REGS[i|0x100] = 0xc0; } for(i = 0xb2 ; i >= 0x30 ; i-- ) { @@ -1674,6 +1696,7 @@ void YM2612ResetChip_(void) for(i = 0x26 ; i >= 0x20 ; i-- ) OPNWriteReg(i,0); /* DAC mode clear */ ym2612.dacen = 0; + ym2612.addr_A1 = 0; } @@ -1701,7 +1724,6 @@ int YM2612Write_(unsigned int a, unsigned int v) } addr = ym2612.OPN.ST.address; - ym2612.REGS[addr] = v; switch( addr & 0xf0 ) { @@ -1718,6 +1740,7 @@ int YM2612Write_(unsigned int a, unsigned int v) ym2612.OPN.lfo_inc = 0; } break; +#if 0 // handled elsewhere case 0x24: { // timer A High 8 int TAnew = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2); if(ym2612.OPN.ST.TA != TAnew) { @@ -1752,21 +1775,21 @@ int YM2612Write_(unsigned int a, unsigned int v) set_timers( v ); ret=0; break; +#endif case 0x28: /* key on / off */ { UINT8 c; - FM_CH *CH; c = v & 0x03; if( c == 3 ) { ret=0; break; } if( v&0x04 ) c+=3; - CH = &ym2612.CH[c]; - if(v&0x10) FM_KEYON(CH,SLOT1); else FM_KEYOFF(CH,SLOT1); - if(v&0x20) FM_KEYON(CH,SLOT2); else FM_KEYOFF(CH,SLOT2); - if(v&0x40) FM_KEYON(CH,SLOT3); else FM_KEYOFF(CH,SLOT3); - if(v&0x80) FM_KEYON(CH,SLOT4); else FM_KEYOFF(CH,SLOT4); + if(v&0x10) FM_KEYON(c,SLOT1); else FM_KEYOFF(c,SLOT1); + if(v&0x20) FM_KEYON(c,SLOT2); else FM_KEYOFF(c,SLOT2); + if(v&0x40) FM_KEYON(c,SLOT3); else FM_KEYOFF(c,SLOT3); + if(v&0x80) FM_KEYON(c,SLOT4); else FM_KEYOFF(c,SLOT4); break; } +#if 0 case 0x2a: /* DAC data (YM2612) */ ym2612.dacout = ((int)v - 0x80) << 6; /* level unknown (notaz: 8 seems to be too much) */ ret=0; @@ -1776,6 +1799,7 @@ int YM2612Write_(unsigned int a, unsigned int v) ym2612.dacen = v & 0x80; ret=0; break; +#endif default: break; } @@ -1799,7 +1823,6 @@ int YM2612Write_(unsigned int a, unsigned int v) } addr = ym2612.OPN.ST.address | 0x100; - ym2612.REGS[addr] = v; ret = OPNWriteReg(addr, v); break; @@ -1813,12 +1836,12 @@ int YM2612Write_(unsigned int a, unsigned int v) return ret; } +#if 0 UINT8 YM2612Read_(void) { return ym2612.OPN.ST.status; } - int YM2612PicoTick_(int n) { int ret = 0; @@ -1842,33 +1865,274 @@ int YM2612PicoTick_(int n) return ret; } - +#endif void YM2612PicoStateLoad_(void) { -#ifndef EXTERNAL_YM2612 - int i, old_A1 = ym2612.addr_A1; + reset_channels( &ym2612.CH[0] ); + ym2612.slot_mask = 0xffffff; +} + +/* rather stupid design because I wanted to fit in unused register "space" */ +typedef struct +{ + UINT32 state_phase; + INT16 volume; +} ym_save_addon_slot; + +typedef struct +{ + UINT32 magic; + UINT8 address; + UINT8 status; + UINT8 addr_A1; + UINT8 unused; + int TAT; + int TBT; + UINT32 eg_cnt; // 10 + UINT32 eg_timer; + UINT32 lfo_cnt; + UINT16 lfo_ampm; + UINT8 fn_h; + UINT8 fn_h_sl3; + UINT32 keyon_field; // 20 + UINT32 kcode_fc_sl3_3; +} ym_save_addon; + +typedef struct +{ + UINT16 block_fnum[6]; + UINT16 block_fnum_sl3[3]; + UINT16 unused; +} ym_save_addon2; + + +//static YM2612 check_ym; + +void YM2612PicoStateSave2(int tat, int tbt) +{ + ym_save_addon_slot ss; + ym_save_addon2 sa2; + ym_save_addon sa; + unsigned char *ptr; + int c, s; + + refresh_fc_eg_chan( &ym2612.CH[0] ); + refresh_fc_eg_chan( &ym2612.CH[1] ); + if( (ym2612.OPN.ST.mode & 0xc0) ) + { + /* 3SLOT MODE */ + if( ym2612.CH[2].SLOT[SLOT1].Incr==-1) + { + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode ); + } + } else refresh_fc_eg_chan( &ym2612.CH[2] ); + refresh_fc_eg_chan( &ym2612.CH[3] ); + refresh_fc_eg_chan( &ym2612.CH[4] ); + refresh_fc_eg_chan( &ym2612.CH[5] ); - reset_channels( &ym2612.CH[0], 6 ); + memset(&sa, 0, sizeof(sa)); +//memcpy(&check_ym, &ym2612, sizeof(ym2612)); - // feed all the registers and update internal state - for(i = 0; i < 0x100; i++) { - YM2612Write_(0, i); - YM2612Write_(1, ym2612.REGS[i]); + // chans 1,2,3 + ptr = &ym2612.REGS[0x0b8]; + for (c = 0; c < 3; c++) + { + for (s = 0; s < 4; s++) { + ss.state_phase = (ym2612.CH[c].SLOT[s].state << 29) | (ym2612.CH[c].SLOT[s].phase >> 3); + ss.volume = ym2612.CH[c].SLOT[s].volume; + if (ym2612.CH[c].SLOT[s].key) + sa.keyon_field |= 1 << (c*4 + s); + memcpy(ptr, &ss, 6); + ptr += 6; + } + sa2.block_fnum[c] = ym2612.CH[c].block_fnum; } - for(i = 0; i < 0x100; i++) { - YM2612Write_(2, i); - YM2612Write_(3, ym2612.REGS[i|0x100]); + // chans 4,5,6 + ptr = &ym2612.REGS[0x1b8]; + for (; c < 6; c++) + { + for (s = 0; s < 4; s++) { + ss.state_phase = (ym2612.CH[c].SLOT[s].state << 29) | (ym2612.CH[c].SLOT[s].phase >> 3); + ss.volume = ym2612.CH[c].SLOT[s].volume; + if (ym2612.CH[c].SLOT[s].key) + sa.keyon_field |= 1 << (c*4 + s); + memcpy(ptr, &ss, 6); + ptr += 6; + } + sa2.block_fnum[c] = ym2612.CH[c].block_fnum; + } + for (c = 0; c < 3; c++) + { + sa2.block_fnum_sl3[c] = ym2612.OPN.SL3.block_fnum[c]; } - ym2612.addr_A1 = old_A1; -#else - reset_channels( &ym2612.CH[0], 6 ); -#endif + memcpy(&ym2612.REGS[0], &sa2, sizeof(sa2)); // 0x20 max + + // other things + ptr = &ym2612.REGS[0x100]; + sa.magic = 0x41534d59; // 'YMSA' + sa.address = ym2612.OPN.ST.address; + sa.status = ym2612.OPN.ST.status; + sa.addr_A1 = ym2612.addr_A1; + sa.unused = 0; + sa.TAT = tat; + sa.TBT = tbt; + sa.eg_cnt = ym2612.OPN.eg_cnt; + sa.eg_timer = ym2612.OPN.eg_timer; + sa.lfo_cnt = ym2612.OPN.lfo_cnt; + sa.lfo_ampm = g_lfo_ampm; + sa.fn_h = ym2612.REGS[0xa4] = ym2612.OPN.ST.fn_h; + sa.fn_h_sl3 = ym2612.REGS[0xac] = ym2612.OPN.SL3.fn_h; + memcpy(ptr, &sa, sizeof(sa)); // 0x30 max } +int YM2612PicoStateLoad2(int *tat, int *tbt) +{ + ym_save_addon_slot ss; + ym_save_addon2 sa2; + ym_save_addon sa; + unsigned char *ptr; + UINT32 fn; + UINT8 blk; + int c, s; + + ptr = &ym2612.REGS[0x100]; + memcpy(&sa, ptr, sizeof(sa)); // 0x30 max + if (sa.magic != 0x41534d59) return -1; + + ptr = &ym2612.REGS[0]; + memcpy(&sa2, ptr, sizeof(sa2)); + + ym2612.OPN.ST.address = sa.address; + ym2612.OPN.ST.status = sa.status; + ym2612.addr_A1 = sa.addr_A1; + ym2612.OPN.eg_cnt = sa.eg_cnt; + ym2612.OPN.eg_timer = sa.eg_timer; + ym2612.OPN.lfo_cnt = sa.lfo_cnt; + g_lfo_ampm = sa.lfo_ampm; + if (tat != NULL) *tat = sa.TAT; + if (tbt != NULL) *tbt = sa.TBT; + + // chans 1,2,3 + ptr = &ym2612.REGS[0x0b8]; + for (c = 0; c < 3; c++) + { + for (s = 0; s < 4; s++) { + memcpy(&ss, ptr, 6); + ym2612.CH[c].SLOT[s].state = ss.state_phase >> 29; + ym2612.CH[c].SLOT[s].phase = ss.state_phase << 3; + ym2612.CH[c].SLOT[s].volume = ss.volume; + ym2612.CH[c].SLOT[s].key = (sa.keyon_field & (1 << (c*4 + s))) ? 1 : 0; + ym2612.CH[c].SLOT[s].ksr = (UINT8)-1; +//ym2612.CH[c].SLOT[s].Incr = check_ym.CH[c].SLOT[s].Incr; + ptr += 6; + } + ym2612.CH[c].SLOT[SLOT1].Incr=-1; + ym2612.CH[c].block_fnum = sa2.block_fnum[c]; + fn = ym2612.CH[c].block_fnum & 0x7ff; + blk = ym2612.CH[c].block_fnum >> 11; + ym2612.CH[c].kcode= (blk<<2) | opn_fktable[fn >> 7]; + ym2612.CH[c].fc = fn_table[fn*2]>>(7-blk); + } + // chans 4,5,6 + ptr = &ym2612.REGS[0x1b8]; + for (; c < 6; c++) + { + for (s = 0; s < 4; s++) { + memcpy(&ss, ptr, 6); + ym2612.CH[c].SLOT[s].state = ss.state_phase >> 29; + ym2612.CH[c].SLOT[s].phase = ss.state_phase << 3; + ym2612.CH[c].SLOT[s].volume = ss.volume; + ym2612.CH[c].SLOT[s].key = (sa.keyon_field & (1 << (c*4 + s))) ? 1 : 0; + ym2612.CH[c].SLOT[s].ksr = (UINT8)-1; +//ym2612.CH[c].SLOT[s].Incr = check_ym.CH[c].SLOT[s].Incr; + ptr += 6; + } + ym2612.CH[c].SLOT[SLOT1].Incr=-1; + ym2612.CH[c].block_fnum = sa2.block_fnum[c]; + fn = ym2612.CH[c].block_fnum & 0x7ff; + blk = ym2612.CH[c].block_fnum >> 11; + ym2612.CH[c].kcode= (blk<<2) | opn_fktable[fn >> 7]; + ym2612.CH[c].fc = fn_table[fn*2]>>(7-blk); + } + for (c = 0; c < 3; c++) + { + ym2612.OPN.SL3.block_fnum[c] = sa2.block_fnum_sl3[c]; + fn = ym2612.OPN.SL3.block_fnum[c] & 0x7ff; + blk = ym2612.OPN.SL3.block_fnum[c] >> 11; + ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7]; + ym2612.OPN.SL3.fc[c] = fn_table[fn*2]>>(7-blk); + } +#if 0 + refresh_fc_eg_chan( &ym2612.CH[0] ); + refresh_fc_eg_chan( &ym2612.CH[1] ); + if( (ym2612.OPN.ST.mode & 0xc0) ) + { + /* 3SLOT MODE */ + if( ym2612.CH[2].SLOT[SLOT1].Incr==-1) + { + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode ); + } + } else refresh_fc_eg_chan( &ym2612.CH[2] ); + refresh_fc_eg_chan( &ym2612.CH[3] ); + refresh_fc_eg_chan( &ym2612.CH[4] ); + refresh_fc_eg_chan( &ym2612.CH[5] ); + + for (c = 0; c < 6; c++) + { + for (s = 0; s < 4; s++) + { + int i; + unsigned char *chk = ((unsigned char *) &check_ym.CH[c].SLOT[s]); + unsigned char *res = ((unsigned char *) &ym2612.CH[c].SLOT[s]); + + for (i = 0; i < sizeof(check_ym.CH[0].SLOT[0]); i++) + { + if (i != 0x0c && chk[i] != res[i]) + printf("ch[%i].slot[%i].%03x: %02x vs %02x\n", c, s, i, chk[i], res[i]); + } + } + + { + int i; + unsigned char *chk = ((unsigned char *) &check_ym.CH[c].ALGO); + unsigned char *res = ((unsigned char *) &ym2612.CH[c].ALGO); + + for (i = 0; i < 8*4; i++) + { + if ((i < 4 || i > 0x0b) && chk[i] != res[i]) + printf("ch[%i].%03x: %02x vs %02x\n", c, i, chk[i], res[i]); + } + } + } + + for (c = 0; c < sizeof(ym2612.OPN); c++) + { + unsigned char *chk = ((unsigned char *) &check_ym.OPN); + unsigned char *res = ((unsigned char *) &ym2612.OPN); + + if (chk[c] != res[c]) + { + printf("OPN: %03x: %02x vs %02x\n", c, chk[c], res[c]); + } + } +#endif + + return 0; +} + +#ifndef EXTERNAL_YM2612 void *YM2612GetRegs(void) { return ym2612.REGS; } +#endif +