X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2FCyclone%2FCyclone.txt;h=3397118f20a8712657cee7ea798303d6b4a5b235;hb=053fd9b42f2cf38194f78e37c373363fc9cb9933;hp=a452f159b8d8244a846714781134e16fa115f905;hpb=0e11c502b05a9ccd67d34d1f0975852d8c3d4232;p=picodrive.git

diff --git a/cpu/Cyclone/Cyclone.txt b/cpu/Cyclone/Cyclone.txt
index a452f15..3397118 100644
--- a/cpu/Cyclone/Cyclone.txt
+++ b/cpu/Cyclone/Cyclone.txt
@@ -456,11 +456,12 @@ See source code for up to date of register usage, however a summary is here:
   r6  : Pointer to Opcode Jump table
   r7  : Pointer to Cpu Context
   r8  : Current Opcode
-  r9  : Flags (NZCV) in highest four bits
- (r10 : Temporary source value or Memory Base)
+  r10 : Flags (NZCV) in highest four bits
  (r11 : Temporary register)
 
 Flags are mapped onto ARM flags whenever possible, which speeds up the processing of opcode.
+r9 is not used intentionally, because AAPCS defines it as "platform register", so it's
+reserved in some systems.
 
 
 Thanks to...
@@ -476,6 +477,11 @@ Thanks to...
 
 What's New
 ----------
+v0.0099 notaz
+  * Cyclone no longer uses r9, because AAPCS defines it as "platform register",
+    so it's reserved in some systems.
+  * Made SPLIT_MOVEL_PD to affect MOVEM too.
+
 v0.0088 notaz
   - Reduced amount of code in opcode handlers by ~23% by doing the following:
     - Removed duplicate opcode handlers