X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2FCyclone%2FOpBranch.cpp;fp=cpu%2FCyclone%2FOpBranch.cpp;h=c24c7696e74f9d31ab376225337ecacdf3c818a8;hb=85a36a57a816ac643ee5f982d774532a0ca4d58b;hp=f8eb584a2398dc3b18b1ee47075a8ee504eaeeb4;hpb=3a5e6cf8477084dd63ab1eeadef88db3d218caea;p=picodrive.git diff --git a/cpu/Cyclone/OpBranch.cpp b/cpu/Cyclone/OpBranch.cpp index f8eb584..c24c769 100644 --- a/cpu/Cyclone/OpBranch.cpp +++ b/cpu/Cyclone/OpBranch.cpp @@ -139,8 +139,8 @@ int OpUnlk(int op) OpStart(op,0x10); ot(";@ Get An\n"); - EaCalc(10, 7, 8, 2, 1); - EaRead(10, 0, 8, 2, 7, 1); + EaCalc(10, 0xf, 8, 2, 1); + EaRead(10, 0, 8, 2, 0xf, 1); ot(" add r11,r0,#4 ;@ A7+=4\n"); ot("\n"); @@ -151,7 +151,7 @@ int OpUnlk(int op) ot("\n"); ot(";@ An = value from stack:\n"); EaWrite(10, 0, 8, 2, 7, 1); - + Cycles=12; OpEnd(0x10); return 0; @@ -181,7 +181,6 @@ int Op4E70(int op) SuperChange(op); CheckInterrupt(op); OpEnd(0x10); - SuperEnd(op); return 0; case 5: // rts @@ -225,7 +224,7 @@ int OpJsr(int op) // See if we can do this opcode: if (EaCanRead(sea,-1)==0) return 1; - use=OpBase(op); + use=OpBase(op,0); if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,(op&0x40)?0:0x10); @@ -294,17 +293,17 @@ int OpDbra(int op) break; case 2: // hi ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n"); - ot(" beq DbraTrue%.4x\n\n",op); + ot(" beq DbraTrue\n\n"); break; case 3: // ls ot(" tst r9,#0x60000000 ;@ ls: C || Z\n"); - ot(" bne DbraTrue%.4x\n\n",op); + ot(" bne DbraTrue\n\n"); break; default: ot(";@ Is the condition true?\n"); ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n"); ot(";@ If so, don't dbra\n"); - ot(" b%s DbraTrue%.4x\n\n",Cond[cc],op); + ot(" b%s DbraTrue\n\n",Cond[cc]); break; } @@ -332,10 +331,11 @@ int OpDbra(int op) OpEnd(); } - if (cc==0||cc>=2) + //if (cc==0||cc>=2) + if (op==0x50c8) { ot(";@ condition true:\n"); - ot("DbraTrue%.4x%s\n", op, ms?"":":"); + ot("DbraTrue%s\n", ms?"":":"); ot(" add r4,r4,#2 ;@ Skip branch offset\n"); ot("\n"); Cycles=12; @@ -352,6 +352,7 @@ int OpBranch(int op) int size=0,use=0; int offset=0; int cc=0; + char *asr_r11=""; offset=(char)(op&0xff); cc=(op>>8)&15; @@ -365,33 +366,48 @@ int OpBranch(int op) if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,size?0x10:0); - - ot(";@ Get Branch offset:\n"); - if (size) - { - EaCalc(0,0,0x3c,size); - EaRead(0,0,0x3c,size,0); - } - else - ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n"); - - // above code messes cycles Cycles=10; // Assume branch taken if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); - if (cc>=2) + switch (cc) { - ot(";@ Is the condition true?\n"); - if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n"); - ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n"); - if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n"); - - ot(" b%s DontBranch%.4x\n",Cond[cc^1],op); - ot("\n"); + case 0: // T + case 1: // F + break; + case 2: // hi + ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n"); + ot(" bne BccDontBranch%i\n\n",8<=2) + // since all "DontBranch" code is same for every size, output only once + if (cc>=2&&(op&0xff00)==0x6200) { - ot("DontBranch%.4x%s\n", op, ms?"":":"); - Cycles+=(size==1)? 2 : -2; // Branch not taken - OpEnd(size?0x10:0); + ot("BccDontBranch%i%s\n", 8<