X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2FCyclone%2FOpBranch.cpp;h=d29ed031f715952c02516acbd29c86f1817ba824;hb=88b3d7c16ae976d332b8462de839b86f856a7180;hp=c24c7696e74f9d31ab376225337ecacdf3c818a8;hpb=85a36a57a816ac643ee5f982d774532a0ca4d58b;p=picodrive.git diff --git a/cpu/Cyclone/OpBranch.cpp b/cpu/Cyclone/OpBranch.cpp index c24c769..d29ed03 100644 --- a/cpu/Cyclone/OpBranch.cpp +++ b/cpu/Cyclone/OpBranch.cpp @@ -1,20 +1,15 @@ #include "app.h" -static void CheckPc(int reg) +// in/out address in r0, trashes all temp regs +static void CheckPc(void) { #if USE_CHECKPC_CALLBACK - ot(";@ Check Memory Base+pc (r4)\n"); - if (reg != 0) - ot(" mov r0,r%i\n", reg); + ot(";@ Check Memory Base+pc\n"); ot(" mov lr,pc\n"); ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n"); - ot(" mov r4,r0\n"); -#else - if (reg != 4) - ot(" mov r4,r%i\n", reg); -#endif ot("\n"); +#endif } // Push 32-bit value in r1 - trashes r0-r3,r12,lr @@ -62,7 +57,12 @@ static void PopPc() MemHandler(0,2); ot(" add r0,r0,r10 ;@ Memory Base+PC\n"); ot("\n"); - CheckPc(0); + CheckPc(); +#if EMULATE_ADDRESS_ERRORS_JUMP + ot(" mov r4,r0\n"); +#else + ot(" bic r4,r0,#1\n"); +#endif } int OpTrap(int op) @@ -74,8 +74,7 @@ int OpTrap(int op) OpStart(op,0x10); ot(" and r0,r8,#0xf ;@ Get trap number\n"); - ot(" orr r0,r0,#0x20\n"); - ot(" mov r0,r0,asl #2\n"); + ot(" orr r0,r0,#0x20 ;@ 32+n\n"); ot(" bl Exception\n"); ot("\n"); @@ -158,11 +157,12 @@ int OpUnlk(int op) } // --------------------- Opcodes 0x4e70+ --------------------- +// 01001110 01110ttt int Op4E70(int op) { int type=0; - type=op&7; // 01001110 01110ttt, reset/nop/stop/rte/rtd/rts/trapv/rtr + type=op&7; // reset/nop/stop/rte/rtd/rts/trapv/rtr switch (type) { @@ -173,30 +173,45 @@ int Op4E70(int op) return 0; case 3: // rte - OpStart(op,0x10); Cycles=20; - SuperCheck(op); + OpStart(op,0x10,0,0,1); Cycles=20; PopSr(1); ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); PopPc(); - SuperChange(op); - CheckInterrupt(op); - OpEnd(0x10); + ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n"); + SuperChange(op,1); +#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO || EMULATE_HALT + ot(" ldr r1,[r7,#0x58]\n"); + ot(" bic r1,r1,#0x0c ;@ clear 'not processing instruction' and 'doing addr error' bits\n"); + ot(" str r1,[r7,#0x58]\n"); +#endif +#if EMULATE_ADDRESS_ERRORS_JUMP + ot(" tst r4,#1 ;@ address error?\n"); + ot(" bne ExceptionAddressError_r_prg_r4\n"); +#endif + opend_check_interrupt = 1; + opend_check_trace = 1; + OpEnd(0x10,0); return 0; case 5: // rts OpStart(op,0x10); Cycles=16; ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); PopPc(); +#if EMULATE_ADDRESS_ERRORS_JUMP + ot(" tst r4,#1 ;@ address error?\n"); + ot(" bne ExceptionAddressError_r_prg_r4\n"); +#endif OpEnd(0x10); return 0; case 6: // trapv - OpStart(op,0x10); Cycles=4; + OpStart(op,0x10,0,1); Cycles=4; ot(" tst r9,#0x10000000\n"); - ot(" subne r5,r5,#%i\n",30); - ot(" movne r0,#0x1c ;@ TRAPV exception\n"); + ot(" subne r5,r5,#%i\n",34); + ot(" movne r0,#7 ;@ TRAPV exception\n"); ot(" blne Exception\n"); - OpEnd(0x10); + opend_op_changes_cycles = 1; + OpEnd(0x10,0); return 0; case 7: // rtr @@ -204,6 +219,10 @@ int Op4E70(int op) PopSr(0); ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); PopPc(); +#if EMULATE_ADDRESS_ERRORS_JUMP + ot(" tst r4,#1 ;@ address error?\n"); + ot(" bne ExceptionAddressError_r_prg_r4\n"); +#endif OpEnd(0x10); return 0; @@ -233,30 +252,33 @@ int OpJsr(int op) ot("\n"); EaCalc(11,0x003f,sea,0); - ot(";@ Jump - Get new PC from r0\n"); - if (op&0x40) + ot(";@ Jump - Get new PC from r11\n"); + ot(" add r0,r11,r10 ;@ Memory Base + New PC\n"); + ot("\n"); + CheckPc(); + if (!(op&0x40)) { - // Jmp - Get new PC from r0 - ot(" add r0,r11,r10 ;@ Memory Base + New PC\n"); - ot("\n"); + ot(" ldr r2,[r7,#0x3c]\n"); + ot(" sub r1,r4,r10 ;@ r1 = Old PC\n"); } - else +#if EMULATE_ADDRESS_ERRORS_JUMP + // jsr prefetches next instruction before pushing old PC, + // according to http://pasti.fxatari.com/68kdocs/68kPrefetch.html + ot(" mov r4,r0\n"); + ot(" tst r4,#1 ;@ address error?\n"); + ot(" bne ExceptionAddressError_r_prg_r4\n"); +#else + ot(" bic r4,r0,#1\n"); +#endif + + if (!(op&0x40)) { - ot(";@ Jsr - Push old PC first\n"); - ot(" sub r1,r4,r10 ;@ r1 = Old PC\n"); - ot(" mov r1,r1,lsl #8\n"); - ot(" ldr r0,[r7,#0x3c]\n"); - ot(" mov r1,r1,asr #8\n"); - ot(";@ Push r1 onto stack\n"); - ot(" sub r0,r0,#4 ;@ Predecrement A7\n"); + ot(";@ Push old PC onto stack\n"); + ot(" sub r0,r2,#4 ;@ Predecrement A7\n"); ot(" str r0,[r7,#0x3c] ;@ Save A7\n"); MemHandler(1,2); - ot(" add r0,r11,r10 ;@ Memory Base + New PC\n"); - ot("\n"); } - CheckPc(0); - Cycles=(op&0x40) ? 4 : 12; Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea); @@ -319,14 +341,32 @@ int OpDbra(int op) ot(";@ Check if Dn.w is -1\n"); ot(" cmn r0,#1\n"); + +#if (USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA) || EMULATE_ADDRESS_ERRORS_JUMP + ot(" beq DbraMin1\n"); ot("\n"); + ot(";@ Get Branch offset:\n"); + ot(" ldrsh r0,[r4]\n"); + ot(" add r0,r4,r0 ;@ r0 = New PC\n"); + CheckPc(); +#if EMULATE_ADDRESS_ERRORS_JUMP + ot(" mov r4,r0\n"); + ot(" tst r4,#1 ;@ address error?\n"); + ot(" bne ExceptionAddressError_r_prg_r4\n"); +#else + ot(" bic r4,r0,#1\n"); +#endif +#else + ot("\n"); ot(";@ Get Branch offset:\n"); ot(" ldrnesh r0,[r4]\n"); ot(" addeq r4,r4,#2 ;@ Skip branch offset\n"); ot(" subeq r5,r5,#4 ;@ additional cycles\n"); ot(" addne r4,r4,r0 ;@ r4 = New PC\n"); + ot(" bic r4,r4,#1\n"); // we do not emulate address errors ot("\n"); +#endif Cycles=12-2; OpEnd(); } @@ -342,6 +382,18 @@ int OpDbra(int op) OpEnd(); } +#if (USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA) || EMULATE_ADDRESS_ERRORS_JUMP + if (op==0x51c8) + { + ot(";@ Dn.w is -1:\n"); + ot("DbraMin1%s\n", ms?"":":"); + ot(" add r4,r4,#2 ;@ Skip branch offset\n"); + ot("\n"); + Cycles=12+2; + OpEnd(); + } +#endif + return 0; } @@ -349,7 +401,7 @@ int OpDbra(int op) // Emit a Branch opcode 0110cccc nn (cccc=condition) int OpBranch(int op) { - int size=0,use=0; + int size=0,use=0,checkpc=0; int offset=0; int cc=0; char *asr_r11=""; @@ -361,6 +413,7 @@ int OpBranch(int op) if (offset==0) size=1; if (offset==-1) size=2; + if (size==2) size=0; // 000 model does not support long displacement if (size) use=op; // 16-bit or 32-bit else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches @@ -414,11 +467,9 @@ int OpBranch(int op) if (cc==1) { ot(";@ Bsr - remember old PC\n"); + ot(" ldr r2,[r7,#0x3c]\n"); ot(" sub r1,r4,r10 ;@ r1 = Old PC\n"); if (size) ot(" add r1,r1,#%d\n",1<=2&&(op&0xff00)==0x6200) { ot("BccDontBranch%i%s\n", 8<