X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2FCyclone%2FOpLogic.cpp;h=4bd0869569c4a281995c7c44af9a6f4e3e173cd3;hb=0e11c502b05a9ccd67d34d1f0975852d8c3d4232;hp=3389a8e5398f4af37bea6797122ff8a5faa648a6;hpb=85a36a57a816ac643ee5f982d774532a0ca4d58b;p=picodrive.git

diff --git a/cpu/Cyclone/OpLogic.cpp b/cpu/Cyclone/OpLogic.cpp
index 3389a8e..4bd0869 100644
--- a/cpu/Cyclone/OpLogic.cpp
+++ b/cpu/Cyclone/OpLogic.cpp
@@ -207,6 +207,7 @@ int OpNeg(int op)
     ot("\n");
   }
 
+  if (type==1) eawrite_check_addrerr=1;
   EaWrite(10,     1,ea,size,0x003f,0,0);
 
   OpEnd(ea);
@@ -307,7 +308,7 @@ int OpExt(int op)
 int OpSet(int op)
 {
   int cc=0,ea=0;
-  int size=0,use=0;
+  int size=0,use=0,changed_cycles=0;
   char *cond[16]=
   {
     "al","", "hi","ls","cc","cs","ne","eq",
@@ -325,7 +326,8 @@ int OpSet(int op)
   use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
-  OpStart(op,ea); Cycles=8;
+  changed_cycles=ea<8 && cc>=2;
+  OpStart(op,ea,0,changed_cycles); Cycles=8;
   if (ea<8) Cycles=4;
 
   if (cc)
@@ -359,10 +361,12 @@ int OpSet(int op)
 
   ot("\n");
 
+  eawrite_check_addrerr=1;
   EaCalc (0,0x003f, ea,size,0,0);
   EaWrite(0,     1, ea,size,0x003f,0,0);
 
-  OpEnd(ea);
+  opend_op_changes_cycles=changed_cycles;
+  OpEnd(ea,0);
   return 0;
 }
 
@@ -403,19 +407,12 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       ot("\n");
     }
 
-    if (type==0 && dir) ot("  mov r3,r0 ;@ save old value for V flag calculation\n");
+    if (type==0 && dir) ot("  adds r3,r0,#0 ;@ save old value for V flag calculation, also clear V\n");
 
     ot(";@ Shift register:\n");
     if (type==0) ot("  movs r0,r0,%s %s\n",dir?"asl":"asr",pct);
     if (type==1) ot("  movs r0,r0,%s %s\n",dir?"lsl":"lsr",pct);
 
-    if (dir==0 && size<2)
-    {
-      ot(";@ restore after right shift:\n");
-      ot("  mov r0,r0,lsl #%d\n",32-(8<<size));
-      ot("\n");
-    }
-
     OpGetFlags(0,0);
     if (usereg) { // store X only if count is not 0
       ot("  cmp %s,#0 ;@ shifting by 0?\n",pct);
@@ -425,17 +422,27 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       // count will never be 0 if we use immediate
       ot("  str r9,[r7,#0x4c] ;@ Save X bit\n");
     }
+    ot("\n");
+
+    if (dir==0 && size<2)
+    {
+      ot(";@ restore after right shift:\n");
+      ot("  movs r0,r0,lsl #%d\n",32-(8<<size));
+      if (type)
+        ot("  orrmi r9,r9,#0x80000000 ;@ Potentially missed N flag\n");
+      ot("\n");
+    }
 
     if (type==0 && dir) {
       ot(";@ calculate V flag (set if sign bit changes at anytime):\n");
       ot("  mov r1,#0x80000000\n");
       ot("  ands r3,r3,r1,asr %s\n", pct);
       ot("  cmpne r3,r1,asr %s\n", pct);
-      ot("  biceq r9,r9,#0x10000000\n");
+      ot("  eoreq r1,r0,r3\n"); // above check doesn't catch (-1)<<(32+), so we need this
+      ot("  tsteq r1,#0x80000000\n");
       ot("  orrne r9,r9,#0x10000000\n");
+      ot("\n");
     }
-
-    ot("\n");
   }
 
   // --------------------------------------
@@ -467,12 +474,20 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
 
     if (usereg)
     {
-      ot(";@ Reduce r2 until <0:\n");
-      ot("Reduce_%.4x%s\n",op,ms?"":":");
-      ot("  subs r2,r2,#%d\n",wide+1);
-      ot("  bpl Reduce_%.4x\n",op);
-      ot("  adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide);
-      ot("  beq norotx%.4x\n",op);
+      if (size==2)
+      {
+        ot("  subs r2,r2,#33\n");
+        ot("  addmis r2,r2,#33 ;@ Now r2=0-%d\n",wide);
+      }
+      else
+      {
+        ot(";@ Reduce r2 until <0:\n");
+        ot("Reduce_%.4x%s\n",op,ms?"":":");
+        ot("  subs r2,r2,#%d\n",wide+1);
+        ot("  bpl Reduce_%.4x\n",op);
+        ot("  adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide);
+      }
+      ot("  beq norotx_%.4x\n",op);
       ot("\n");
     }
 
@@ -488,30 +503,26 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
 
     if (shift) ot("  mov r0,r0,lsr #%d ;@ Shift down\n",shift);
 
-    ot(";@ Rotate bits:\n");
-    ot("  mov r3,r0,lsr r2 ;@ Get right part\n");
-    ot("  rsbs r2,r2,#%d ;@ should also clear ARM V\n",wide+1);
-    ot("  movs r0,r0,lsl r2 ;@ Get left part\n");
-    ot("  orr r0,r3,r0 ;@ r0=Rotated value\n");
-
-    ot(";@ Insert X bit into r2-1:\n");
+    ot("\n");
+    ot(";@ First get X bit (middle):\n");
     ot("  ldr r3,[r7,#0x4c]\n");
-    ot("  sub r2,r2,#1\n");
+    ot("  rsb r1,r2,#%d\n",wide);
     ot("  and r3,r3,#0x20000000\n");
     ot("  mov r3,r3,lsr #29\n");
-    ot("  orr r0,r0,r3,lsl r2\n");
+    ot("  mov r3,r3,lsl r1\n");
+
+    ot(";@ Rotate bits:\n");
+    ot("  orr r3,r3,r0,lsr r2 ;@ Orr right part\n");
+    ot("  rsbs r2,r2,#%d ;@ should also clear ARM V\n",wide+1);
+    ot("  orrs r0,r3,r0,lsl r2 ;@ Orr left part, set flags\n");
     ot("\n");
 
     if (shift) ot("  movs r0,r0,lsl #%d ;@ Shift up and get correct NC flags\n",shift);
     OpGetFlags(0,!usereg);
-    if (!shift) {
-      ot("  tst r0,r0\n");
-      ot("  bicne r9,r9,#0x40000000 ;@ make sure we didn't mess Z\n");
-    }
     if (usereg) { // store X only if count is not 0
       ot("  str r9,[r7,#0x4c] ;@ if not 0, Save X bit\n");
       ot("  b nozerox%.4x\n",op);
-      ot("norotx%.4x%s\n",op,ms?"":":");
+      ot("norotx_%.4x%s\n",op,ms?"":":");
       ot("  ldr r2,[r7,#0x4c]\n");
       ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
       OpGetFlags(0,0);
@@ -536,9 +547,10 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
     }
 
     ot(";@ Rotate register:\n");
+    if (!dir) ot("  adds r0,r0,#0 ;@ first clear V and C\n"); // ARM does not clear C if rot count is 0
     if (count<0)
     {
-      if (dir) ot("  rsbs %s,%s,#32\n",pct,pct);
+      if (dir) ot("  rsb %s,%s,#32\n",pct,pct);
       ot("  movs r0,r0,ror %s\n",pct);
     }
     else
@@ -549,9 +561,9 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
     }
 
     OpGetFlags(0,0);
-    if (!dir) ot("  bic r9,r9,#0x10000000 ;@ make suve V is clear\n");
     if (dir)
     {
+      ot("  bic r9,r9,#0x30000000 ;@ clear CV\n");
       ot(";@ Get carry bit from bit 0:\n");
       if (usereg)
       {
@@ -561,14 +573,6 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       else
         ot("  tst r0,#1\n");
       ot("  orrne r9,r9,#0x20000000\n");
-      ot("  biceq r9,r9,#0x20000000\n");
-    }
-    else if (usereg)
-    {
-      // if we rotate something by 0, ARM doesn't clear C
-      // so we need to detect that
-      ot("  cmp %s,#0\n",pct);
-      ot("  biceq r9,r9,#0x20000000\n");
     }
     ot("\n");
 
@@ -586,7 +590,6 @@ int OpAsr(int op)
   int count=0,dir=0;
   int size=0,usereg=0,type=0;
 
-  ea=0;
   count =(op>>9)&7;
   dir   =(op>>8)&1;
   size  =(op>>6)&3;
@@ -599,13 +602,13 @@ int OpAsr(int op)
   // Use the same opcode for target registers:
   use=op&~0x0007;
 
-  // As long as count is not 8, use the same opcode for all shift counts::
+  // As long as count is not 8, use the same opcode for all shift counts:
   if (usereg==0 && count!=8 && !(count==1&&type==2)) { use|=0x0e00; count=-1; }
   if (usereg) { use&=~0x0e00; count=-1; } // Use same opcode for all Dn
 
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
-  OpStart(op); Cycles=size<2?6:8;
+  OpStart(op,ea,0,count<0); Cycles=size<2?6:8;
 
   EaCalc(10,0x0007, ea,size,1);
   EaRead(10,     0, ea,size,0x0007,1);
@@ -614,7 +617,8 @@ int OpAsr(int op)
 
   EaWrite(10,    0, ea,size,0x0007,1);
 
-  OpEnd();
+  opend_op_changes_cycles = (count<0);
+  OpEnd(ea,0);
 
   return 0;
 }