X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2FCyclone%2FOpLogic.cpp;h=65d229379cd4308e8dadc164689f6cc30213dc02;hb=60305cdd4d832c9a0b69914a78d4668a1b4d2b48;hp=33be8c94ac605efabe984d244ca48b9fd6e88aa0;hpb=3a5e6cf8477084dd63ab1eeadef88db3d218caea;p=picodrive.git

diff --git a/cpu/Cyclone/OpLogic.cpp b/cpu/Cyclone/OpLogic.cpp
index 33be8c9..65d2293 100644
--- a/cpu/Cyclone/OpLogic.cpp
+++ b/cpu/Cyclone/OpLogic.cpp
@@ -23,7 +23,7 @@ int OpBtstReg(int op)
     if (EaCanWrite(tea)==0) return 1;
   }
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   use&=~0x0e00; // Use same handler for all registers
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
@@ -36,13 +36,9 @@ int OpBtstReg(int op)
     if(size>=2) Cycles+=2;
   }
 
-  EaCalc (10,0x0e00,sea,0,0,0);
-  EaRead (10,    10,sea,0,0x0e00,0,0);
+  EaCalcReadNoSE(-1,10,sea,0,0x0e00);
 
-  EaCalc ( 0,0x003f,tea,size,0,0);
-  if (type>0)
-    ot("  mov r11,r0\n");
-  EaRead ( 0,     0,tea,size,0x003f,0,0);
+  EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);
 
   if (tea>=0x10)
        ot("  and r10,r10,#7  ;@ mem - do mod 8\n");  // size always 0
@@ -89,14 +85,13 @@ int OpBtstImm(int op)
     if (EaCanWrite(tea)==0) return 1;
   }
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea,tea);
 
   ot("\n");
-  EaCalc ( 0,0x0000,sea,0,0,0);
-  EaRead ( 0,     0,sea,0,0,0,0);
+  EaCalcReadNoSE(-1,0,sea,0,0);
   ot("  mov r10,#1\n");
   ot("  bic r9,r9,#0x40000000 ;@ Blank Z flag\n");
   if (tea>=0x10)
@@ -112,8 +107,7 @@ int OpBtstImm(int op)
     if(size>=2) Cycles+=2;
   }
 
-  EaCalc (11,0x003f,tea,size,0,0);
-  EaRead (11,     0,tea,size,0x003f,0,0);
+  EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);
   ot("  tst r0,r10 ;@ Do arithmetic\n");
   ot("  orreq r9,r9,#0x40000000 ;@ Get Z flag\n");
   ot("\n");
@@ -146,7 +140,7 @@ int OpNeg(int op)
   if (EaCanRead (ea,size)==0||EaAn(ea)) return 1;
   if (EaCanWrite(ea     )==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea);   Cycles=size<2?4:6;
@@ -162,7 +156,7 @@ int OpNeg(int op)
 
   EaCalc (10,0x003f,ea,size,0,0);
 
-  if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for dummy read?)
+  if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)
   if (type==1) ot("\n");
 
   if (type==0)
@@ -260,7 +254,7 @@ int OpTst(int op)
   // See if we can do this opcode:
   if (EaCanWrite(sea)==0||EaAn(sea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea); Cycles=4;
@@ -288,7 +282,7 @@ int OpExt(int op)
   size=(op>>6)&1;
   shift=32-(8<<size);
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op); Cycles=4;
@@ -328,7 +322,7 @@ int OpSet(int op)
   // See if we can do this opcode:
   if (EaCanWrite(ea)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=8;
@@ -383,7 +377,7 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
   if (usereg)
   {
     ot(";@ Use Dn for count:\n");
-    ot("  and r2,r8,#7<<9\n");
+    ot("  and r2,r8,#0x0e00\n");
     ot("  ldr r2,[r7,r2,lsr #7]\n");
     ot("  and r2,r2,#63\n");
     ot("\n");
@@ -409,29 +403,30 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       ot("\n");
     }
 
-    if (type==0 && dir) ot("  mov r3,r0 ;@ save old value for V flag calculation\n");
+    if (type==0 && dir) ot("  adds r3,r0,#0 ;@ save old value for V flag calculation, also clear V\n");
 
     ot(";@ Shift register:\n");
     if (type==0) ot("  movs r0,r0,%s %s\n",dir?"asl":"asr",pct);
     if (type==1) ot("  movs r0,r0,%s %s\n",dir?"lsl":"lsr",pct);
 
-    if (dir==0 && size<2)
-    {
-      ot(";@ restore after right shift:\n");
-      ot("  mov r0,r0,lsl #%d\n",32-(8<<size));
-      ot("\n");
-    }
-
     OpGetFlags(0,0);
     if (usereg) { // store X only if count is not 0
       ot("  cmp %s,#0 ;@ shifting by 0?\n",pct);
       ot("  biceq r9,r9,#0x20000000 ;@ if so, clear carry\n");
-      ot("  movne r1,r9,lsr #28\n");
-      ot("  strneb r1,[r7,#0x45] ;@ else Save X bit\n");
+      ot("  strne r9,[r7,#0x4c] ;@ else Save X bit\n");
     } else {
       // count will never be 0 if we use immediate
-      ot("  mov r1,r9,lsr #28\n");
-      ot("  strb r1,[r7,#0x45] ;@ Save X bit\n");
+      ot("  str r9,[r7,#0x4c] ;@ Save X bit\n");
+    }
+    ot("\n");
+
+    if (dir==0 && size<2)
+    {
+      ot(";@ restore after right shift:\n");
+      ot("  movs r0,r0,lsl #%d\n",32-(8<<size));
+      if (type)
+        ot("  orrmi r9,r9,#0x80000000 ;@ Potentially missed N flag\n");
+      ot("\n");
     }
 
     if (type==0 && dir) {
@@ -439,11 +434,11 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       ot("  mov r1,#0x80000000\n");
       ot("  ands r3,r3,r1,asr %s\n", pct);
       ot("  cmpne r3,r1,asr %s\n", pct);
-      ot("  biceq r9,r9,#0x10000000\n");
+      ot("  eoreq r1,r0,r3\n"); // above check doesn't catch (-1)<<(32+), so we need this
+      ot("  tsteq r1,#0x80000000\n");
       ot("  orrne r9,r9,#0x10000000\n");
+      ot("\n");
     }
-
-    ot("\n");
   }
 
   // --------------------------------------
@@ -462,10 +457,10 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
         ot("  movs r0,r0,rrx\n");
         OpGetFlags(0,1);
       } else {
-        ot("  ldrb r3,[r7,#0x45]\n");
+        ot("  ldr r3,[r7,#0x4c]\n");
         ot("  movs r0,r0,lsl #1\n");
         OpGetFlags(0,1);
-        ot("  tst r3,#2\n");
+        ot("  tst r3,#0x20000000\n");
         ot("  orrne r0,r0,#0x%x\n", 1<<(32-wide));
         ot("  bicne r9,r9,#0x40000000 ;@ clear Z in case it got there\n");
       }
@@ -475,12 +470,20 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
 
     if (usereg)
     {
-      ot(";@ Reduce r2 until <0:\n");
-      ot("Reduce_%.4x%s\n",op,ms?"":":");
-      ot("  subs r2,r2,#%d\n",wide+1);
-      ot("  bpl Reduce_%.4x\n",op);
-      ot("  adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide);
-      ot("  beq norotx%.4x\n",op);
+      if (size==2)
+      {
+        ot("  subs r2,r2,#33\n");
+        ot("  addmis r2,r2,#33 ;@ Now r2=0-%d\n",wide);
+      }
+      else
+      {
+        ot(";@ Reduce r2 until <0:\n");
+        ot("Reduce_%.4x%s\n",op,ms?"":":");
+        ot("  subs r2,r2,#%d\n",wide+1);
+        ot("  bpl Reduce_%.4x\n",op);
+        ot("  adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide);
+      }
+      ot("  beq norotx_%.4x\n",op);
       ot("\n");
     }
 
@@ -496,36 +499,31 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
 
     if (shift) ot("  mov r0,r0,lsr #%d ;@ Shift down\n",shift);
 
+    ot("\n");
+    ot(";@ First get X bit (middle):\n");
+    ot("  ldr r3,[r7,#0x4c]\n");
+    ot("  rsb r1,r2,#%d\n",wide);
+    ot("  and r3,r3,#0x20000000\n");
+    ot("  mov r3,r3,lsr #29\n");
+    ot("  mov r3,r3,lsl r1\n");
+
     ot(";@ Rotate bits:\n");
-    ot("  mov r3,r0,lsr r2 ;@ Get right part\n");
+    ot("  orr r3,r3,r0,lsr r2 ;@ Orr right part\n");
     ot("  rsbs r2,r2,#%d ;@ should also clear ARM V\n",wide+1);
-    ot("  movs r0,r0,lsl r2 ;@ Get left part\n");
-    ot("  orr r0,r3,r0 ;@ r0=Rotated value\n");
-
-    ot(";@ Insert X bit into r2-1:\n");
-    ot("  ldrb r3,[r7,#0x45]\n");
-    ot("  sub r2,r2,#1\n");
-    ot("  and r3,r3,#2\n");
-    ot("  mov r3,r3,lsr #1\n");
-    ot("  orr r0,r0,r3,lsl r2\n");
+    ot("  orrs r0,r3,r0,lsl r2 ;@ Orr left part, set flags\n");
     ot("\n");
 
     if (shift) ot("  movs r0,r0,lsl #%d ;@ Shift up and get correct NC flags\n",shift);
     OpGetFlags(0,!usereg);
-    if (!shift) {
-      ot("  tst r0,r0\n");
-      ot("  bicne r9,r9,#0x40000000 ;@ make sure we didn't mess Z\n");
-    }
     if (usereg) { // store X only if count is not 0
-      ot("  mov r2,r9,lsr #28\n");
-      ot("  strb r2,[r7,#0x45] ;@ if not 0, Save X bit\n");
+      ot("  str r9,[r7,#0x4c] ;@ if not 0, Save X bit\n");
       ot("  b nozerox%.4x\n",op);
-      ot("norotx%.4x%s\n",op,ms?"":":");
-      ot("  ldrb r2,[r7,#0x45]\n");
+      ot("norotx_%.4x%s\n",op,ms?"":":");
+      ot("  ldr r2,[r7,#0x4c]\n");
       ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
       OpGetFlags(0,0);
-      ot("  and r2,r2,#2\n");
-      ot("  orr r9,r9,r2,lsl #28 ;@ C = old_X\n");
+      ot("  and r2,r2,#0x20000000\n");
+      ot("  orr r9,r9,r2 ;@ C = old_X\n");
       ot("nozerox%.4x%s\n",op,ms?"":":");
     }
 
@@ -545,9 +543,10 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
     }
 
     ot(";@ Rotate register:\n");
+    if (!dir) ot("  adds r0,r0,#0 ;@ first clear V and C\n"); // ARM does not clear C if rot count is 0
     if (count<0)
     {
-      if (dir) ot("  rsbs %s,%s,#32\n",pct,pct);
+      if (dir) ot("  rsb %s,%s,#32\n",pct,pct);
       ot("  movs r0,r0,ror %s\n",pct);
     }
     else
@@ -558,9 +557,9 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
     }
 
     OpGetFlags(0,0);
-    if (!dir) ot("  bic r9,r9,#0x10000000 ;@ make suve V is clear\n");
     if (dir)
     {
+      ot("  bic r9,r9,#0x30000000 ;@ clear CV\n");
       ot(";@ Get carry bit from bit 0:\n");
       if (usereg)
       {
@@ -570,14 +569,6 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       else
         ot("  tst r0,#1\n");
       ot("  orrne r9,r9,#0x20000000\n");
-      ot("  biceq r9,r9,#0x20000000\n");
-    }
-    else if (usereg)
-    {
-      // if we rotate something by 0, ARM doesn't clear C
-      // so we need to detect that
-      ot("  cmp %s,#0\n",pct);
-      ot("  biceq r9,r9,#0x20000000\n");
     }
     ot("\n");
 
@@ -608,7 +599,7 @@ int OpAsr(int op)
   // Use the same opcode for target registers:
   use=op&~0x0007;
 
-  // As long as count is not 8, use the same opcode for all shift counts::
+  // As long as count is not 8, use the same opcode for all shift counts:
   if (usereg==0 && count!=8 && !(count==1&&type==2)) { use|=0x0e00; count=-1; }
   if (usereg) { use&=~0x0e00; count=-1; } // Use same opcode for all Dn
 
@@ -642,7 +633,7 @@ int OpAsrEa(int op)
   if (EaCanRead(ea,0)==0) return 1;
   if (EaCanWrite(ea)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=6; // EmitAsr() will add 2
@@ -668,7 +659,7 @@ int OpTas(int op, int gen_special)
   // See if we can do this opcode:
   if (EaCanWrite(ea)==0 || EaAn(ea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   if (!gen_special) OpStart(op,ea);