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diff --git a/cpu/Cyclone/config.h b/cpu/Cyclone/config.h
index bcea68d..24b73a1 100644
--- a/cpu/Cyclone/config.h
+++ b/cpu/Cyclone/config.h
@@ -15,10 +15,10 @@
  * Enable this option if you are going to use Cyclone to emulate Genesis /
  * Mega Drive system. As VDP chip in these systems had control of the bus,
  * several instructions were acting differently, for example TAS did'n have
- * the write-back phase. That will be emulated, if this option is enebled.
+ * the write-back phase. That will be emulated, if this option is enabled.
  * This option also alters timing slightly.
  */
-#define CYCLONE_FOR_GENESIS	      1
+#define CYCLONE_FOR_GENESIS       0
 
 /*
  * This option compresses Cyclone's jumptable. Because of this the executable
@@ -29,21 +29,36 @@
  */
 #define COMPRESS_JUMPTABLE        1
 
+/*
+ * Address mask for memory hadlers. The bits set will be masked out of address
+ * parameter, which is passed to r/w memory handlers.
+ * Using 0xff000000 means that only 24 least significant bits should be used.
+ * Set to 0 if you want to mask unused address bits in the memory handlers yourself.
+ */
+#define MEMHANDLERS_ADDR_MASK     0
+
 /*
  * Cyclone keeps the 4 least significant bits of SR, PC+membase and it's cycle
  * count in ARM registers instead of the context for performance reasons. If you for
  * any reason need to access them in your memory handlers, enable the options below,
  * otherwise disable them to improve performance.
- * Warning: the PC value will not point to start of instruction (it will be middle or
- * end), also updating PC is dangerous, as Cyclone may internally increment the PC
- * before fetching the next instruction and continue executing at wrong location.
+ * MEMHANDLERS_NEED_PC updates .pc context field with PC value effective at the time
+ * when memhandler was called (opcode address + unknown amount).
+ * MEMHANDLERS_NEED_PREV_PC updates .prev_pc context field to currently executed
+ * opcode address + 2.
+ * Note that .pc and .prev_pc values are always real pointers to memory, so you must
+ * subtract .membase to get M68k PC value.
+ * Warning: updating PC in memhandlers is dangerous, as Cyclone may internally
+ * increment the PC before fetching the next instruction and continue executing
+ * at wrong location.
  */
-#define MEMHANDLERS_NEED_PC       0
+#define MEMHANDLERS_NEED_PC       1
+#define MEMHANDLERS_NEED_PREV_PC  0
 #define MEMHANDLERS_NEED_FLAGS    0
 #define MEMHANDLERS_NEED_CYCLES   1
 #define MEMHANDLERS_CHANGE_PC     0
 #define MEMHANDLERS_CHANGE_FLAGS  0
-#define MEMHANDLERS_CHANGE_CYCLES 0
+#define MEMHANDLERS_CHANGE_CYCLES 1
 
 /*
  * If enabled, Cyclone will call IrqCallback routine from it's context whenever it
@@ -64,13 +79,13 @@
  * encountered. All context members are valid and can be changed.
  * If disabled, RESET opcode acts as an NOP.
  */
-#define USE_RESET_CALLBACK        1
+#define USE_RESET_CALLBACK        0
 
 /*
  * If enabled, UnrecognizedCallback is called if an invalid opcode is
  * encountered. All context members are valid and can be changed. The handler
  * should return zero if you want Cyclone to gererate "Illegal Instruction"
- * exception after this, or nonzero if not. In the later case you shuold change
+ * exception after this, or nonzero if not. In the later case you should change
  * the PC by yourself, or else Cyclone will keep executing that opcode all over
  * again.
  * If disabled, "Illegal Instruction" exception is generated and execution is
@@ -92,6 +107,19 @@
  */
 #define USE_CHECKPC_CALLBACK      1
 
+/*
+ * This determines if checkpc() should be called after jumps when 8 and 16 bit
+ * displacement values were used.
+ */
+#define USE_CHECKPC_OFFSETBITS_16 1
+#define USE_CHECKPC_OFFSETBITS_8  0
+
+/*
+ * Call checkpc() after DBcc jumps (which use 16bit displacement). Cyclone prior to
+ * 0.0087 never did that.
+ */
+#define USE_CHECKPC_DBRA          0
+
 /*
  * When this option is enabled Cyclone will do two word writes instead of one
  * long write when handling MOVE.L with pre-decrementing destination, as described in