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diff --git a/cpu/Cyclone/config.h b/cpu/Cyclone/config.h
index ded00b1..24b73a1 100644
--- a/cpu/Cyclone/config.h
+++ b/cpu/Cyclone/config.h
@@ -18,7 +18,7 @@
  * the write-back phase. That will be emulated, if this option is enabled.
  * This option also alters timing slightly.
  */
-#define CYCLONE_FOR_GENESIS       1
+#define CYCLONE_FOR_GENESIS       0
 
 /*
  * This option compresses Cyclone's jumptable. Because of this the executable
@@ -35,24 +35,30 @@
  * Using 0xff000000 means that only 24 least significant bits should be used.
  * Set to 0 if you want to mask unused address bits in the memory handlers yourself.
  */
-#define MEMHANDLERS_ADDR_MASK     0xff000000
+#define MEMHANDLERS_ADDR_MASK     0
 
 /*
  * Cyclone keeps the 4 least significant bits of SR, PC+membase and it's cycle
  * count in ARM registers instead of the context for performance reasons. If you for
  * any reason need to access them in your memory handlers, enable the options below,
  * otherwise disable them to improve performance.
- * PC value will point to start of instruction currently executed.
+ * MEMHANDLERS_NEED_PC updates .pc context field with PC value effective at the time
+ * when memhandler was called (opcode address + unknown amount).
+ * MEMHANDLERS_NEED_PREV_PC updates .prev_pc context field to currently executed
+ * opcode address + 2.
+ * Note that .pc and .prev_pc values are always real pointers to memory, so you must
+ * subtract .membase to get M68k PC value.
  * Warning: updating PC in memhandlers is dangerous, as Cyclone may internally
  * increment the PC before fetching the next instruction and continue executing
  * at wrong location.
  */
-#define MEMHANDLERS_NEED_PC       0
+#define MEMHANDLERS_NEED_PC       1
+#define MEMHANDLERS_NEED_PREV_PC  0
 #define MEMHANDLERS_NEED_FLAGS    0
 #define MEMHANDLERS_NEED_CYCLES   1
 #define MEMHANDLERS_CHANGE_PC     0
 #define MEMHANDLERS_CHANGE_FLAGS  0
-#define MEMHANDLERS_CHANGE_CYCLES 0
+#define MEMHANDLERS_CHANGE_CYCLES 1
 
 /*
  * If enabled, Cyclone will call IrqCallback routine from it's context whenever it
@@ -73,7 +79,7 @@
  * encountered. All context members are valid and can be changed.
  * If disabled, RESET opcode acts as an NOP.
  */
-#define USE_RESET_CALLBACK        1
+#define USE_RESET_CALLBACK        0
 
 /*
  * If enabled, UnrecognizedCallback is called if an invalid opcode is
@@ -101,6 +107,19 @@
  */
 #define USE_CHECKPC_CALLBACK      1
 
+/*
+ * This determines if checkpc() should be called after jumps when 8 and 16 bit
+ * displacement values were used.
+ */
+#define USE_CHECKPC_OFFSETBITS_16 1
+#define USE_CHECKPC_OFFSETBITS_8  0
+
+/*
+ * Call checkpc() after DBcc jumps (which use 16bit displacement). Cyclone prior to
+ * 0.0087 never did that.
+ */
+#define USE_CHECKPC_DBRA          0
+
 /*
  * When this option is enabled Cyclone will do two word writes instead of one
  * long write when handling MOVE.L with pre-decrementing destination, as described in