X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2FDrZ80%2Fdrz80.s;h=b92b2c2dff79a3fa50c7053f899c3c2aa7436924;hb=868cc0cc8f2fc6cfd278b15e8dbd042188de53ca;hp=10619108c0f6004e57f6e3330e1c99c8b9546ce8;hpb=28d596af3666635348d797806779f7d69d65b4a4;p=picodrive.git

diff --git a/cpu/DrZ80/drz80.s b/cpu/DrZ80/drz80.s
index 1061910..b92b2c2 100644
--- a/cpu/DrZ80/drz80.s
+++ b/cpu/DrZ80/drz80.s
@@ -11,29 +11,27 @@
       .global DrZ80Run
       .global DrZ80Ver
 
-      .equiv INTERRUPT_MODE,        0	;@0 = Use internal int handler, 1 = Use Mames int handler
-      .equiv FAST_Z80SP,            1	;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer
-      .equiv UPDATE_CONTEXT,        0
-      .equiv DRZ80_FOR_PICODRIVE,   1
+      .equiv INTERRUPT_MODE,         0	;@0 = Use internal int handler, 1 = Use Mames int handler
+      .equiv FAST_Z80SP,             1	;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer
+      .equiv UPDATE_CONTEXT,         0
+      .equiv DRZ80_XMAP,             1
+      .equiv DRZ80_XMAP_MORE_INLINE, 1
+
+.if DRZ80_XMAP
+      .equ Z80_MEM_SHIFT, 13
+.endif
 
 .if INTERRUPT_MODE
       .extern Interrupt
 .endif
 
-.if DRZ80_FOR_PICODRIVE
-      .extern PicoRead8
-      .extern Pico
-      .extern z80_write
-      .extern ym2612_read_local_z80
-.endif
-
 DrZ80Ver: .long 0x0001
 
 ;@ --------------------------- Defines ----------------------------
 ;@ Make sure that regs/pointers for z80pc to z80sp match up!
 
-	opcodes    .req r3
-	z80_icount .req r4
+	z80_icount .req r3
+	opcodes    .req r4
 	cpucontext .req r5
 	z80pc      .req r6
 	z80a       .req r7
@@ -99,143 +97,140 @@ DrZ80Ver: .long 0x0001
 	.equ Z80_IF1, 1<<0
 	.equ Z80_IF2, 1<<1
 	.equ Z80_HALT, 1<<2
+	.equ Z80_NMI, 1<<3
 
 ;@---------------------------------------
 
 .text
 
-.if DRZ80_FOR_PICODRIVE
-
-pico_z80_read8: @ addr
-    cmp r0,#0x2000         @ Z80 RAM
-    ldrlt r1,[cpucontext,#z80sp_base]
-    ldrltb r0,[r1,r0]
-    bxlt lr
-
-    cmp r0,#0x8000         @ 68k bank
-    blt 1f
-    ldr r2,=(Pico+0x22212)
-    ldrh r1,[r2]
-    bic r0,r0,#0x3f8000
-    orr r0,r0,r1,lsl #15
-    ldr r1,[r2,#-0xe]      @ ROM size
-    cmp r0,r1
-    ldrlt r1,[r2,#-0x12]   @ ROM
-    eorlt r0,r0,#1         @ our ROM is byteswapped
-    ldrltb r0,[r1,r0]
-    bxlt lr
-    stmfd sp!,{r3,r12,lr}
-    bl PicoRead8
-    ldmfd sp!,{r3,r12,pc}
-1:
-    mov r1,r0,lsr #13
-    cmp r1,#2              @ YM2612 (0x4000-0x5fff)
-    bne 0f
-    and r0,r0,#3
-    stmfd sp!,{r3,r12,lr}
+.if DRZ80_XMAP
+
+z80_xmap_read8: @ addr
+    ldr r1,[cpucontext,#z80_read8]
+    mov r2,r0,lsr #Z80_MEM_SHIFT
+    ldr r1,[r1,r2,lsl #2]
+    movs r1,r1,lsl #1
+    ldrccb r0,[r1,r0]
+    bxcc lr
+
+z80_xmap_read8_handler: @ addr, func
     str z80_icount,[cpucontext,#cycles_pointer]
-    bl ym2612_read_local_z80
-    ldmfd sp!,{r3,r12,pc}
-0:
-    cmp r0,#0x4000
-    movge r0,#0xff
-    bxge lr
-    ldr r1,[cpucontext,#z80sp_base]
-    bic r0,r0,#0x0fe000    @ Z80 RAM (mirror)
-    ldrb r0,[r1,r0]
-    bx lr
+    stmfd sp!,{r12,lr}
+    mov lr,pc
+    bx r1
+    ldr z80_icount,[cpucontext,#cycles_pointer]
+    ldmfd sp!,{r12,pc}
+
+z80_xmap_write8: @ data, addr
+    ldr r2,[cpucontext,#z80_write8]
+    add r2,r2,r1,lsr #Z80_MEM_SHIFT-2
+    bic r2,r2,#3
+    ldr r2,[r2]
+    movs r2,r2,lsl #1
+    strccb r0,[r2,r1]
+    bxcc lr
+
+z80_xmap_write8_handler: @ data, addr, func
+    str z80_icount,[cpucontext,#cycles_pointer]
+    mov r3,r0
+    mov r0,r1
+    mov r1,r3
+    stmfd sp!,{r12,lr}
+    mov lr,pc
+    bx r2
+    ldr z80_icount,[cpucontext,#cycles_pointer]
+    ldmfd sp!,{r12,pc}
+
+z80_xmap_read16: @ addr
+    @ check if we cross bank boundary
+    add r1,r0,#1
+    eor r1,r1,r0
+    tst r1,#1<<Z80_MEM_SHIFT
+    bne 0f
 
-pico_z80_read16: @ addr
-    cmp r0,#0x2000         @ Z80 RAM
-    bge 2f
-    ldr r1,[cpucontext,#z80sp_base]
+    ldr r1,[cpucontext,#z80_read8]
+    mov r2,r0,lsr #Z80_MEM_SHIFT
+    ldr r1,[r1,r2,lsl #2]
+    movs r1,r1,lsl #1
+    bcs 0f
     ldrb r0,[r1,r0]!
     ldrb r1,[r1,#1]
     orr r0,r0,r1,lsl #8
     bx lr
 
-2:
-    cmp r0,#0x8000         @ 68k bank
-    blt 1f
-    ldr r2,=(Pico+0x22212)
-    ldrh r1,[r2]
-    bic r0,r0,#0x1f8000
-    orr r0,r0,r1,lsl #15
-    ldr r1,[r2,#-0xe]      @ ROM size
-    cmp r0,r1
-    ldr r1,[r2,#-0x12]     @ ROM
-    tst r0,#1
-    eor r0,r0,#1
-    ldrb r0,[r1,r0]!
-    ldreqb r1,[r1,#-1]
-    ldrneb r1,[r1,#3]      @ this is due to byteswapped ROM
-    orr r0,r0,r1,lsl #8
-    bx lr
-3:
-    stmfd sp!,{r3-r5,r12,lr}
-    mov r4,r0
-    bl PicoRead8
-    mov r5,r0
-    add r0,r4,#1
-    bl PicoRead8
-    orr r0,r5,r0,lsl #8
-    ldmfd sp!,{r3-r5,r12,pc}
-1:
-    mov r1,r0,lsr #13
-    cmp r1,#2              @ YM2612 (0x4000-0x5fff)
+0:
+    @ z80_xmap_read8 will save r3 and r12 for us
+    stmfd sp!,{r8,r9,lr}
+    mov r8,r0
+    bl z80_xmap_read8
+    mov r9,r0
+    add r0,r8,#1
+    bl z80_xmap_read8
+    orr r0,r9,r0,lsl #8
+    ldmfd sp!,{r8,r9,pc}
+
+z80_xmap_write16: @ data, addr
+    add r2,r1,#1
+    eor r2,r2,r1
+    tst r2,#1<<Z80_MEM_SHIFT
     bne 0f
-    and r0,r0,#3
+
+    ldr r2,[cpucontext,#z80_write8]
+    add r2,r2,r1,lsr #Z80_MEM_SHIFT-2
+    bic r2,r2,#3
+    ldr r2,[r2]
+    movs r2,r2,lsl #1
+    bcs 0f
+    strb r0,[r2,r1]!
+    mov r0,r0,lsr #8
+    strb r0,[r2,#1]
+    bx lr
+
+0:
+    stmfd sp!,{r8,r9,lr}
+    mov r8,r0
+    mov r9,r1
+    bl z80_xmap_write8
+    mov r0,r8,lsr #8
+    add r1,r9,#1
+    bl z80_xmap_write8
+    ldmfd sp!,{r8,r9,pc}
+
+z80_xmap_rebase_pc:
+    ldr r1,[cpucontext,#z80_read8]
+    mov r2,r0,lsr #Z80_MEM_SHIFT
+    ldr r1,[r1,r2,lsl #2]
+    movs r1,r1,lsl #1
+    strcc r1,[cpucontext,#z80pc_base]
+    addcc z80pc,r1,r0
+    bxcc lr
+
+z80_bad_jump:
     stmfd sp!,{r3,r12,lr}
-    str z80_icount,[cpucontext,#cycles_pointer]
-    bl ym2612_read_local_z80
-    orr r0,r0,r0,lsl #8
+    mov lr,pc
+    ldr pc,[cpucontext,#z80_rebasePC]
+    mov z80pc,r0
     ldmfd sp!,{r3,r12,pc}
-0:
-    cmp r0,#0x4000
-    movge r0,#0xff
-    bxge lr
-    ldr r1,[cpucontext,#z80sp_base]
-    bic r0,r0,#0x0fe000    @ Z80 RAM (mirror)
-    ldrb r0,[r1,r0]!
-    ldrb r1,[r1,#1]
-    orr r0,r0,r1,lsl #8
-    bx lr
 
-pico_z80_write8: @ data, addr
-    cmp r1,#0x4000
-    bge 1f
-    ldr r2,[cpucontext,#z80sp_base]
-    bic r1,r1,#0x0fe000    @ Z80 RAM
-    strb r0,[r2,r1]
-    bx lr
-1:
+z80_xmap_rebase_sp:
+    ldr r1,[cpucontext,#z80_read8]
+    sub r2,r0,#1
+    mov r2,r2,lsl #16
+    mov r2,r2,lsr #(Z80_MEM_SHIFT+16)
+    ldr r1,[r1,r2,lsl #2]
+    movs r1,r1,lsl #1
+    strcc r1,[cpucontext,#z80sp_base]
+    addcc z80sp,r1,r0
+    bxcc lr
+
     stmfd sp!,{r3,r12,lr}
-    str z80_icount,[cpucontext,#cycles_pointer]
-    bl z80_write
+    mov lr,pc
+    ldr pc,[cpucontext,#z80_rebaseSP]
+    mov z80sp,r0
     ldmfd sp!,{r3,r12,pc}
+ 
+.endif @ DRZ80_XMAP
 
-pico_z80_write16: @ data, addr
-    cmp r1,#0x4000
-    bge 1f
-    ldr r2,[cpucontext,#z80sp_base]
-    bic r1,r1,#0x0fe000    @ Z80 RAM
-    strb r0,[r2,r1]!
-    mov r0,r0,lsr #8
-    strb r0,[r2,#1]
-    bx lr
-1:
-    stmfd sp!,{r3-r5,r12,lr}
-    str z80_icount,[cpucontext,#cycles_pointer]
-    mov r4,r0
-    mov r5,r1
-    bl z80_write
-    mov r0,r4,lsr #8
-    add r1,r5,#1
-    bl z80_write
-    ldmfd sp!,{r3-r5,r12,pc}
-
-    .pool
-.endif
 
 .macro fetch cycs
 	subs z80_icount,z80_icount,#\cycs
@@ -262,9 +257,18 @@ pico_z80_write16: @ data, addr
 .if UPDATE_CONTEXT
     str z80pc,[cpucontext,#z80pc_pointer]
 .endif
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_read8
+.if DRZ80_XMAP
+.if !DRZ80_XMAP_MORE_INLINE
+    ldr r1,[cpucontext,#z80_read8]
+    mov r2,r0,lsr #Z80_MEM_SHIFT
+    ldr r1,[r1,r2,lsl #2]
+    movs r1,r1,lsl #1
+    ldrccb r0,[r1,r0]
+    blcs z80_xmap_read8_handler
 .else
+    bl z80_xmap_read8
+.endif
+.else ;@ if !DRZ80_XMAP
     stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_read8]			;@ r0 = addr - data returned in r0
@@ -281,8 +285,8 @@ pico_z80_write16: @ data, addr
 .if UPDATE_CONTEXT
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_read16
+.if DRZ80_XMAP
+    bl z80_xmap_read16
 .else
 	stmfd sp!,{r3,r12}
 	mov lr,pc
@@ -295,9 +299,18 @@ pico_z80_write16: @ data, addr
 .if UPDATE_CONTEXT
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_write8
+.if DRZ80_XMAP
+.if DRZ80_XMAP_MORE_INLINE
+    ldr r2,[cpucontext,#z80_write8]
+    mov lr,r1,lsr #Z80_MEM_SHIFT
+    ldr r2,[r2,lr,lsl #2]
+    movs r2,r2,lsl #1
+    strccb r0,[r2,r1]
+    blcs z80_xmap_write8_handler
 .else
+    bl z80_xmap_write8
+.endif
+.else ;@ if !DRZ80_XMAP
 	stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_write8]			;@ r0=data r1=addr
@@ -319,8 +332,8 @@ pico_z80_write16: @ data, addr
 .if UPDATE_CONTEXT
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_write16
+.if DRZ80_XMAP
+    bl z80_xmap_write16
 .else
 	stmfd sp!,{r3,r12}
 	mov lr,pc
@@ -334,19 +347,16 @@ pico_z80_write16: @ data, addr
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
 	mov r0,z80hl, lsr #16
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_read8
+.if DRZ80_XMAP
+    bl z80_xmap_read8
 .else
     stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_read8]			;@ r0 = addr - data returned in r0
-.endif
-.if UPDATE_CONTEXT
-     str z80pc,[cpucontext,#z80pc_pointer]
 .endif
 	mov r1,z80de, lsr #16
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_write8
+.if DRZ80_XMAP
+    bl z80_xmap_write8
 .else
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_write8]			;@ r0=data r1=addr
@@ -359,10 +369,8 @@ pico_z80_write16: @ data, addr
 .if UPDATE_CONTEXT
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
-.if DRZ80_FOR_PICODRIVE
-    bic r0,r0,#0xfe000
-    ldr r1,[cpucontext,#z80pc_base]
-    add z80pc,r1,r0
+.if DRZ80_XMAP
+    bl z80_xmap_rebase_pc
 .else
     stmfd sp!,{r3,r12}
 	mov lr,pc
@@ -376,15 +384,14 @@ pico_z80_write16: @ data, addr
 .if UPDATE_CONTEXT
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
-.if DRZ80_FOR_PICODRIVE
-    bic r0,r0,#0xfe000
-    ldr r1,[cpucontext,#z80sp_base]
-    add r0,r1,r0
+.if DRZ80_XMAP
+    bl z80_xmap_rebase_sp
 .else
 	stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_rebaseSP]		;@ external function must rebase sp
 	ldmfd sp!,{r3,r12}
+	mov z80sp,r0
 .endif
 .endm
 ;@----------------------------------------------------------------------------
@@ -746,22 +753,9 @@ pico_z80_write16: @ data, addr
 
 .macro opPOP
 .if FAST_Z80SP
-.if DRZ80_FOR_PICODRIVE
-    @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing
-    ldr r2,[cpucontext,#z80sp_base]
-	ldrb r0,[z80sp],#1
-    add r2,r2,#0x2000
-    cmp z80sp,r2
-@    subge z80sp,z80sp,#0x2000 @ unstable?
-	ldrb r1,[z80sp],#1
-    cmp z80sp,r2
-@    subge z80sp,z80sp,#0x2000
-	orr r0,r0,r1, lsl #8
-.else
 	ldrb r0,[z80sp],#1
 	ldrb r1,[z80sp],#1
 	orr r0,r0,r1, lsl #8
-.endif
 .else
 	mov r0,z80sp
 	readmem16
@@ -776,23 +770,22 @@ pico_z80_write16: @ data, addr
 .endm
 ;@---------------------------------------
 
+.macro stack_check
+    @ try to protect against stack overflows, lock into current bank
+    ldr r1,[cpucontext,#z80sp_base]
+    sub r1,z80sp,r1
+    cmp r1,#2
+    addlt z80sp,z80sp,#1<<Z80_MEM_SHIFT
+.endm
+
 .macro opPUSHareg reg @ reg > r1
 .if FAST_Z80SP
-.if DRZ80_FOR_PICODRIVE
-    @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing
-    ldr r0,[cpucontext,#z80sp_base]
-    cmp z80sp,r0
-    addle z80sp,z80sp,#0x2000
-    mov r1,\reg, lsr #8
-	strb r1,[z80sp,#-1]!
-    cmp z80sp,r0
-    addle z80sp,z80sp,#0x2000
-	strb \reg,[z80sp,#-1]!
-.else
+.if DRZ80_XMAP
+	stack_check
+.endif
 	mov r1,\reg, lsr #8
 	strb r1,[z80sp,#-1]!
 	strb \reg,[z80sp,#-1]!
-.endif
 .else
     mov r0,\reg
 	sub z80sp,z80sp,#2
@@ -803,22 +796,13 @@ pico_z80_write16: @ data, addr
 
 .macro opPUSHreg reg
 .if FAST_Z80SP
-.if DRZ80_FOR_PICODRIVE
-    ldr r0,[cpucontext,#z80sp_base]
-    cmp z80sp,r0
-    addle z80sp,z80sp,#0x2000
-    mov r1,\reg, lsr #24
-	strb r1,[z80sp,#-1]!
-    cmp z80sp,r0
-    addle z80sp,z80sp,#0x2000
-	mov r1,\reg, lsr #16
-	strb r1,[z80sp,#-1]!
-.else
+.if DRZ80_XMAP
+	stack_check
+.endif
     mov r1,\reg, lsr #24
 	strb r1,[z80sp,#-1]!
 	mov r1,\reg, lsr #16
 	strb r1,[z80sp,#-1]!
-.endif
 .else
 	mov r0,\reg,lsr #16
 	sub z80sp,z80sp,#2
@@ -829,14 +813,13 @@ pico_z80_write16: @ data, addr
 ;@---------------------------------------
 
 .macro opRESmemHL bit
-.if DRZ80_FOR_PICODRIVE
 	mov r0,z80hl, lsr #16
-    bl pico_z80_read8
+.if DRZ80_XMAP
+	bl z80_xmap_read8
 	bic r0,r0,#1<<\bit
 	mov r1,z80hl, lsr #16
-    bl pico_z80_write8
+	bl z80_xmap_write8
 .else
-	mov r0,z80hl, lsr #16
 	stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_read8]			;@ r0 = addr - data returned in r0
@@ -851,12 +834,12 @@ pico_z80_write16: @ data, addr
 ;@---------------------------------------
 
 .macro opRESmem bit
-.if DRZ80_FOR_PICODRIVE
+.if DRZ80_XMAP
 	stmfd sp!,{r0}							;@ save addr as well
-    bl pico_z80_read8
+	bl z80_xmap_read8
 	bic r0,r0,#1<<\bit
 	ldmfd sp!,{r1}							;@ restore addr into r1
-    bl pico_z80_write8
+	bl z80_xmap_write8
 .else
 	stmfd sp!,{r3,r12}
 	stmfd sp!,{r0}							;@ save addr as well
@@ -1111,14 +1094,13 @@ pico_z80_write16: @ data, addr
 ;@---------------------------------------
 
 .macro opSETmemHL bit
-.if DRZ80_FOR_PICODRIVE
 	mov r0,z80hl, lsr #16
-    bl pico_z80_read8
+.if DRZ80_XMAP
+	bl z80_xmap_read8
 	orr r0,r0,#1<<\bit
 	mov r1,z80hl, lsr #16
-    bl pico_z80_write8
+	bl z80_xmap_write8
 .else
-	mov r0,z80hl, lsr #16
 	stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_read8]			;@ r0 = addr - data returned in r0
@@ -1133,12 +1115,12 @@ pico_z80_write16: @ data, addr
 ;@---------------------------------------
 
 .macro opSETmem bit
-.if DRZ80_FOR_PICODRIVE
+.if DRZ80_XMAP
 	stmfd sp!,{r0}	;@ save addr as well
-    bl pico_z80_read8
+	bl z80_xmap_read8
 	orr r0,r0,#1<<\bit
 	ldmfd sp!,{r1}	;@ restore addr into r1
-    bl pico_z80_write8
+	bl z80_xmap_write8
 .else
 	stmfd sp!,{r3,r12}
 	stmfd sp!,{r0}	;@ save addr as well
@@ -1372,30 +1354,34 @@ DrZ80Run:
 	mov z80_icount,r1						;@ setup number of Tstates to execute
 
 .if INTERRUPT_MODE == 0
-	ldrh r0,[cpucontext,#z80irq] @ 0x4C
+	ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits
 .endif
 	ldmia cpucontext,{z80pc-z80sp}			;@ load Z80 registers
 
 .if INTERRUPT_MODE == 0
 	;@ check ints
-	tst r0,#1
-	movnes r0,r0,lsr #8
-    blne DoInterrupt
+	tst r0,#(Z80_NMI<<8)
+	blne DoNMI
+	tst r0,#0xff
+	movne r0,r0,lsr #8
+	tstne r0,#Z80_IF1
+	blne DoInterrupt
 .endif
 
-	ldrb r0,[z80pc],#1    ;@ get first op code
 	ldr opcodes,MAIN_opcodes_POINTER2
-	ldr pc,[opcodes,r0, lsl #2]  ;@ execute op code
 
-MAIN_opcodes_POINTER2: .word MAIN_opcodes
+	cmp z80_icount,#0     ;@ irq might have used all cycles
+	ldrplb r0,[z80pc],#1
+	ldrpl pc,[opcodes,r0, lsl #2]
 
 
 z80_execute_end:
 	;@ save registers in CPU context
 	stmia cpucontext,{z80pc-z80sp}			;@ save Z80 registers
-    mov r0,z80_icount
+	mov r0,z80_icount
 	ldmia sp!,{r4-r12,pc}					;@ restore registers from stack and return to C code
 
+MAIN_opcodes_POINTER2: .word MAIN_opcodes
 .if INTERRUPT_MODE
 Interrupt_local: .word Interrupt
 .endif
@@ -1414,6 +1400,8 @@ DoInterrupt:
 	ldmia cpucontext,{z80pc-z80sp}			;@ load Z80 registers
 	mov pc,lr ;@ return
 .else
+
+	;@ r0 == z80if
 	stmfd sp!,{lr}
 
 	tst r0,#4 ;@ check halt
@@ -1426,10 +1414,9 @@ DoInterrupt:
 	strb r0,[cpucontext,#z80if]
 
 	;@ now check int mode
-    tst r1,#1
-    bne DoInterrupt_mode1
-    tst r1,#2
-    bne DoInterrupt_mode2
+	cmp r1,#1
+	beq DoInterrupt_mode1
+	bgt DoInterrupt_mode2
 
 DoInterrupt_mode0:
 	;@ get 3 byte vector
@@ -1459,6 +1446,7 @@ DoInterrupt_mode0:
 	;@ rebase new pc
 	rebasepc
 
+	eatcycles 13
 	b DoInterrupt_end
 
 1:
@@ -1473,6 +1461,7 @@ DoInterrupt_mode0:
 	;@ rebase new pc
 	rebasepc
 
+	eatcycles 13
 	b DoInterrupt_end
 
 DoInterrupt_mode1:
@@ -1482,6 +1471,7 @@ DoInterrupt_mode1:
 	mov r0,#0x38
 	rebasepc
 
+	eatcycles 13
 	b DoInterrupt_end
 
 DoInterrupt_mode2:
@@ -1496,41 +1486,67 @@ DoInterrupt_mode2:
 	orr r0,r0,r1,lsr#16
 
 	;@ read new pc from vector address
-.if DRZ80_FOR_PICODRIVE
-    bl pico_z80_read16
-    bic r0,r0,#0xfe000
-    ldr r1,[cpucontext,#z80pc_base]
-    add z80pc,r1,r0
 .if UPDATE_CONTEXT
      str z80pc,[cpucontext,#z80pc_pointer]
 .endif
+.if DRZ80_XMAP
+    bl z80_xmap_read16
+    rebasepc
 .else
 	stmfd sp!,{r3,r12}
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_read16]
 
 	;@ rebase new pc
-.if UPDATE_CONTEXT
-     str z80pc,[cpucontext,#z80pc_pointer]
-.endif
 	mov lr,pc
 	ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0
 	ldmfd sp!,{r3,r12}
 	mov z80pc,r0	
 .endif
+	eatcycles 17
 
 DoInterrupt_end:
 	;@ interupt accepted so callback irq interface
 	ldr r0,[cpucontext, #z80irqcallback]
 	tst r0,r0
+	streqb r0,[cpucontext,#z80irq]       ;@ default handling
 	ldmeqfd sp!,{pc}
 	stmfd sp!,{r3,r12}
 	mov lr,pc
 	mov pc,r0    ;@ call callback function
 	ldmfd sp!,{r3,r12}
 	ldmfd sp!,{pc} ;@ return
+.endif
+
+DoNMI:
+	stmfd sp!,{lr}
+
+	bic r0,r0,#((Z80_NMI|Z80_HALT|Z80_IF1)<<8)
+	strh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits
 
+	;@ push pc on stack
+	ldr r0,[cpucontext,#z80pc_base]
+	sub r2,z80pc,r0
+	opPUSHareg r2
+
+	;@ read new pc from vector address
+.if UPDATE_CONTEXT
+	str z80pc,[cpucontext,#z80pc_pointer]
 .endif
+	mov r0,#0x66
+.if DRZ80_XMAP
+	rebasepc
+.else
+	stmfd sp!,{r3,r12}
+	mov lr,pc
+	ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0
+	ldmfd sp!,{r3,r12}
+	mov z80pc,r0	
+.endif
+	ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits
+	eatcycles 11
+	ldmfd sp!,{pc}
+
 
 .data
 .align 4
@@ -4278,10 +4294,12 @@ opcode_0_7:
 	fetch 4
 ;@EX AF,AF'
 opcode_0_8:
-	add r1,cpucontext,#z80a2
-	swp z80a,z80a,[r1]
-	add r1,cpucontext,#z80f2
-	swp z80f,z80f,[r1]
+	ldr r0,[cpucontext,#z80a2]
+	ldr r1,[cpucontext,#z80f2]
+	str z80a,[cpucontext,#z80a2]
+	str z80f,[cpucontext,#z80f2]
+	mov z80a,r0
+	mov z80f,r1
 	fetch 4
 ;@ADD HL,BC
 opcode_0_9:
@@ -4524,7 +4542,6 @@ opcode_3_1:
 .if FAST_Z80SP
 	orr r0,r0,r1, lsl #8
 	rebasesp
-	mov z80sp,r0
 .else
 	orr z80sp,r0,r1, lsl #8
 .endif
@@ -5194,7 +5211,7 @@ opcode_C_8:
 	fetch 5
 
 opcode_C_9_cond:
-	sub z80_icount,#1
+	eatcycles 1
 ;@RET
 opcode_C_9:
     opPOP
@@ -5321,12 +5338,15 @@ opcode_D_8:
 	fetch 5
 ;@EXX
 opcode_D_9:
-	add r1,cpucontext,#z80bc2
-	swp z80bc,z80bc,[r1]
-	add r1,cpucontext,#z80de2
-	swp z80de,z80de,[r1]
-	add r1,cpucontext,#z80hl2
-	swp z80hl,z80hl,[r1]
+	ldr r0,[cpucontext,#z80bc2]
+	ldr r1,[cpucontext,#z80de2]
+	ldr r2,[cpucontext,#z80hl2]
+	str z80bc,[cpucontext,#z80bc2]
+	str z80de,[cpucontext,#z80de2]
+	str z80hl,[cpucontext,#z80hl2]
+	mov z80bc,r0
+	mov z80de,r1
+	mov z80hl,r2
 	fetch 4
 ;@JP C,$+3
 opcode_D_A:
@@ -5599,7 +5619,6 @@ opcode_F_9:
 .if FAST_Z80SP
 	mov r0,z80hl, lsr #16
 	rebasesp
-	mov z80sp,r0
 .else
 	mov z80sp,z80hl, lsr #16
 .endif
@@ -5615,13 +5634,12 @@ EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes
 ;@EI
 opcode_F_B:
 	ldrb r1,[cpucontext,#z80if]
-	tst r1,#Z80_IF1
-	bne ei_return_exit
-
+	mov r2,opcodes
 	orr r1,r1,#(Z80_IF1)|(Z80_IF2)
 	strb r1,[cpucontext,#z80if]
 
-	mov r2,opcodes
+	ldrb r0,[z80pc],#1
+	eatcycles 4
 	ldr opcodes,EI_DUMMY_opcodes_POINTER
 	ldr pc,[r2,r0, lsl #2]
 
@@ -5629,16 +5647,17 @@ ei_return:
 	;@point that program returns from EI to check interupts
 	;@an interupt can not be taken directly after a EI opcode
 	;@ reset z80pc and opcode pointer
-	ldrh r0,[cpucontext,#z80irq] @ 0x4C
+	ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits
 	sub z80pc,z80pc,#1
 	ldr opcodes,MAIN_opcodes_POINTER
 	;@ check ints
-	tst r0,#1
-	movnes r0,r0,lsr #8
-    blne DoInterrupt
+	tst r0,#0xff
+	movne r0,r0,lsr #8
+	tstne r0,#Z80_IF1
+	blne DoInterrupt
+
 	;@ continue
-ei_return_exit:
-	fetch 4
+	fetch 0
 
 ;@CALL M,NN
 opcode_F_C:
@@ -6745,7 +6764,8 @@ opcode_DD_2E:
 opcode_DD_34:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	stmfd sp!,{r0}	;@ save addr
 	readmem8
 	opINC8b
@@ -6756,7 +6776,8 @@ opcode_DD_34:
 opcode_DD_35:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	stmfd sp!,{r0}	;@ save addr
 	readmem8
 	opDEC8b
@@ -6768,7 +6789,8 @@ opcode_DD_36:
 	ldrsb r2,[z80pc],#1
 	ldrb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r2,r1, lsr #16
+	add r1,r1,r2, lsl #16
+	mov r1,r1,lsr #16
 	writemem8
 	fetch 19
 ;@ADD IX,SP
@@ -6799,7 +6821,8 @@ opcode_DD_45:
 opcode_DD_46:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	and z80bc,z80bc,#0xFF<<16
 	orr z80bc,z80bc,r0, lsl #24
@@ -6820,7 +6843,8 @@ opcode_DD_4D:
 opcode_DD_4E:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	and z80bc,z80bc,#0xFF<<24
 	orr z80bc,z80bc,r0, lsl #16
@@ -6842,7 +6866,8 @@ opcode_DD_55:
 opcode_DD_56:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	and z80de,z80de,#0xFF<<16
 	orr z80de,z80de,r0, lsl #24
@@ -6863,7 +6888,8 @@ opcode_DD_5D:
 opcode_DD_5E:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	and z80de,z80de,#0xFF<<24
 	orr z80de,z80de,r0, lsl #16
@@ -6900,7 +6926,8 @@ opcode_DD_65:
 opcode_DD_66:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	and z80hl,z80hl,#0xFF<<16
 	orr z80hl,z80hl,r0, lsl #24
@@ -6942,7 +6969,8 @@ opcode_DD_6D:
 opcode_DD_6E:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	and z80hl,z80hl,#0xFF<<24
 	orr z80hl,z80hl,r0, lsl #16
@@ -6957,7 +6985,8 @@ opcode_DD_6F:
 opcode_DD_70:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80bc, lsr #24
 	writemem8
 	fetch 19
@@ -6965,7 +6994,8 @@ opcode_DD_70:
 opcode_DD_71:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80bc, lsr #16
 	and r0,r0,#0xFF
 	writemem8
@@ -6974,7 +7004,8 @@ opcode_DD_71:
 opcode_DD_72:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80de, lsr #24
 	writemem8
 	fetch 19
@@ -6982,7 +7013,8 @@ opcode_DD_72:
 opcode_DD_73:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80de, lsr #16
 	and r0,r0,#0xFF
 	writemem8
@@ -6991,7 +7023,8 @@ opcode_DD_73:
 opcode_DD_74:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80hl, lsr #24
 	writemem8
 	fetch 19
@@ -6999,7 +7032,8 @@ opcode_DD_74:
 opcode_DD_75:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80hl, lsr #16
 	and r0,r0,#0xFF
 	writemem8
@@ -7008,7 +7042,8 @@ opcode_DD_75:
 opcode_DD_77:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r1,r0,r1, lsr #16
+	add r1,r1,r0, lsl #16
+	mov r1,r1,lsr #16
 	mov r0,z80a, lsr #24
 	writemem8
 	fetch 19
@@ -7027,7 +7062,8 @@ opcode_DD_7D:
 opcode_DD_7E:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	mov z80a,r0, lsl #24
 	fetch 19
@@ -7046,7 +7082,8 @@ opcode_DD_85:
 opcode_DD_86:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opADDb
 	fetch 19
@@ -7065,7 +7102,8 @@ opcode_DD_8D:
 opcode_DD_8E:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opADCb
 	fetch 19
@@ -7084,7 +7122,8 @@ opcode_DD_95:
 opcode_DD_96:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opSUBb
 	fetch 19
@@ -7103,7 +7142,8 @@ opcode_DD_9D:
 opcode_DD_9E:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opSBCb
 	fetch 19
@@ -7122,7 +7162,8 @@ opcode_DD_A5:
 opcode_DD_A6:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opANDb
 	fetch 19
@@ -7141,7 +7182,8 @@ opcode_DD_AD:
 opcode_DD_AE:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opXORb
 	fetch 19
@@ -7160,7 +7202,8 @@ opcode_DD_B5:
 opcode_DD_B6:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opORb
 	fetch 19
@@ -7179,7 +7222,8 @@ opcode_DD_BD:
 opcode_DD_BE:
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 	readmem8
 	opCPb
 	fetch 19
@@ -7191,7 +7235,8 @@ opcode_DD_CB:
 ;@moves the PC to the location of the subroutine
 	ldrsb r0,[z80pc],#1
 	ldr r1,[z80xx]
-	add r0,r0,r1, lsr #16
+	add r0,r1,r0, lsl #16
+	mov r0,r0,lsr #16
 
 	ldrb r1,[z80pc],#1
 	ldr pc,[pc,r1, lsl #2]
@@ -7439,7 +7484,6 @@ opcode_DD_F9:
 .if FAST_Z80SP
 	ldrh r0,[z80xx,#2]
 	rebasesp
-	mov z80sp,r0
 .else
 	ldrh z80sp,[z80xx,#2]
 .endif
@@ -7777,8 +7821,9 @@ opcode_ED_7B:
 	readmem16
 .if FAST_Z80SP
 	rebasesp
-.endif
+.else
 	mov z80sp,r0
+.endif
 	fetch 20
 ;@LDI
 opcode_ED_A0:
@@ -8048,5 +8093,5 @@ opcode_ED_BB:
 ;@end_loop:
 ;@     b end_loop
 
-
+;@ vim:filetype=armasm