X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2Fcz80%2Fcz80.c;h=28d762ce559d4596c7b870b3387fadddfa7420a8;hb=4835077e00c2cf7e3dba7bf7801c6aafd9d00dbe;hp=18fd620eda7c6a53c17f5edfae642fc26b9f9d2a;hpb=170435846c8e2309dc4011f954287f9ea861a6b6;p=picodrive.git diff --git a/cpu/cz80/cz80.c b/cpu/cz80/cz80.c index 18fd620..28d762c 100644 --- a/cpu/cz80/cz80.c +++ b/cpu/cz80/cz80.c @@ -14,8 +14,7 @@ #include "cz80.h" #if PICODRIVE_HACKS -#undef EMU_M68K -#include +#include #endif #ifndef ALIGN_DATA @@ -107,7 +106,7 @@ void Cz80_Init(cz80_struc *CPU) for (i = 0; i < CZ80_FETCH_BANK; i++) { - CPU->Fetch[i] = (UINT32)cz80_bad_address; + CPU->Fetch[i] = (FPTR)cz80_bad_address; #if CZ80_ENCRYPTED_ROM CPU->OPFetch[i] = 0; #endif @@ -211,15 +210,18 @@ void Cz80_Init(cz80_struc *CPU) void Cz80_Reset(cz80_struc *CPU) { - memset(CPU, 0, (INT32)&CPU->BasePC - (INT32)CPU); + memset(CPU, 0, (FPTR)&CPU->BasePC - (FPTR)CPU); Cz80_Set_Reg(CPU, CZ80_PC, 0); } /* */ #if PICODRIVE_HACKS -static inline unsigned char picodrive_read(unsigned short a) +static INLINE unsigned char picodrive_read(unsigned short a) { - return (a < 0x4000) ? Pico.zram[a&0x1fff] : z80_read(a); + uptr v = z80_read_map[a >> Z80_MEM_SHIFT]; + if (map_flag_set(v)) + return ((z80_read_f *)(v << 1))(a); + return *(unsigned char *)((v << 1) + a); } #endif @@ -233,15 +235,16 @@ INT32 Cz80_Exec(cz80_struc *CPU, INT32 cycles) #include "cz80jmp.c" #endif - UINT32 PC; + FPTR PC; #if CZ80_ENCRYPTED_ROM - INT32 OPBase; + FPTR OPBase; #endif UINT32 Opcode; UINT32 adr = 0; UINT32 res; UINT32 val; int afterEI = 0; + union16 *data; PC = CPU->PC; #if CZ80_ENCRYPTED_ROM @@ -255,7 +258,8 @@ INT32 Cz80_Exec(cz80_struc *CPU, INT32 cycles) Cz80_Exec: if (CPU->ICount > 0) { - union16 *data = pzHL; +Cz80_Exec_nocheck: + data = pzHL; Opcode = READ_OP(); #if CZ80_EMULATE_R_EXACTLY zR++; @@ -312,9 +316,9 @@ void Cz80_Set_IRQ(cz80_struc *CPU, INT32 line, INT32 state) if (state != CLEAR_LINE) { - UINT32 PC = CPU->PC; + FPTR PC = CPU->PC; #if CZ80_ENCRYPTED_ROM - INT32 OPBase = CPU->OPBase; + FPTR OPBase = CPU->OPBase; #endif CPU->IRQLine = line; @@ -390,8 +394,8 @@ void Cz80_Set_Reg(cz80_struc *CPU, INT32 regnum, UINT32 val) case CZ80_R: zR = val; break; case CZ80_I: zI = val; break; case CZ80_IM: zIM = val; break; - case CZ80_IFF1: zIFF1 = val; break; - case CZ80_IFF2: zIFF2 = val; break; + case CZ80_IFF1: zIFF1 = val ? (1 << 2) : 0; break; + case CZ80_IFF2: zIFF2 = val ? (1 << 2) : 0; break; case CZ80_HALT: CPU->HaltState = val; break; case CZ80_IRQ: CPU->IRQState = val; break; default: break; @@ -403,7 +407,7 @@ void Cz80_Set_Reg(cz80_struc *CPU, INT32 regnum, UINT32 val) ƒtƒFƒbƒ`ƒAƒhƒŒƒXÝ’è --------------------------------------------------------*/ -void Cz80_Set_Fetch(cz80_struc *CPU, UINT32 low_adr, UINT32 high_adr, UINT32 fetch_adr) +void Cz80_Set_Fetch(cz80_struc *CPU, UINT32 low_adr, UINT32 high_adr, FPTR fetch_adr) { int i, j;