X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2Fdrc%2Femit_x86.c;h=7f314f0b631334bb9e066258e3a43ef365675907;hb=8796b7ee88b83c54bd09c0087e023dfac5df3e08;hp=5a36faf934580388215511272d8096b8f21c6588;hpb=ed8cf79be872855234b457ed987d15a2ae1a0ba2;p=picodrive.git diff --git a/cpu/drc/emit_x86.c b/cpu/drc/emit_x86.c index 5a36faf9..7f314f0b 100644 --- a/cpu/drc/emit_x86.c +++ b/cpu/drc/emit_x86.c @@ -1,5 +1,5 @@ /* - * note about silly things like emith_eor_r_r_r_lsl: + * note about silly things like emith_eor_r_r_r: * these are here because the compiler was designed * for ARM as it's primary target. */ @@ -9,6 +9,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; #define CONTEXT_REG xBP +#define IOP_JMP 0xeb #define IOP_JO 0x70 #define IOP_JNO 0x71 #define IOP_JB 0x72 @@ -56,6 +57,9 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; #define EMIT_MODRM(mod,r,rm) \ EMIT(((mod)<<6) | ((r)<<3) | (rm), u8) +#define EMIT_SIB(scale,index,base) \ + EMIT(((scale)<<6) | ((index)<<3) | (base), u8) + #define EMIT_OP_MODRM(op,mod,r,rm) { \ EMIT_OP(op); \ EMIT_MODRM(mod, r, rm); \ @@ -107,25 +111,52 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; emith_pop(d); \ } +#define emith_mvn_r_r(d, s) { \ + if (d != s) \ + emith_move_r_r(d, s); \ + EMIT_OP_MODRM(0xf7, 3, 2, d); /* NOT d */ \ +} + +#define emith_negc_r_r(d, s) { \ + int tmp_ = rcache_get_tmp(); \ + emith_move_r_imm(tmp_, 0); \ + emith_sbc_r_r(tmp_, s); \ + emith_move_r_r(d, tmp_); \ + rcache_free_tmp(tmp_); \ +} + +#define emith_neg_r_r(d, s) { \ + if (d != s) \ + emith_move_r_r(d, s); \ + EMIT_OP_MODRM(0xf7, 3, 3, d); /* NEG d */ \ +} + // _r_r_r #define emith_eor_r_r_r(d, s1, s2) { \ - if (d != s1) \ + if (d == s1) { \ + emith_eor_r_r(d, s2); \ + } else if (d == s2) { \ + emith_eor_r_r(d, s1); \ + } else { \ emith_move_r_r(d, s1); \ - emith_eor_r_r(d, s2); \ + emith_eor_r_r(d, s2); \ + } \ } -#define emith_or_r_r_r_lsl(d, s1, s2, lslimm) { \ - if (d != s2 && d != s1) { \ - emith_lsl(d, s2, lslimm); \ - emith_or_r_r(d, s1); \ - } else { \ - if (d != s1) \ - emith_move_r_r(d, s1); \ - emith_push(s2); \ - emith_lsl(s2, s2, lslimm); \ - emith_or_r_r(d, s2); \ - emith_pop(s2); \ - } \ +// _r_r_shift +#define emith_or_r_r_lsl(d, s, lslimm) { \ + int tmp_ = rcache_get_tmp(); \ + emith_lsl(tmp_, s, lslimm); \ + emith_or_r_r(d, tmp_); \ + rcache_free_tmp(tmp_); \ +} + +// d != s +#define emith_eor_r_r_lsr(d, s, lsrimm) { \ + emith_push(s); \ + emith_lsr(s, s, lsrimm); \ + emith_eor_r_r(d, s); \ + emith_pop(s); \ } // _r_imm @@ -134,12 +165,15 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; EMIT(imm, u32); \ } +#define emith_move_r_imm_s8(r, imm) \ + emith_move_r_imm(r, (u32)(signed int)(signed char)(imm)) + #define emith_arith_r_imm(op, r, imm) { \ EMIT_OP_MODRM(0x81, 3, op, r); \ EMIT(imm, u32); \ } -// 2 - adc, 3 - sbb, 6 - xor +// 2 - adc, 3 - sbb #define emith_add_r_imm(r, imm) \ emith_arith_r_imm(0, r, imm) @@ -152,6 +186,9 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; #define emith_sub_r_imm(r, imm) \ emith_arith_r_imm(5, r, imm) +#define emith_eor_r_imm(r, imm) \ + emith_arith_r_imm(6, r, imm) + #define emith_cmp_r_imm(r, imm) \ emith_arith_r_imm(7, r, imm) @@ -165,6 +202,11 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; emith_arith_r_imm(4, r, ~(imm)) // fake conditionals (using SJMP instead) +#define emith_move_r_imm_c(cond, r, imm) { \ + (void)(cond); \ + emith_move_r_imm(r, imm); \ +} + #define emith_add_r_imm_c(cond, r, imm) { \ (void)(cond); \ emith_add_r_imm(r, imm); \ @@ -175,6 +217,11 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; emith_or_r_imm(r, imm); \ } +#define emith_eor_r_imm_c(cond, r, imm) { \ + (void)(cond); \ + emith_eor_r_imm(r, imm); \ +} + #define emith_sub_r_imm_c(cond, r, imm) { \ (void)(cond); \ emith_sub_r_imm(r, imm); \ @@ -185,6 +232,13 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; emith_bic_r_imm(r, imm); \ } +// _r_r_imm +#define emith_and_r_r_imm(d, s, imm) { \ + if (d != s) \ + emith_move_r_r(d, s); \ + emith_and_r_imm(d, imm) \ +} + // shift #define emith_shift(op, d, s, cnt) { \ if (d != s) \ @@ -232,11 +286,22 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; emith_and_r_imm(d, t); \ } +#define emith_clear_msb_c(cond, d, s, count) { \ + (void)(cond); \ + emith_clear_msb(d, s, count); \ +} + #define emith_sext(d, s, bits) { \ emith_lsl(d, s, 32 - (bits)); \ emith_asr(d, d, 32 - (bits)); \ } +#define emith_setc(r) { \ + EMIT_OP(0x0f); \ + EMIT(0x92, u8); \ + EMIT_MODRM(3, 0, r); /* SETC r */ \ +} + // put bit0 of r0 to carry #define emith_set_carry(r0) { \ emith_tst_r_imm(r0, 1); /* clears C */ \ @@ -286,12 +351,27 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; #define emith_mul(d, s1, s2) \ emith_mul_(4, d, -1, s1, s2) +// (dlo,dhi) += signed(s1) * signed(s2) +#define emith_mula_s64(dlo, dhi, s1, s2) { \ + emith_push(dhi); \ + emith_push(dlo); \ + emith_mul_(5, dlo, dhi, s1, s2); \ + EMIT_OP_MODRM(0x03, 0, dlo, 4); \ + EMIT_SIB(0, 4, 4); /* add dlo, [esp] */ \ + EMIT_OP_MODRM(0x13, 1, dhi, 4); \ + EMIT_SIB(0, 4, 4); \ + EMIT(4, u8); /* adc dhi, [esp+4] */ \ + emith_add_r_imm(xSP, 4*2); \ +} + // "flag" instructions are the same #define emith_subf_r_imm emith_sub_r_imm #define emith_addf_r_r emith_add_r_r #define emith_subf_r_r emith_sub_r_r #define emith_adcf_r_r emith_adc_r_r #define emith_sbcf_r_r emith_sbc_r_r +#define emith_eorf_r_r emith_eor_r_r +#define emith_negcf_r_r emith_negc_r_r #define emith_lslf emith_lsl #define emith_lsrf emith_lsr @@ -302,15 +382,27 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; #define emith_rorcf emith_rorc // XXX: offs is 8bit only -#define emith_ctx_read(r, offs) { \ +#define emith_ctx_read(r, offs) do { \ EMIT_OP_MODRM(0x8b, 1, r, xBP); \ EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \ -} +} while (0) + +#define emith_ctx_read_multiple(r, offs, cnt, tmpr) do { \ + int r_ = r, offs_ = offs, cnt_ = cnt; \ + for (; cnt > 0; r_++, offs_ += 4, cnt_--) \ + emith_ctx_read(r_, offs_); \ +} while (0) -#define emith_ctx_write(r, offs) { \ +#define emith_ctx_write(r, offs) do { \ EMIT_OP_MODRM(0x89, 1, r, xBP); \ EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \ -} +} while (0) + +#define emith_ctx_write_multiple(r, offs, cnt, tmpr) do { \ + int r_ = r, offs_ = offs, cnt_ = cnt; \ + for (; cnt > 0; r_++, offs_ += 4, cnt_--) \ + emith_ctx_write(r_, offs_); \ +} while (0) #define emith_jump(ptr) { \ u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \ @@ -324,15 +416,24 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; EMIT(disp, u32); \ } -// "simple" or "short" jump -#define EMITH_SJMP_START(cond) { \ +#define emith_call_cond(cond, ptr) \ + emith_call(ptr) + +#define emith_jump_reg(r) \ + EMIT_OP_MODRM(0xff, 3, 4, r) + +#define EMITH_JMP_START(cond) { \ u8 *cond_ptr; \ JMP8_POS(cond_ptr) -#define EMITH_SJMP_END(cond) \ +#define EMITH_JMP_END(cond) \ JMP8_EMIT(cond, cond_ptr); \ } +// "simple" jump (no more then a few insns) +#define EMITH_SJMP_START EMITH_JMP_START +#define EMITH_SJMP_END EMITH_JMP_END + #define host_arg2reg(rd, arg) \ switch (arg) { \ case 0: rd = xAX; break; \ @@ -353,6 +454,17 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; } /* SH2 drc specific */ +#define emith_sh2_drc_entry() { \ + emith_push(xBX); \ + emith_push(xBP); \ +} + +#define emith_sh2_drc_exit() { \ + emith_pop(xBP); \ + emith_pop(xBX); \ + EMIT_OP(0xc3); /* ret */\ +} + #define emith_sh2_test_t() { \ int t = rcache_get_reg(SHR_SR, RC_GR_READ); \ EMIT_OP_MODRM(0xf6, 3, 0, t); \ @@ -363,18 +475,18 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; u8 *jmp0; /* negative cycles check */ \ u8 *jmp1; /* unsinged overflow check */ \ int cr, rn; \ - tmp = rcache_get_tmp(); \ + int tmp_ = rcache_get_tmp(); \ cr = rcache_get_reg(SHR_SR, RC_GR_RMW); \ rn = rcache_get_reg((op >> 8) & 0x0f, RC_GR_RMW);\ emith_sub_r_imm(rn, 1); \ emith_sub_r_imm(cr, (cycles+1) << 12); \ cycles = 0; \ - emith_asr(tmp, cr, 2+12); \ + emith_asr(tmp_, cr, 2+12); \ JMP8_POS(jmp0); /* no negative cycles */ \ - emith_move_r_imm(tmp, 0); \ + emith_move_r_imm(tmp_, 0); \ JMP8_EMIT(IOP_JNS, jmp0); \ emith_and_r_imm(cr, 0xffe); \ - emith_subf_r_r(rn, tmp); \ + emith_subf_r_r(rn, tmp_); \ JMP8_POS(jmp1); /* no overflow */ \ emith_neg_r(rn); /* count left */ \ emith_lsl(rn, rn, 2+12); \ @@ -382,25 +494,45 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; emith_or_r_imm(cr, 1); \ emith_move_r_imm(rn, 0); \ JMP8_EMIT(IOP_JA, jmp1); \ - rcache_free_tmp(tmp); \ + rcache_free_tmp(tmp_); \ } #define emith_write_sr(srcr) { \ - int tmp = rcache_get_tmp(); \ + int tmp_ = rcache_get_tmp(); \ int srr = rcache_get_reg(SHR_SR, RC_GR_RMW); \ - emith_clear_msb(tmp, srcr, 20); \ + emith_clear_msb(tmp_, srcr, 20); \ emith_bic_r_imm(srr, 0xfff); \ - emith_or_r_r(srr, tmp); \ - rcache_free_tmp(tmp); \ + emith_or_r_r(srr, tmp_); \ + rcache_free_tmp(tmp_); \ } #define emith_carry_to_t(srr, is_sub) { \ - int tmp = rcache_get_tmp(); \ - EMIT_OP(0x0f); \ - EMIT(0x92, u8); \ - EMIT_MODRM(3, 0, tmp); /* SETC */ \ + int tmp_ = rcache_get_tmp(); \ + emith_setc(tmp_); \ emith_bic_r_imm(srr, 1); \ - EMIT_OP_MODRM(0x08, 3, tmp, srr); /* OR srrl, tmpl */ \ - rcache_free_tmp(tmp); \ + EMIT_OP_MODRM(0x08, 3, tmp_, srr); /* OR srrl, tmpl */ \ + rcache_free_tmp(tmp_); \ +} + +/* + * if Q + * t = carry(Rn += Rm) + * else + * t = carry(Rn -= Rm) + * T ^= t + */ +#define emith_sh2_div1_step(rn, rm, sr) { \ + u8 *jmp0, *jmp1; \ + int tmp_ = rcache_get_tmp(); \ + emith_tst_r_imm(sr, Q); /* if (Q ^ M) */ \ + JMP8_POS(jmp0); /* je do_sub */ \ + emith_add_r_r(rn, rm); \ + JMP8_POS(jmp1); /* jmp done */ \ + JMP8_EMIT(IOP_JE, jmp0); /* do_sub: */ \ + emith_sub_r_r(rn, rm); \ + JMP8_EMIT(IOP_JMP, jmp1);/* done: */ \ + emith_setc(tmp_); \ + EMIT_OP_MODRM(0x30, 3, tmp_, sr); /* T = Q1 ^ Q2 (byte) */ \ + rcache_free_tmp(tmp_); \ }