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diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c
index 392af29..10d4c01 100644
--- a/cpu/sh2/compiler.c
+++ b/cpu/sh2/compiler.c
@@ -166,9 +166,9 @@ static const int reg_map_g2h[] = {
    4,  5,  6,  7,
    8, -1, -1, -1,
   -1, -1, -1, -1,
-  -1, -1, -1,  9,
-  -1, -1, -1, 10,
-  -1, -1, -1, -1,
+  -1, -1, -1,  9, // r12 .. sp
+  -1, -1, -1, 10, // SHR_PC,  SHR_PPC, SHR_PR,   SHR_SR,
+  -1, -1, -1, -1, // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
 };
 
 static temp_reg_t reg_temp[] = {
@@ -2978,16 +2978,15 @@ void sh2_drc_wcheck_da(unsigned int a, int val, int cpuid)
     1 + cpuid, SH2_DRCBLK_DA_SHIFT, 0xfff);
 }
 
-void sh2_execute(SH2 *sh2c, int cycles)
+int sh2_execute(SH2 *sh2c, int cycles)
 {
   int ret_cycles;
   sh2 = sh2c; // XXX
 
-  sh2c->cycles_aim += cycles;
-  cycles = sh2c->cycles_aim - sh2c->cycles_done;
+  sh2c->cycles_timeslice = cycles;
 
   // cycles are kept in SHR_SR unused bits (upper 20)
-  // bit19 contains T saved for delay slot
+  // bit11 contains T saved for delay slot
   // others are usual SH2 flags
   sh2c->sr &= 0x3f3;
   sh2c->sr |= cycles << 12;
@@ -2998,7 +2997,7 @@ void sh2_execute(SH2 *sh2c, int cycles)
   if (ret_cycles > 0)
     dbg(1, "warning: drc returned with cycles: %d", ret_cycles);
 
-  sh2c->cycles_done += cycles - ret_cycles;
+  return sh2c->cycles_timeslice - ret_cycles;
 }
 
 #if (DRC_DEBUG & 2)