X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2Fsh2%2Fsh2.h;h=1394f94a98e16d3c03bab700295b2827c20f1e5c;hb=9db6a54485501b56b0f2f5db4d093c38fe495bda;hp=a3d631d622b4f38e51b5179d780e2ce69d7de264;hpb=ed4402a7dfd12dbbf34c547b438a671ae8114197;p=picodrive.git diff --git a/cpu/sh2/sh2.h b/cpu/sh2/sh2.h index a3d631d..1394f94 100644 --- a/cpu/sh2/sh2.h +++ b/cpu/sh2/sh2.h @@ -39,6 +39,15 @@ typedef struct SH2_ void *p_rom; unsigned int pdb_io_csum[2]; +#define SH2_STATE_RUN (1 << 0) // to prevent recursion +#define SH2_STATE_SLEEP (1 << 1) +#define SH2_STATE_CPOLL (1 << 2) // polling comm regs +#define SH2_STATE_VPOLL (1 << 3) // polling VDP + unsigned int state; + unsigned int poll_addr; + int poll_cycles; + int poll_cnt; + // interpreter stuff int icount; // cycles left in current timeslice unsigned int ea; @@ -54,10 +63,15 @@ typedef struct SH2_ unsigned int cycles_timeslice; + struct SH2_ *other_sh2; + // we use 68k reference cycles for easier sync unsigned int m68krcycles_done; unsigned int mult_m68k_to_sh2; unsigned int mult_sh2_to_m68k; + + unsigned char data_array[0x1000]; // cache (can be used as RAM) + unsigned int peri_regs[0x200/4]; // periphereal regs } SH2; #define CYCLE_MULT_SHIFT 10 @@ -66,18 +80,32 @@ typedef struct SH2_ #define C_SH2_TO_M68K(xsh2, c) \ ((int)((c + 3) * (xsh2).mult_sh2_to_m68k) >> CYCLE_MULT_SHIFT) -extern SH2 *sh2; // active sh2. XXX: consider removing - -int sh2_init(SH2 *sh2, int is_slave); +int sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2); void sh2_finish(SH2 *sh2); void sh2_reset(SH2 *sh2); -void sh2_irl_irq(SH2 *sh2, int level, int nested_call); +int sh2_irl_irq(SH2 *sh2, int level, int nested_call); void sh2_internal_irq(SH2 *sh2, int level, int vector); void sh2_do_irq(SH2 *sh2, int level, int vector); void sh2_pack(const SH2 *sh2, unsigned char *buff); void sh2_unpack(SH2 *sh2, const unsigned char *buff); -int sh2_execute(SH2 *sh2, int cycles); +int sh2_execute_drc(SH2 *sh2c, int cycles); +int sh2_execute_interpreter(SH2 *sh2c, int cycles); + +static inline int sh2_execute(SH2 *sh2, int cycles, int use_drc) +{ + int ret; + + sh2->cycles_timeslice = cycles; +#ifdef DRC_SH2 + if (use_drc) + ret = sh2_execute_drc(sh2, cycles); + else +#endif + ret = sh2_execute_interpreter(sh2, cycles); + + return sh2->cycles_timeslice - ret; +} // regs, pending_int*, cycles, reserved #define SH2_STATE_SIZE ((24 + 2 + 2 + 12) * 4) @@ -87,8 +115,14 @@ int sh2_execute(SH2 *sh2, int cycles); unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2); unsigned int REGPARM(2) p32x_sh2_read16(unsigned int a, SH2 *sh2); unsigned int REGPARM(2) p32x_sh2_read32(unsigned int a, SH2 *sh2); -int REGPARM(3) p32x_sh2_write8 (unsigned int a, unsigned int d, SH2 *sh2); -int REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2); -int REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2); +void REGPARM(3) p32x_sh2_write8 (unsigned int a, unsigned int d, SH2 *sh2); +void REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2); +void REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2); + +// debug +#ifdef DRC_CMP +void do_sh2_trace(SH2 *current, int cycles); +void do_sh2_cmp(SH2 *current); +#endif #endif /* __SH2_H__ */