X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=cpu%2Fsh2%2Fsh2.h;h=e945354d3fd0340d7c26d4590750617dc37a410e;hb=e9a11abb3c8237286fd7b6c4b5048d9eec9b1a1b;hp=42de6305ccbdacb591ae54e5a9f92844ffcbe339;hpb=19886062f1a36f70b1f01d58f3fa1b79162defac;p=picodrive.git

diff --git a/cpu/sh2/sh2.h b/cpu/sh2/sh2.h
index 42de630..e945354 100644
--- a/cpu/sh2/sh2.h
+++ b/cpu/sh2/sh2.h
@@ -1,11 +1,7 @@
 #ifndef __SH2_H__
 #define __SH2_H__
 
-#if !defined(REGPARM) && defined(__i386__) 
-#define REGPARM(x) __attribute__((regparm(x)))
-#else
-#define REGPARM(x)
-#endif
+#include "../../pico/pico_port.h"
 
 // registers - matches structure order
 typedef enum {
@@ -63,10 +59,15 @@ typedef struct SH2_
 
 	unsigned int	cycles_timeslice;
 
+	struct SH2_	*other_sh2;
+
 	// we use 68k reference cycles for easier sync
 	unsigned int	m68krcycles_done;
 	unsigned int	mult_m68k_to_sh2;
 	unsigned int	mult_sh2_to_m68k;
+
+	unsigned char	data_array[0x1000]; // cache (can be used as RAM)
+	unsigned int	peri_regs[0x200/4]; // periphereal regs
 } SH2;
 
 #define CYCLE_MULT_SHIFT 10
@@ -75,7 +76,7 @@ typedef struct SH2_
 #define C_SH2_TO_M68K(xsh2, c) \
 	((int)((c + 3) * (xsh2).mult_sh2_to_m68k) >> CYCLE_MULT_SHIFT)
 
-int  sh2_init(SH2 *sh2, int is_slave);
+int  sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2);
 void sh2_finish(SH2 *sh2);
 void sh2_reset(SH2 *sh2);
 int  sh2_irl_irq(SH2 *sh2, int level, int nested_call);
@@ -84,7 +85,23 @@ void sh2_do_irq(SH2 *sh2, int level, int vector);
 void sh2_pack(const SH2 *sh2, unsigned char *buff);
 void sh2_unpack(SH2 *sh2, const unsigned char *buff);
 
-int  sh2_execute(SH2 *sh2, int cycles);
+int  sh2_execute_drc(SH2 *sh2c, int cycles);
+int  sh2_execute_interpreter(SH2 *sh2c, int cycles);
+
+static __inline int sh2_execute(SH2 *sh2, int cycles, int use_drc)
+{
+  int ret;
+
+  sh2->cycles_timeslice = cycles;
+#ifdef DRC_SH2
+  if (use_drc)
+    ret = sh2_execute_drc(sh2, cycles);
+  else
+#endif
+    ret = sh2_execute_interpreter(sh2, cycles);
+
+  return sh2->cycles_timeslice - ret;
+}
 
 // regs, pending_int*, cycles, reserved
 #define SH2_STATE_SIZE ((24 + 2 + 2 + 12) * 4)
@@ -94,9 +111,9 @@ int  sh2_execute(SH2 *sh2, int cycles);
 unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2);
 unsigned int REGPARM(2) p32x_sh2_read16(unsigned int a, SH2 *sh2);
 unsigned int REGPARM(2) p32x_sh2_read32(unsigned int a, SH2 *sh2);
-int REGPARM(3) p32x_sh2_write8 (unsigned int a, unsigned int d, SH2 *sh2);
-int REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2);
-int REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) p32x_sh2_write8 (unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2);
 
 // debug
 #ifdef DRC_CMP