X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=gp2x%2Fsoc_pollux.c;h=9dae49037ab2581c3cece6e9b1627d22f7eda461;hb=902972d1c7f353aebb17a5ab587b2526e1a45d60;hp=922305a87e2320a0754d615ce59b5129aa383a01;hpb=f71361b521c9c64351ea99ed97627a606c642008;p=libpicofe.git

diff --git a/gp2x/soc_pollux.c b/gp2x/soc_pollux.c
index 922305a..9dae490 100644
--- a/gp2x/soc_pollux.c
+++ b/gp2x/soc_pollux.c
@@ -1,3 +1,11 @@
+/*
+ * <random_info=mem_map>
+ * 00000000-029fffff linux (42MB)
+ * 02a00000-02dfffff fb (4MB, 153600B really used)
+ * 02e00000-02ffffff sound dma (2MB)
+ * 03000000-03ffffff MPEGDEC (?, 16MB)
+ * </random_info>
+ */
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -13,11 +21,12 @@
 #include "soc.h"
 #include "plat_gp2x.h"
 #include "../common/emu.h"
+#include "../common/plat.h"
 #include "../common/arm_utils.h"
 #include "pollux_set.h"
 
 static volatile unsigned short *memregs;
-static volatile unsigned long  *memregl;
+static volatile unsigned int   *memregl;
 static int memdev = -1;
 static int battdev = -1;
 
@@ -233,10 +242,29 @@ static void timer_cleanup(void)
 	TIMER_REG(0x44) = 0;	/* dividers back to default */
 }
 
+/* note: both PLLs are programmed the same way,
+ * the databook incorrectly states that PLL1 differs */
+static int decode_pll(unsigned int reg)
+{
+	long long v;
+	int p, m, s;
+
+	p = (reg >> 18) & 0x3f;
+	m = (reg >> 8) & 0x3ff;
+	s = reg & 0xff;
+
+	if (p == 0)
+		p = 1;
+
+	v = 27000000; // master clock
+	v = v * m / (p << s);
+	return v;
+}
+
 void pollux_init(void)
 {
 	struct fb_fix_screeninfo fbfix;
-	int i, ret;
+	int i, ret, rate;
 
 	memdev = open("/dev/mem", O_RDWR);
 	if (memdev == -1) {
@@ -289,13 +317,32 @@ void pollux_init(void)
 	if (battdev < 0)
 		perror("Warning: could't open pollux_batt");
 
+	/* find what PLL1 runs at, for the timer */
+	rate = decode_pll(memregl[0xf008>>2]);
+	printf("PLL1 @ %dHz\n", rate);
+	rate /= 1000000;
+
 	/* setup timer */
-	if (TIMER_REG(0x08) & 8)
-		timer_cleanup();
+	if (1 <= rate && rate <= 256) {
+		if (TIMER_REG(0x08) & 8) {
+			fprintf(stderr, "warning: timer in use, overriding!\n");
+			timer_cleanup();
+		}
+
+		TIMER_REG(0x44) = ((rate - 1) << 4) | 2; /* using PLL1, divide by it's rate */
+		TIMER_REG(0x40) = 0x0c;  /* clocks on */
+		TIMER_REG(0x08) = 0x6b;  /* run timer, clear irq, latch value */
+
+		gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
+		gp2x_get_ticks_us = gp2x_get_ticks_us_;
+	}
+	else {
+		fprintf(stderr, "warning: could not make use of timer\n");
 
-	TIMER_REG(0x44) = 0x922; /* using PLL1, divider value 147 */
-	TIMER_REG(0x40) = 0x0c;  /* clocks on */
-	TIMER_REG(0x08) = 0x6b;  /* run timer, clear irq, latch value */
+		// those functions are actually not good at all on Wiz kernel
+		gp2x_get_ticks_ms = plat_get_ticks_ms_good;
+		gp2x_get_ticks_us = plat_get_ticks_us_good;
+	}
 
 	pllsetreg0 = memregl[0xf004>>2];
 	memtimex_old[0] = memregs[0x14802>>1];
@@ -308,7 +355,15 @@ void pollux_init(void)
 	gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
 	gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
 
-	gp2x_set_cpuclk = gp2x_set_cpuclk_;
+	/* some firmwares have sys clk on PLL0, we can't adjust CPU clock
+	 * by reprogramming the PLL0 then, as it overclocks system bus */
+	if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
+		gp2x_set_cpuclk = gp2x_set_cpuclk_;
+	else {
+		fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
+			memregl[0xf000>>2]);
+		gp2x_set_cpuclk = NULL;
+	}
 
 	set_lcd_custom_rate = set_lcd_custom_rate_;
 	unset_lcd_custom_rate = unset_lcd_custom_rate_;
@@ -317,9 +372,6 @@ void pollux_init(void)
 	set_ram_timings = set_ram_timings_;
 	unset_ram_timings = unset_ram_timings_;
 	gp2x_read_battery = gp2x_read_battery_;
-
-	gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
-	gp2x_get_ticks_us = gp2x_get_ticks_us_;
 }
 
 void pollux_finish(void)
@@ -335,6 +387,7 @@ void pollux_finish(void)
 		memregl[0xf004>>2] = pllsetreg0;
 		memregl[0xf07c>>2] |= 0x8000;
 	}
+	timer_cleanup();
 
 	munmap((void *)memregs, 0x20000);
 	close(memdev);