X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Flightrec%2Fplugin.c;h=0b8e618bd44ab46a90b9565065dd74e1e6f7e595;hb=7cbd2996964abf782dd4bdfe9b582fd7c8af36b2;hp=13c11e346cd4e67cc338b12f40f770f395fab169;hpb=ba3814c189d3bd2332b66fb6c633a7d028e618fe;p=pcsx_rearmed.git diff --git a/libpcsxcore/lightrec/plugin.c b/libpcsxcore/lightrec/plugin.c index 13c11e34..0b8e618b 100644 --- a/libpcsxcore/lightrec/plugin.c +++ b/libpcsxcore/lightrec/plugin.c @@ -1,9 +1,16 @@ -#include +#include #include #include #include #include +#include +#if P_HAVE_MMAP +#include +#endif + +#include "lightrec.h" +#include "internals.h" #include "../cdrom.h" #include "../gpu.h" #include "../gte.h" @@ -12,6 +19,9 @@ #include "../psxhw.h" #include "../psxmem.h" #include "../r3000a.h" +#include "../psxinterpreter.h" +#include "../psxhle.h" +#include "../psxevents.h" #include "../frontend/main.h" @@ -47,14 +57,17 @@ psxRegisters psxRegs; Rcnt rcnts[4]; +void* code_buffer; + static struct lightrec_state *lightrec_state; static char *name = "retroarch.exe"; static bool use_lightrec_interpreter; static bool use_pcsx_interpreter; -static bool booting; -static u32 lightrec_begin_cycles; +static bool block_stepping; + +extern u32 lightrec_hacks; enum my_cp2_opcodes { OP_CP2_RTPS = 0x01, @@ -126,60 +139,69 @@ static void cop2_op(struct lightrec_state *state, u32 func) static bool has_interrupt(void) { + struct lightrec_registers *regs = lightrec_get_registers(lightrec_state); + return ((psxHu32(0x1070) & psxHu32(0x1074)) && - (psxRegs.CP0.n.Status & 0x401) == 0x401) || - (psxRegs.CP0.n.Status & psxRegs.CP0.n.Cause & 0x0300); + (regs->cp0[12] & 0x401) == 0x401) || + (regs->cp0[12] & regs->cp0[13] & 0x0300); +} + +static void lightrec_tansition_to_pcsx(struct lightrec_state *state) +{ + psxRegs.cycle += lightrec_current_cycle_count(state) / 1024; + lightrec_reset_cycle_count(state, 0); } -static void lightrec_restore_state(struct lightrec_state *state) +static void lightrec_tansition_from_pcsx(struct lightrec_state *state) { - lightrec_reset_cycle_count(state, psxRegs.cycle); + s32 cycles_left = next_interupt - psxRegs.cycle; - if (booting || has_interrupt()) + if (block_stepping || cycles_left <= 0 || has_interrupt()) lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); - else - lightrec_set_target_cycle_count(state, next_interupt); + else { + lightrec_set_target_cycle_count(state, cycles_left * 1024); + } } static void hw_write_byte(struct lightrec_state *state, - u32 op, void *host, u32 mem, u8 val) + u32 op, void *host, u32 mem, u32 val) { - psxRegs.cycle = lightrec_current_cycle_count(state); + lightrec_tansition_to_pcsx(state); psxHwWrite8(mem, val); - lightrec_restore_state(state); + lightrec_tansition_from_pcsx(state); } static void hw_write_half(struct lightrec_state *state, - u32 op, void *host, u32 mem, u16 val) + u32 op, void *host, u32 mem, u32 val) { - psxRegs.cycle = lightrec_current_cycle_count(state); + lightrec_tansition_to_pcsx(state); psxHwWrite16(mem, val); - lightrec_restore_state(state); + lightrec_tansition_from_pcsx(state); } static void hw_write_word(struct lightrec_state *state, u32 op, void *host, u32 mem, u32 val) { - psxRegs.cycle = lightrec_current_cycle_count(state); + lightrec_tansition_to_pcsx(state); psxHwWrite32(mem, val); - lightrec_restore_state(state); + lightrec_tansition_from_pcsx(state); } static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem) { u8 val; - psxRegs.cycle = lightrec_current_cycle_count(state); + lightrec_tansition_to_pcsx(state); val = psxHwRead8(mem); - lightrec_restore_state(state); + lightrec_tansition_from_pcsx(state); return val; } @@ -189,11 +211,11 @@ static u16 hw_read_half(struct lightrec_state *state, { u16 val; - psxRegs.cycle = lightrec_current_cycle_count(state); + lightrec_tansition_to_pcsx(state); val = psxHwRead16(mem); - lightrec_restore_state(state); + lightrec_tansition_from_pcsx(state); return val; } @@ -203,11 +225,11 @@ static u32 hw_read_word(struct lightrec_state *state, { u32 val; - psxRegs.cycle = lightrec_current_cycle_count(state); + lightrec_tansition_to_pcsx(state); val = psxHwRead32(mem); - lightrec_restore_state(state); + lightrec_tansition_from_pcsx(state); return val; } @@ -264,7 +286,7 @@ static struct lightrec_mem_map lightrec_map[] = { [PSX_MAP_HW_REGISTERS] = { /* Hardware registers */ .pc = 0x1f801000, - .length = 0x2000, + .length = 0x8000, .ops = &hw_regs_ops, }, [PSX_MAP_CACHE_CONTROL] = { @@ -290,6 +312,15 @@ static struct lightrec_mem_map lightrec_map[] = { .length = 0x200000, .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM], }, + + /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */ + [PSX_MAP_PPORT_MIRROR] = { + .pc = 0x1fa00000, + .length = 0x10000, + .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT], + }, + + /* Code buffer */ [PSX_MAP_CODE_BUFFER] = { .length = CODE_BUFFER_SIZE, }, @@ -305,6 +336,14 @@ static void lightrec_enable_ram(struct lightrec_state *state, bool enable) static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size) { + if (is_write && size != 32) { + // force32 so must go through handlers + if (0x1f801000 <= kaddr && kaddr < 0x1f801024) + return false; + if ((kaddr & 0x1fffff80) == 0x1f801080) // dma + return false; + } + switch (size) { case 8: switch (kaddr) { @@ -343,7 +382,7 @@ static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size) case 0x1f801074: return !is_write; default: - return is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00; + return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00; } default: switch (kaddr) { @@ -379,10 +418,29 @@ static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size) } } +#if defined(HW_DOL) || defined(HW_RVL) +static void lightrec_code_inv(void *ptr, uint32_t len) +{ + extern void DCFlushRange(void *ptr, u32 len); + extern void ICInvalidateRange(void *ptr, u32 len); + + DCFlushRange(ptr, len); + ICInvalidateRange(ptr, len); +} +#elif defined(HW_WUP) +static void lightrec_code_inv(void *ptr, uint32_t len) +{ + wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len)); +} +#endif + static const struct lightrec_ops lightrec_ops = { .cop2_op = cop2_op, .enable_ram = lightrec_enable_ram, .hw_direct = lightrec_can_hw_direct, +#if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP) + .code_inv = lightrec_code_inv, +#endif }; static int lightrec_plugin_init(void) @@ -390,20 +448,32 @@ static int lightrec_plugin_init(void) lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM; lightrec_map[PSX_MAP_BIOS].address = psxR; lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH; + lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000; lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP; + if (!LIGHTREC_CUSTOM_MAP) { +#if P_HAVE_MMAP + code_buffer = mmap(0, CODE_BUFFER_SIZE, + PROT_EXEC | PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + if (code_buffer == MAP_FAILED) + return -ENOMEM; +#else + code_buffer = malloc(CODE_BUFFER_SIZE); + if (!code_buffer) + return -ENOMEM; +#endif + } + if (LIGHTREC_CUSTOM_MAP) { lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000; lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000; lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000; - lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000; - lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer; } + lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer; + use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER"); - if (getenv("LIGHTREC_BEGIN_CYCLES")) - lightrec_begin_cycles = (unsigned int) strtol( - getenv("LIGHTREC_BEGIN_CYCLES"), NULL, 0); lightrec_state = lightrec_init(name, lightrec_map, ARRAY_SIZE(lightrec_map), @@ -421,59 +491,42 @@ static int lightrec_plugin_init(void) return 0; } -static void lightrec_dump_regs(struct lightrec_state *state) -{ - struct lightrec_registers *regs = lightrec_get_registers(state); - - if (unlikely(booting)) - memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr)); - psxRegs.CP0.n.Status = regs->cp0[12]; - psxRegs.CP0.n.Cause = regs->cp0[13]; -} +static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2); +static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2); -static void lightrec_restore_regs(struct lightrec_state *state) +static void lightrec_plugin_execute_internal(bool block_only) { - struct lightrec_registers *regs = lightrec_get_registers(state); - - if (unlikely(booting)) - memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr)); - regs->cp0[12] = psxRegs.CP0.n.Status; - regs->cp0[13] = psxRegs.CP0.n.Cause; - regs->cp0[14] = psxRegs.CP0.n.EPC; -} - -extern void intExecuteBlock(); -extern void gen_interupt(); + struct lightrec_registers *regs; + u32 flags, cycles_pcsx; -static void lightrec_plugin_execute_block(void) -{ - u32 old_pc = psxRegs.pc; - u32 flags; + regs = lightrec_get_registers(lightrec_state); + gen_interupt((psxCP0Regs *)regs->cp0); + if (!block_only && stop) + return; - gen_interupt(); + cycles_pcsx = next_interupt - psxRegs.cycle; + assert((s32)cycles_pcsx > 0); // step during early boot so that 0x80030000 fastboot hack works - if (booting) - next_interupt = psxRegs.cycle; + block_stepping = block_only; + if (block_only) + cycles_pcsx = 0; if (use_pcsx_interpreter) { - intExecuteBlock(); + intExecuteBlock(0); } else { - lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle); - lightrec_restore_regs(lightrec_state); - + u32 cycles_lightrec = cycles_pcsx * 1024; if (unlikely(use_lightrec_interpreter)) { psxRegs.pc = lightrec_run_interpreter(lightrec_state, psxRegs.pc, - next_interupt); + cycles_lightrec); } else { psxRegs.pc = lightrec_execute(lightrec_state, - psxRegs.pc, next_interupt); + psxRegs.pc, cycles_lightrec); } - psxRegs.cycle = lightrec_current_cycle_count(lightrec_state); + lightrec_tansition_to_pcsx(lightrec_state); - lightrec_dump_regs(lightrec_state); flags = lightrec_exit_flags(lightrec_state); if (flags & LIGHTREC_EXIT_SEGFAULT) { @@ -483,61 +536,98 @@ static void lightrec_plugin_execute_block(void) } if (flags & LIGHTREC_EXIT_SYSCALL) - psxException(0x20, 0); - - if (booting && (psxRegs.pc & 0xff800000) == 0x80000000) - booting = false; + psxException(R3000E_Syscall << 2, 0, (psxCP0Regs *)regs->cp0); + if (flags & LIGHTREC_EXIT_BREAK) + psxException(R3000E_Bp << 2, 0, (psxCP0Regs *)regs->cp0); + else if (flags & LIGHTREC_EXIT_UNKNOWN_OP) { + u32 op = intFakeFetch(psxRegs.pc); + u32 hlec = op & 0x03ffffff; + if ((op >> 26) == 0x3b && hlec < ARRAY_SIZE(psxHLEt) && Config.HLE) { + lightrec_plugin_sync_regs_to_pcsx(0); + psxHLEt[hlec](); + lightrec_plugin_sync_regs_from_pcsx(0); + } + else + psxException(R3000E_RI << 2, 0, (psxCP0Regs *)regs->cp0); + } } - if ((psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x300) && - (psxRegs.CP0.n.Status & 0x1)) { + if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) { /* Handle software interrupts */ - psxRegs.CP0.n.Cause &= ~0x7c; - psxException(psxRegs.CP0.n.Cause, 0); + regs->cp0[13] &= ~0x7c; + psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0); } } static void lightrec_plugin_execute(void) { - extern int stop; - while (!stop) - lightrec_plugin_execute_block(); + lightrec_plugin_execute_internal(false); +} + +static void lightrec_plugin_execute_block(enum blockExecCaller caller) +{ + lightrec_plugin_execute_internal(true); } static void lightrec_plugin_clear(u32 addr, u32 size) { - if (addr == 0 && size == UINT32_MAX) + if ((addr == 0 && size == UINT32_MAX) + || (lightrec_hacks & LIGHTREC_OPT_INV_DMA_ONLY)) lightrec_invalidate_all(lightrec_state); else /* size * 4: PCSX uses DMA units */ lightrec_invalidate(lightrec_state, addr, size * 4); } -static void lightrec_plugin_notify(int note, void *data) +static void lightrec_plugin_notify(enum R3000Anote note, void *data) { - /* - To change once proper icache emulation is emulated switch (note) { - case R3000ACPU_NOTIFY_CACHE_UNISOLATED: - lightrec_plugin_clear(0, 0x200000/4); - break; - case R3000ACPU_NOTIFY_CACHE_ISOLATED: - // Sent from psxDma3(). - case R3000ACPU_NOTIFY_DMA3_EXE_LOAD: - default: - break; - }*/ + case R3000ACPU_NOTIFY_CACHE_ISOLATED: + case R3000ACPU_NOTIFY_CACHE_UNISOLATED: + /* not used, lightrec calls lightrec_enable_ram() instead */ + break; + case R3000ACPU_NOTIFY_BEFORE_SAVE: + /* non-null 'data' means this is HLE related sync */ + lightrec_plugin_sync_regs_to_pcsx(data == NULL); + break; + case R3000ACPU_NOTIFY_AFTER_LOAD: + lightrec_plugin_sync_regs_from_pcsx(data == NULL); + if (data == NULL) + lightrec_invalidate_all(lightrec_state); + break; + } } static void lightrec_plugin_apply_config() { + static u32 cycles_per_op_old; + u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT + ? Config.cycle_multiplier_override : Config.cycle_multiplier; + u32 cycles_per_op = cycle_mult * 1024 / 100; + assert(cycles_per_op); + + if (cycles_per_op_old && cycles_per_op_old != cycles_per_op) { + SysPrintf("lightrec: reinit block cache for cycles_per_op %.2f\n", + cycles_per_op / 1024.f); + lightrec_plugin_clear_block_caches(lightrec_state); + } + cycles_per_op_old = cycles_per_op; + lightrec_set_cycles_per_opcode(lightrec_state, cycles_per_op); } static void lightrec_plugin_shutdown(void) { lightrec_destroy(lightrec_state); + + if (!LIGHTREC_CUSTOM_MAP) { +#if P_HAVE_MMAP + munmap(code_buffer, CODE_BUFFER_SIZE); +#else + free(code_buffer); +#endif + } } static void lightrec_plugin_reset(void) @@ -555,29 +645,29 @@ static void lightrec_plugin_reset(void) regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A - booting = true; + lightrec_set_unsafe_opt_flags(lightrec_state, lightrec_hacks); } -void lightrec_plugin_prepare_load_state(void) +static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2) { struct lightrec_registers *regs; regs = lightrec_get_registers(lightrec_state); - memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c)); - memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0)); memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr)); - - lightrec_invalidate_all(lightrec_state); + memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0)); + if (need_cp2) + memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c)); } -void lightrec_plugin_prepare_save_state(void) +static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2) { struct lightrec_registers *regs; regs = lightrec_get_registers(lightrec_state); - memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c)); - memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0)); memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr)); + memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0)); + if (need_cp2) + memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c)); } R3000Acpu psxRec =