X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=33ecf8e10d7fdc01e793d0d120d87d248ede7162;hb=174c454a98a71475b72958c9f76293af7d6fb502;hp=95304103c8527f4507b36cf62072e915b1893070;hpb=009faf24e665b66283558234920faab03b781d6c;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 95304103..33ecf8e1 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -1,6 +1,6 @@ /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Mupen64plus - assem_arm.c * - * Copyright (C) 2009-2010 Ari64 * + * Copyright (C) 2009-2011 Ari64 * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -186,11 +186,15 @@ void *kill_pointer(void *stub) return i_ptr; } +// find where external branch is liked to using addr of it's stub: +// get address that insn one after stub loads (dyna_linker arg1), +// treat it as a pointer to branch insn, +// return addr where that branch jumps to int get_pointer(void *stub) { //printf("get_pointer(%x)\n",(int)stub); int *ptr=(int *)(stub+4); - assert((*ptr&0x0ff00000)==0x05900000); + assert((*ptr&0x0fff0000)==0x059f0000); u_int offset=*ptr&0xfff; int **l_ptr=(void *)ptr+offset+8; int *i_ptr=*l_ptr; @@ -762,15 +766,20 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg) void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr) { int n; + int dirty=0; // see if it's already allocated (and dealloc it) for(n=0;nregmap[n]==reg) {cur->regmap[n]=-1;} + if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) { + dirty=(cur->dirty>>n)&1; + cur->regmap[n]=-1; + } } cur->regmap[hr]=reg; cur->dirty&=~(1<dirty|=dirty<isconst&=~(1<0) { @@ -1002,7 +1012,8 @@ void emit_loadreg(int r, int hr) #ifdef FORCE32 if(r&64) { printf("64bit load in 32bit mode!\n"); - exit(1); + assert(0); + return; } #endif if((r&63)==0) @@ -1026,7 +1037,8 @@ void emit_storereg(int r, int hr) #ifdef FORCE32 if(r&64) { printf("64bit store in 32bit mode!\n"); - exit(1); + assert(0); + return; } #endif int addr=((int)reg)+((r&63)<>4); @@ -1049,7 +1061,7 @@ void emit_test(int rs, int rt) void emit_testimm(int rs,int imm) { u_int armval; - assem_debug("tst %s,$%d\n",regname[rs],imm); + assem_debug("tst %s,#%d\n",regname[rs],imm); genimm_checked(imm,&armval); output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval); } @@ -1442,10 +1454,10 @@ void emit_cmpimm(int rs,int imm) { u_int armval; if(genimm(imm,&armval)) { - assem_debug("cmp %s,$%d\n",regname[rs],imm); + assem_debug("cmp %s,#%d\n",regname[rs],imm); output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval); }else if(genimm(-imm,&armval)) { - assem_debug("cmn %s,$%d\n",regname[rs],imm); + assem_debug("cmn %s,#%d\n",regname[rs],imm); output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval); }else if(imm>0) { assert(imm<65536); @@ -2646,12 +2658,14 @@ do_readstub(int n) emit_writeword(rs,(int)&address); //emit_pusha(); save_regs(reglist); +#ifndef PCSX ds=i_regs!=®s[i]; int real_rs=(itype[i]==LOADLR)?-1:get_reg(i_regmap,rs1[i]); u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<=(signed int)0xC0000000) { + // Theoretically we can have a pagefault here, if the TLB has never + // been enabled and the address is outside the range 80000000..BFFFFFFF + // Write out the registers so the pagefault can be handled. This is + // a very rare case and likely represents a bug. + int ds=regmap!=regs[i].regmap; + if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); + if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); + else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); + } +#endif //emit_shrimm(rs,16,1); int cc=get_reg(regmap,CCREG); if(cc<0) { @@ -2842,12 +2868,14 @@ do_writestub(int n) } //emit_pusha(); save_regs(reglist); +#ifndef PCSX ds=i_regs!=®s[i]; int real_rs=get_reg(i_regmap,rs1[i]); u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<=(signed int)0xC0000000) { + // Theoretically we can have a pagefault here, if the TLB has never + // been enabled and the address is outside the range 80000000..BFFFFFFF + // Write out the registers so the pagefault can be handled. This is + // a very rare case and likely represents a bug. + int ds=regmap!=regs[i].regmap; + if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); + if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); + else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); + } +#endif //emit_shrimm(rs,16,1); int cc=get_reg(regmap,CCREG); if(cc<0) { @@ -2979,12 +3020,14 @@ do_unalignedwritestub(int n) emit_writeword(temp2,(int)&address); save_regs(reglist); +#ifndef PCSX ds=i_regs!=®s[i]; real_rs=get_reg(i_regmap,rs1[i]); u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<regmap,rt1[i]|64); tl=get_reg(i_regs->regmap,rt1[i]); @@ -3340,8 +3383,10 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) else addr=s; if(s>=0) { c=(i_regs->wasconst>>s)&1; - memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE; - if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1; + if(c) { + memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE; + if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1; + } } if(!using_tlb) { if(!c) { @@ -3377,6 +3422,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) } map=get_reg(i_regs->regmap,TLREG); assert(map>=0); + reglist&=~(1<=0); assert(remainder>=0); emit_movs(d1,remainder); - emit_negmi(remainder,remainder); + emit_movimm(0xffffffff,quotient); + emit_negmi(quotient,quotient); // .. quotient and .. + emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump) emit_movs(d2,HOST_TEMPREG); emit_jeq((int)out+52); // Division by zero emit_negmi(HOST_TEMPREG,HOST_TEMPREG); @@ -4479,12 +4527,13 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs) signed char remainder=get_reg(i_regs->regmap,HIREG); assert(quotient>=0); assert(remainder>=0); + emit_mov(d1,remainder); + emit_movimm(0xffffffff,quotient); // div0 case emit_test(d2,d2); - emit_jeq((int)out+44); // Division by zero + emit_jeq((int)out+40); // Division by zero emit_clz(d2,HOST_TEMPREG); emit_movimm(1<<31,quotient); emit_shl(d2,HOST_TEMPREG,d2); - emit_mov(d1,remainder); emit_shr(quotient,HOST_TEMPREG,quotient); emit_cmp(remainder,d2); emit_subcs(remainder,d2,remainder); @@ -4761,7 +4810,7 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty, if(hr!=EXCLUDE_REG) { reg=pre[hr]; if(((~u)>>(reg&63))&1) { - if(reg==entry[hr]||(reg>0&&entry[hr]<0)) { + if(reg>0) { if(((dirty_pre&~dirty)>>hr)&1) { if(reg>0&®<34) { emit_storereg(reg,hr); @@ -4775,21 +4824,6 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty, } } } - else // Check if register moved to a different register - if((new_hr=get_reg(entry,reg))>=0) { - if((dirty_pre>>hr)&(~dirty>>new_hr)&1) { - if(reg>0&®<34) { - emit_storereg(reg,hr); - if( ((is32_pre&~uu)>>reg)&1 ) { - emit_sarimm(hr,31,HOST_TEMPREG); - emit_storereg(reg|64,HOST_TEMPREG); - } - } - else if(reg>=64) { - emit_storereg(reg,hr); - } - } - } } } }