X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=70798effe39c1646377b3d897c4b35910c04a8de;hb=34ee348026b79e9bc0bc20450bf99ee987970a06;hp=2850d4e3abded49cf102ee6de9694816218cbd0d;hpb=277718fa66c96f64360b2c97a5dfa3ef3e6f1711;p=pcsx_rearmed.git
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 2850d4e3..70798eff 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -217,16 +217,26 @@ static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
}
}
- cur->regmap[hr]=reg;
- cur->dirty&=~(1<
dirty|=dirty<
isconst&=~(1<
regmap[hr] < 0 || !((cur->noevict >> hr) & 1));
+ cur->regmap[hr] = reg;
+ cur->dirty &= ~(1 << hr);
+ cur->dirty |= dirty << hr;
+ cur->isconst &= ~(1u << hr);
+ cur->noevict |= 1u << hr;
}
// Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
{
- alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
+{
+ if (cur->regmap[HOST_CCREG] < 0) {
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+ cur->noevict &= ~(1u << HOST_CCREG);
+ }
}
/* Assembler */
@@ -442,7 +452,6 @@ static void emit_loadreg(int r, int hr)
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
case CCREG: addr = &cycle_count; break;
- case CSREG: addr = &psxRegs.CP0.n.SR; break;
case INVCP: addr = &invc_ptr; break;
case ROREG: addr = &ram_offset; break;
default:
@@ -882,7 +891,7 @@ static void emit_cmovs_imm(int imm,int rt)
output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
}
-static void emit_cmovne_reg(int rs,int rt)
+static unused void emit_cmovne_reg(int rs,int rt)
{
assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
@@ -1725,6 +1734,14 @@ static void do_readstub(int n)
emit_loadreg(CCREG,2);
emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
emit_far_call(handler);
+#if 0
+ if (type == LOADW_STUB) {
+ // new cycle_count returned in r2
+ emit_addimm(2, -(int)stubs[n].d, cc<0?2:cc);
+ if (cc < 0)
+ emit_storereg(CCREG, 2);
+ }
+#endif
if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
mov_loadtype_adj(type,0,rt);
}
@@ -1795,6 +1812,14 @@ static void inline_readstub(enum stub_type type, int i, u_int addr,
emit_far_call(handler);
+#if 0
+ if (type == LOADW_STUB) {
+ // new cycle_count returned in r2
+ emit_addimm(2, -adj, cc<0?2:cc);
+ if (cc < 0)
+ emit_storereg(CCREG, 2);
+ }
+#endif
if(rt>=0&&dops[i].rt1!=0) {
switch(type) {
case LOADB_STUB: emit_signextend8(0,rt); break;
@@ -1878,9 +1903,9 @@ static void do_writestub(int n)
if(cc<0)
emit_loadreg(CCREG,2);
emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
- // returns new cycle_count
emit_far_call(handler);
- emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
+ // new cycle_count returned in r2
+ emit_addimm(2,-(int)stubs[n].d,cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
if(restore_jump)
@@ -1918,9 +1943,9 @@ static void inline_writestub(enum stub_type type, int i, u_int addr,
emit_loadreg(CCREG,2);
emit_addimm(cc<0?2:cc,adj,2);
emit_movimm((u_int)handler,3);
- // returns new cycle_count
emit_far_call(jump_handler_write_h);
- emit_addimm(0,-adj,cc<0?2:cc);
+ // new cycle_count returned in r2
+ emit_addimm(2,-adj,cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
restore_regs(reglist);