X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=70798effe39c1646377b3d897c4b35910c04a8de;hb=8496ee3ebc130025078a50d45880edcc0c95ae55;hp=4953faa03c5b3e0a4a1ef6f63bc55e41f881a358;hpb=8062d65a99a541d3092672655e11cb2babfe3857;p=pcsx_rearmed.git
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 4953faa0..70798eff 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1,7 +1,7 @@
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Mupen64plus/PCSX - assem_arm.c *
* Copyright (C) 2009-2011 Ari64 *
- * Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas *
+ * Copyright (C) 2010-2021 Gražvydas "notaz" Ignotas *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -19,7 +19,6 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
-#include "../gte.h"
#define FLAGLESS
#include "../gte.h"
#undef FLAGLESS
@@ -28,36 +27,12 @@
#include "pcnt.h"
#include "arm_features.h"
-#if defined(BASE_ADDR_FIXED)
-#elif defined(BASE_ADDR_DYNAMIC)
-u_char *translation_cache;
-#else
-u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
-#endif
-
-#ifndef __MACH__
-#define CALLER_SAVE_REGS 0x100f
-#else
-#define CALLER_SAVE_REGS 0x120f
-#endif
-
-#define unused __attribute__((unused))
-
#ifdef DRC_DBG
#pragma GCC diagnostic ignored "-Wunused-function"
#pragma GCC diagnostic ignored "-Wunused-variable"
#pragma GCC diagnostic ignored "-Wunused-but-set-variable"
#endif
-extern int cycle_count;
-extern int last_count;
-extern int pcaddr;
-extern int pending_exception;
-extern int branch_target;
-extern uint64_t readmem_dword;
-extern void *dynarec_local;
-extern u_int mini_ht[32][2];
-
void indirect_jump_indexed();
void indirect_jump();
void do_interrupt();
@@ -124,8 +99,6 @@ const u_int invalidate_addr_reg[16] = {
0,
0};
-static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
-
/* Linker */
static void set_jump_target(void *addr, void *target_)
@@ -219,115 +192,15 @@ static void *find_extjump_insn(void *stub)
// get address that insn one after stub loads (dyna_linker arg1),
// treat it as a pointer to branch insn,
// return addr where that branch jumps to
+#if 0
static void *get_pointer(void *stub)
{
//printf("get_pointer(%x)\n",(int)stub);
int *i_ptr=find_extjump_insn(stub);
- assert((*i_ptr&0x0f000000)==0x0a000000);
+ assert((*i_ptr&0x0f000000)==0x0a000000); // b
return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
}
-
-// Find the "clean" entry point from a "dirty" entry point
-// by skipping past the call to verify_code
-static void *get_clean_addr(void *addr)
-{
- signed int *ptr = addr;
- #ifndef HAVE_ARMV7
- ptr+=4;
- #else
- ptr+=6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- ptr++;
- if((*ptr&0xFF000000)==0xea000000) {
- return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
- }
- return ptr;
-}
-
-static int verify_dirty(u_int *ptr)
-{
- #ifndef HAVE_ARMV7
- u_int offset;
- // get from literal pool
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int source=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int copy=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int len=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- ptr++;
- #else
- // ARMv7 movw/movt
- assert((*ptr&0xFFF00000)==0xe3000000);
- u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
- u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
- u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
- ptr+=6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- //printf("verify_dirty: %x %x %x\n",source,copy,len);
- return !memcmp((void *)source,(void *)copy,len);
-}
-
-// This doesn't necessarily find all clean entry points, just
-// guarantees that it's not dirty
-static int isclean(void *addr)
-{
- #ifndef HAVE_ARMV7
- u_int *ptr=((u_int *)addr)+4;
- #else
- u_int *ptr=((u_int *)addr)+6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
- if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
- if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_vm) return 0;
- if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
- return 1;
-}
-
-// get source that block at addr was compiled from (host pointers)
-static void get_bounds(void *addr, u_char **start, u_char **end)
-{
- u_int *ptr = addr;
- #ifndef HAVE_ARMV7
- u_int offset;
- // get from literal pool
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int source=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- //assert((*ptr&0xFFFF0000)==0xe59f0000);
- //offset=*ptr&0xfff;
- //u_int copy=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int len=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- ptr++;
- #else
- // ARMv7 movw/movt
- assert((*ptr&0xFFF00000)==0xe3000000);
- u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
- //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
- u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
- ptr+=6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- *start=(u_char *)source;
- *end=(u_char *)source+len;
-}
+#endif
// Allocate a specific ARM register.
static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
@@ -344,16 +217,26 @@ static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
}
}
- cur->regmap[hr]=reg;
- cur->dirty&=~(1<
dirty|=dirty<
isconst&=~(1<
regmap[hr] < 0 || !((cur->noevict >> hr) & 1));
+ cur->regmap[hr] = reg;
+ cur->dirty &= ~(1 << hr);
+ cur->dirty |= dirty << hr;
+ cur->isconst &= ~(1u << hr);
+ cur->noevict |= 1u << hr;
}
// Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
{
- alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
+{
+ if (cur->regmap[HOST_CCREG] < 0) {
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+ cur->noevict &= ~(1u << HOST_CCREG);
+ }
}
/* Assembler */
@@ -424,17 +307,23 @@ static void genimm_checked(u_int imm,u_int *encoded)
static u_int genjmp(u_int addr)
{
- int offset=addr-(int)out-8;
- if(offset<-33554432||offset>=33554432) {
- if (addr>2) {
- SysPrintf("genjmp: out of range: %08x\n", offset);
- exit(1);
- }
+ if (addr < 3) return 0; // a branch that will be patched later
+ int offset = addr-(int)out-8;
+ if (offset < -33554432 || offset >= 33554432) {
+ SysPrintf("genjmp: out of range: %08x\n", offset);
+ abort();
return 0;
}
return ((u_int)offset>>2)&0xffffff;
}
+static unused void emit_breakpoint(void)
+{
+ assem_debug("bkpt #0\n");
+ //output_w32(0xe1200070);
+ output_w32(0xe7f001f0);
+}
+
static void emit_mov(int rs,int rt)
{
assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
@@ -458,6 +347,7 @@ static void emit_adds(int rs1,int rs2,int rt)
assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
}
+#define emit_adds_ptr emit_adds
static void emit_adcs(int rs1,int rs2,int rt)
{
@@ -471,12 +361,24 @@ static void emit_neg(int rs, int rt)
output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
}
+static void emit_negs(int rs, int rt)
+{
+ assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
+ output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
+}
+
static void emit_sub(int rs1,int rs2,int rt)
{
assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_subs(int rs1,int rs2,int rt)
+{
+ assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_zeroreg(int rt)
{
assem_debug("mov %s,#0\n",regname[rt]);
@@ -490,6 +392,7 @@ static void emit_loadlp(u_int imm,u_int rt)
output_w32(0xe5900000|rd_rn_rm(rt,15,0));
}
+#ifdef HAVE_ARMV7
static void emit_movw(u_int imm,u_int rt)
{
assert(imm<65536);
@@ -502,6 +405,7 @@ static void emit_movt(u_int imm,u_int rt)
assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
}
+#endif
static void emit_movimm(u_int imm,u_int rt)
{
@@ -539,41 +443,42 @@ static void emit_pcreladdr(u_int rt)
static void emit_loadreg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit load in 32bit mode!\n");
- assert(0);
- return;
- }
- if((r&63)==0)
+ assert(hr != EXCLUDE_REG);
+ if (r == 0)
emit_zeroreg(hr);
else {
- int addr=((int)reg)+((r&63)<>4);
- if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
- if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
- if(r==CCREG) addr=(int)&cycle_count;
- if(r==CSREG) addr=(int)&Status;
- if(r==INVCP) addr=(int)&invc_ptr;
- u_int offset = addr-(u_int)&dynarec_local;
+ void *addr;
+ switch (r) {
+ //case HIREG: addr = &hi; break;
+ //case LOREG: addr = &lo; break;
+ case CCREG: addr = &cycle_count; break;
+ case INVCP: addr = &invc_ptr; break;
+ case ROREG: addr = &ram_offset; break;
+ default:
+ assert(r < 34);
+ addr = &psxRegs.GPR.r[r];
+ break;
+ }
+ u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
+ assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
}
}
static void emit_storereg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit store in 32bit mode!\n");
- assert(0);
- return;
+ assert(hr != EXCLUDE_REG);
+ int addr = (int)&psxRegs.GPR.r[r];
+ switch (r) {
+ //case HIREG: addr = &hi; break;
+ //case LOREG: addr = &lo; break;
+ case CCREG: addr = (int)&cycle_count; break;
+ default: assert(r < 34); break;
}
- int addr=((int)reg)+((r&63)<>4);
- if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
- if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
- if(r==CCREG) addr=(int)&cycle_count;
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
- assem_debug("str %s,fp+%d\n",regname[hr],offset);
+ assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
}
@@ -605,10 +510,10 @@ static void emit_not(int rs,int rt)
output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
}
-static void emit_mvnmi(int rs,int rt)
+static void emit_mvneq(int rs,int rt)
{
- assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
- output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
+ assem_debug("mvneq %s,%s\n",regname[rt],regname[rs]);
+ output_w32(0x01e00000|rd_rn_rm(rt,0,rs));
}
static void emit_and(u_int rs1,u_int rs2,u_int rt)
@@ -647,6 +552,12 @@ static void emit_xor(u_int rs1,u_int rs2,u_int rt)
output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
+{
+ assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
+ output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
+}
+
static void emit_addimm(u_int rs,int imm,u_int rt)
{
assert(rs<16);
@@ -688,32 +599,40 @@ static void emit_addimm(u_int rs,int imm,u_int rt)
else if(rs!=rt) emit_mov(rs,rt);
}
-static void emit_addimm_and_set_flags(int imm,int rt)
+static void emit_addimm_ptr(u_int rs, uintptr_t imm, u_int rt)
+{
+ emit_addimm(rs, imm, rt);
+}
+
+static void emit_addimm_and_set_flags3(u_int rs, int imm, u_int rt)
{
assert(imm>-65536&&imm<65536);
u_int armval;
- if(genimm(imm,&armval)) {
- assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
- output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
- }else if(genimm(-imm,&armval)) {
- assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
- output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
- }else if(imm<0) {
- assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
+ if (genimm(imm, &armval)) {
+ assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0xe2900000|rd_rn_rm(rt,rs,0)|armval);
+ } else if (genimm(-imm, &armval)) {
+ assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0xe2500000|rd_rn_rm(rt,rs,0)|armval);
+ } else if (rs != rt) {
+ emit_movimm(imm, rt);
+ emit_adds(rs, rt, rt);
+ } else if (imm < 0) {
+ assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
- output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
+ output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
- }else{
- assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
+ } else {
+ assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
- output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
+ output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
}
}
-static void emit_addimm_no_flags(u_int imm,u_int rt)
+static void emit_addimm_and_set_flags(int imm, u_int rt)
{
- emit_addimm(rt,imm,rt);
+ emit_addimm_and_set_flags3(rt, imm, rt);
}
static void emit_addnop(u_int r)
@@ -723,23 +642,6 @@ static void emit_addnop(u_int r)
output_w32(0xe2800000|rd_rn_rm(r,r,0));
}
-static void emit_adcimm(u_int rs,int imm,u_int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("adc %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
-{
- // TODO: if(genimm(imm,&armval)) ...
- // else
- emit_movimm(imm,HOST_TEMPREG);
- emit_adds(HOST_TEMPREG,rsl,rtl);
- emit_adcimm(rsh,0,rth);
-}
-
static void emit_andimm(int rs,int imm,int rt)
{
u_int armval;
@@ -909,7 +811,7 @@ static void emit_sar(u_int rs,u_int shift,u_int rt)
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
}
-static void emit_orrshl(u_int rs,u_int shift,u_int rt)
+static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
@@ -918,7 +820,7 @@ static void emit_orrshl(u_int rs,u_int shift,u_int rt)
output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
}
-static void emit_orrshr(u_int rs,u_int shift,u_int rt)
+static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
@@ -973,7 +875,23 @@ static void emit_cmovb_imm(int imm,int rt)
output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
}
-static void emit_cmovne_reg(int rs,int rt)
+static void emit_cmovae_imm(int imm,int rt)
+{
+ assem_debug("movcs %s,#%d\n",regname[rt],imm);
+ u_int armval;
+ genimm_checked(imm,&armval);
+ output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
+}
+
+static void emit_cmovs_imm(int imm,int rt)
+{
+ assem_debug("movmi %s,#%d\n",regname[rt],imm);
+ u_int armval;
+ genimm_checked(imm,&armval);
+ output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
+}
+
+static unused void emit_cmovne_reg(int rs,int rt)
{
assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
@@ -985,6 +903,12 @@ static void emit_cmovl_reg(int rs,int rt)
output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
}
+static void emit_cmovb_reg(int rs,int rt)
+{
+ assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
+ output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
+}
+
static void emit_cmovs_reg(int rs,int rt)
{
assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
@@ -1013,6 +937,12 @@ static void emit_cmp(int rs,int rt)
output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
}
+static void emit_cmpcs(int rs,int rt)
+{
+ assem_debug("cmpcs %s,%s\n",regname[rs],regname[rt]);
+ output_w32(0x21500000|rd_rn_rm(0,rs,rt));
+}
+
static void emit_set_gz32(int rs, int rt)
{
//assem_debug("set_gz32\n");
@@ -1047,10 +977,16 @@ static void emit_set_if_carry32(int rs1, int rs2, int rt)
emit_cmovb_imm(1,rt);
}
+static int can_jump_or_call(const void *a)
+{
+ intptr_t offset = (u_char *)a - out - 8;
+ return (-33554432 <= offset && offset < 33554432);
+}
+
static void emit_call(const void *a_)
{
int a = (int)a_;
- assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
+ assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
u_int offset=genjmp(a);
output_w32(0xeb000000|offset);
}
@@ -1058,7 +994,7 @@ static void emit_call(const void *a_)
static void emit_jmp(const void *a_)
{
int a = (int)a_;
- assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
+ assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
u_int offset=genjmp(a);
output_w32(0xea000000|offset);
}
@@ -1071,56 +1007,71 @@ static void emit_jne(const void *a_)
output_w32(0x1a000000|offset);
}
-static void emit_jeq(int a)
+static void emit_jeq(const void *a_)
{
+ int a = (int)a_;
assem_debug("beq %x\n",a);
u_int offset=genjmp(a);
output_w32(0x0a000000|offset);
}
-static void emit_js(int a)
+static void emit_js(const void *a_)
{
+ int a = (int)a_;
assem_debug("bmi %x\n",a);
u_int offset=genjmp(a);
output_w32(0x4a000000|offset);
}
-static void emit_jns(int a)
+static void emit_jns(const void *a_)
{
+ int a = (int)a_;
assem_debug("bpl %x\n",a);
u_int offset=genjmp(a);
output_w32(0x5a000000|offset);
}
-static void emit_jl(int a)
+static void emit_jl(const void *a_)
{
+ int a = (int)a_;
assem_debug("blt %x\n",a);
u_int offset=genjmp(a);
output_w32(0xba000000|offset);
}
-static void emit_jge(int a)
+static void emit_jge(const void *a_)
{
+ int a = (int)a_;
assem_debug("bge %x\n",a);
u_int offset=genjmp(a);
output_w32(0xaa000000|offset);
}
-static void emit_jno(int a)
+static void emit_jo(const void *a_)
+{
+ int a = (int)a_;
+ assem_debug("bvs %x\n",a);
+ u_int offset=genjmp(a);
+ output_w32(0x6a000000|offset);
+}
+
+static void emit_jno(const void *a_)
{
+ int a = (int)a_;
assem_debug("bvc %x\n",a);
u_int offset=genjmp(a);
output_w32(0x7a000000|offset);
}
-static void emit_jc(int a)
+static void emit_jc(const void *a_)
{
+ int a = (int)a_;
assem_debug("bcs %x\n",a);
u_int offset=genjmp(a);
output_w32(0x2a000000|offset);
}
-static void emit_jcc(void *a_)
+static void emit_jcc(const void *a_)
{
int a = (int)a_;
assem_debug("bcc %x\n",a);
@@ -1128,7 +1079,16 @@ static void emit_jcc(void *a_)
output_w32(0x3a000000|offset);
}
-static void emit_callreg(u_int r)
+static void *emit_cbz(int rs, const void *a)
+{
+ void *ret;
+ emit_test(rs, rs);
+ ret = out;
+ emit_jeq(a);
+ return ret;
+}
+
+static unused void emit_callreg(u_int r)
{
assert(r<15);
assem_debug("blx %s\n",regname[r]);
@@ -1141,6 +1101,11 @@ static void emit_jmpreg(u_int r)
output_w32(0xe1a00000|rd_rn_rm(15,0,r));
}
+static void emit_ret(void)
+{
+ emit_jmpreg(14);
+}
+
static void emit_readword_indexed(int offset, int rs, int rt)
{
assert(offset>-4096&&offset<4096);
@@ -1157,6 +1122,13 @@ static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
}
+#define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
+
+static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
+}
static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
{
@@ -1164,30 +1136,72 @@ static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_str_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
+}
+
+static void emit_strb_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
+}
+
+static void emit_strh_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_movsbl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
@@ -1247,9 +1261,10 @@ static void emit_readword(void *addr, int rt)
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
+ assem_debug("ldr %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
}
+#define emit_readptr emit_readword
static void emit_writeword_indexed(int rt, int offset, int rs)
{
@@ -1306,7 +1321,7 @@ static void emit_writeword(int rt, void *addr)
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("str %s,fp+%d\n",regname[rt],offset);
+ assem_debug("str %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
}
@@ -1388,7 +1403,7 @@ static void emit_teq(int rs, int rt)
output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
}
-static void emit_rsbimm(int rs, int imm, int rt)
+static unused void emit_rsbimm(int rs, int imm, int rt)
{
u_int armval;
genimm_checked(imm,&armval);
@@ -1396,21 +1411,6 @@ static void emit_rsbimm(int rs, int imm, int rt)
output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
}
-// Load 2 immediates optimizing for small code size
-static void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
-{
- emit_movimm(imm1,rt1);
- u_int armval;
- if(genimm(imm2-imm1,&armval)) {
- assem_debug("add %s,%s,#%d\n",regname[rt2],regname[rt1],imm2-imm1);
- output_w32(0xe2800000|rd_rn_rm(rt2,rt1,0)|armval);
- }else if(genimm(imm1-imm2,&armval)) {
- assem_debug("sub %s,%s,#%d\n",regname[rt2],regname[rt1],imm1-imm2);
- output_w32(0xe2400000|rd_rn_rm(rt2,rt1,0)|armval);
- }
- else emit_movimm(imm2,rt2);
-}
-
// Conditionally select one of two immediates, optimizing for small code size
// This will only be called if HAVE_CMOV_IMM is defined
static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
@@ -1447,13 +1447,10 @@ static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
}
// special case for checking invalid_code
-static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
+static void emit_ldrb_indexedsr12_reg(int base, int r, int rt)
{
- assert(imm<128&&imm>=0);
- assert(r>=0&&r<16);
- assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
- output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
- emit_cmpimm(HOST_TEMPREG,imm);
+ assem_debug("ldrb %s,%s,%s lsr #12\n",regname[rt],regname[base],regname[r]);
+ output_w32(0xe7d00000|rd_rn_rm(rt,base,r)|0x620);
}
static void emit_callne(int a)
@@ -1486,14 +1483,6 @@ static void emit_orrne_imm(int rs,int imm,int rt)
output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
}
-static void emit_andne_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
-}
-
static unused void emit_addpl_imm(int rs,int imm,int rt)
{
u_int armval;
@@ -1593,7 +1582,8 @@ static void literal_pool_jumpover(int n)
set_jump_target(jaddr, out);
}
-static void emit_extjump2(u_char *addr, int target, void *linker)
+// parsed by get_pointer, find_extjump_insn
+static void emit_extjump(u_char *addr, u_int target)
{
u_char *ptr=(u_char *)addr;
assert((ptr[3]&0x0e)==0xa);
@@ -1601,29 +1591,16 @@ static void emit_extjump2(u_char *addr, int target, void *linker)
emit_loadlp(target,0);
emit_loadlp((u_int)addr,1);
- assert(addr>=translation_cache&&addr<(translation_cache+(1<=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
-//DEBUG >
-#ifdef DEBUG_CYCLE_COUNT
- emit_readword(&last_count,ECX);
- emit_add(HOST_CCREG,ECX,HOST_CCREG);
- emit_readword(&next_interupt,ECX);
- emit_writeword(HOST_CCREG,&Count);
- emit_sub(HOST_CCREG,ECX,HOST_CCREG);
- emit_writeword(ECX,&last_count);
-#endif
-//DEBUG <
- emit_jmp(linker);
+ assert(ndrc->translation_cache <= addr &&
+ addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
+ emit_far_jump(dyna_linker);
}
-static void emit_extjump(void *addr, int target)
+static void check_extjump2(void *src)
{
- emit_extjump2(addr, target, dyna_linker);
-}
-
-static void emit_extjump_ds(void *addr, int target)
-{
- emit_extjump2(addr, target, dyna_linker_ds);
+ u_int *ptr = src;
+ assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
+ (void)ptr;
}
// put rt_val into rt, potentially making use of rs with value rs_val
@@ -1670,23 +1647,6 @@ static int is_similar_value(u_int v1,u_int v2)
return 0;
}
-// trashes r2
-static void pass_args(int a0, int a1)
-{
- if(a0==1&&a1==0) {
- // must swap
- emit_mov(a0,2); emit_mov(a1,1); emit_mov(2,0);
- }
- else if(a0!=0&&a1==0) {
- emit_mov(a1,1);
- if (a0>=0) emit_mov(a0,0);
- }
- else {
- if(a0>=0&&a0!=0) emit_mov(a0,0);
- if(a1>=0&&a1!=1) emit_mov(a1,1);
- }
-}
-
static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
{
switch(type) {
@@ -1710,14 +1670,14 @@ static void do_readstub(int n)
enum stub_type type=stubs[n].type;
int i=stubs[n].a;
int rs=stubs[n].b;
- struct regstat *i_regs=(struct regstat *)stubs[n].c;
+ const struct regstat *i_regs=(struct regstat *)stubs[n].c;
u_int reglist=stubs[n].e;
- signed char *i_regmap=i_regs->regmap;
+ const signed char *i_regmap=i_regs->regmap;
int rt;
- if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
+ if(dops[i].itype==C2LS||dops[i].itype==LOADLR) {
rt=get_reg(i_regmap,FTEMP);
}else{
- rt=get_reg(i_regmap,rt1[i]);
+ rt=get_reg(i_regmap,dops[i].rt1);
}
assert(rs>=0);
int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
@@ -1728,7 +1688,7 @@ static void do_readstub(int n)
temp=r; break;
}
}
- if(rt>=0&&rt1[i]!=0)
+ if(rt>=0&&dops[i].rt1!=0)
reglist&=~(1<