X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=b9dd3cf96a62833fd60b9a9f5637d5d48d6593b2;hb=53358c1d5b032cc7186b71e3cc14f0ad6c2d5468;hp=3267cb6b87dc9e18d9b892f601f58f5c1c8997e8;hpb=9c997d193518cfb9f14d001ad18f721a809acfc8;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 3267cb6b..b9dd3cf9 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -101,8 +101,6 @@ const u_int invalidate_addr_reg[16] = {
   0,
   0};
 
-static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
-
 /* Linker */
 
 static void set_jump_target(void *addr, void *target_)
@@ -473,6 +471,7 @@ static void emit_loadlp(u_int imm,u_int rt)
   output_w32(0xe5900000|rd_rn_rm(rt,15,0));
 }
 
+#ifdef HAVE_ARMV7
 static void emit_movw(u_int imm,u_int rt)
 {
   assert(imm<65536);
@@ -485,6 +484,7 @@ static void emit_movt(u_int imm,u_int rt)
   assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
   output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
 }
+#endif
 
 static void emit_movimm(u_int imm,u_int rt)
 {
@@ -522,38 +522,33 @@ static void emit_pcreladdr(u_int rt)
 
 static void emit_loadreg(int r, int hr)
 {
-  if(r&64) {
-    SysPrintf("64bit load in 32bit mode!\n");
-    assert(0);
-    return;
-  }
-  if((r&63)==0)
+  assert(hr != EXCLUDE_REG);
+  if (r == 0)
     emit_zeroreg(hr);
   else {
-    int addr = (int)&psxRegs.GPR.r[r];
+    void *addr;
     switch (r) {
     //case HIREG: addr = &hi; break;
     //case LOREG: addr = &lo; break;
-    case CCREG: addr = (int)&cycle_count; break;
-    case CSREG: addr = (int)&Status; break;
-    case INVCP: addr = (int)&invc_ptr; break;
-    case ROREG: addr = (int)&ram_offset; break;
-    default: assert(r < 34); break;
+    case CCREG: addr = &cycle_count; break;
+    case CSREG: addr = &Status; break;
+    case INVCP: addr = &invc_ptr; break;
+    case ROREG: addr = &ram_offset; break;
+    default:
+      assert(r < 34);
+      addr = &psxRegs.GPR.r[r];
+      break;
     }
-    u_int offset = addr-(u_int)&dynarec_local;
+    u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
     assert(offset<4096);
-    assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
+    assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
     output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
   }
 }
 
 static void emit_storereg(int r, int hr)
 {
-  if(r&64) {
-    SysPrintf("64bit store in 32bit mode!\n");
-    assert(0);
-    return;
-  }
+  assert(hr != EXCLUDE_REG);
   int addr = (int)&psxRegs.GPR.r[r];
   switch (r) {
   //case HIREG: addr = &hi; break;
@@ -563,7 +558,7 @@ static void emit_storereg(int r, int hr)
   }
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
-  assem_debug("str %s,fp+%d\n",regname[hr],offset);
+  assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
   output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
 }
 
@@ -1637,7 +1632,8 @@ static void emit_extjump2(u_char *addr, u_int target, void *linker)
 
   emit_loadlp(target,0);
   emit_loadlp((u_int)addr,1);
-  assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
+  assert(ndrc->translation_cache <= addr &&
+         addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
   //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
 //DEBUG >
 #ifdef DEBUG_CYCLE_COUNT
@@ -1804,7 +1800,7 @@ static void inline_readstub(enum stub_type type, int i, u_int addr,
 {
   int rs=get_reg(regmap,target);
   int rt=get_reg(regmap,target);
-  if(rs<0) rs=get_reg(regmap,-1);
+  if(rs<0) rs=get_reg_temp(regmap);
   assert(rs>=0);
   u_int is_dynamic;
   uintptr_t host_addr = 0;
@@ -1958,7 +1954,7 @@ static void do_writestub(int n)
 static void inline_writestub(enum stub_type type, int i, u_int addr,
   const signed char regmap[], int target, int adj, u_int reglist)
 {
-  int rs=get_reg(regmap,-1);
+  int rs=get_reg_temp(regmap);
   int rt=get_reg(regmap,target);
   assert(rs>=0);
   assert(rt>=0);
@@ -2119,10 +2115,10 @@ static void c2op_assemble(int i, const struct regstat *i_regs)
         }
 #else
         if(cv==3&&shift)
-          emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
+          emit_far_call(gteMVMVA_part_cv3sh12_arm);
         else {
           emit_movimm(shift,1);
-          emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
+          emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
         }
         if(need_flags||need_ir)
           c2op_call_MACtoIR(lm,need_flags);