X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=d18f09a8b2643e7b3ffba977b0e00f58bd516bd3;hb=f5b13bdc7678f786f16ef25c1499555ddbc51321;hp=a22c3c0fbe633d1869945d52c87236eb97b17724;hpb=576bbd8f94b6163abfc4c02b65002249d768da00;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index a22c3c0f..d18f09a8 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -2563,14 +2563,11 @@ do_readstub(int n) rth=get_reg(i_regmap,rt1[i]|64); rt=get_reg(i_regmap,rt1[i]); } -#ifdef PCSX - if(rt<0) - // assume forced dummy read - rt=get_reg(i_regmap,-1); -#endif assert(rs>=0); - assert(rt>=0); if(addr<0) addr=rt; + if(addr<0) + // assume dummy read, no alloced reg + addr=get_reg(i_regmap,-1); assert(addr>=0); int ftable=0; if(type==LOADB_STUB||type==LOADBU_STUB) @@ -2623,19 +2620,22 @@ do_readstub(int n) //if((cc=get_reg(regmap,CCREG))>=0) { // emit_loadreg(CCREG,cc); //} - if(type==LOADB_STUB) - emit_movsbl((int)&readmem_dword,rt); - if(type==LOADBU_STUB) - emit_movzbl((int)&readmem_dword,rt); - if(type==LOADH_STUB) - emit_movswl((int)&readmem_dword,rt); - if(type==LOADHU_STUB) - emit_movzwl((int)&readmem_dword,rt); - if(type==LOADW_STUB) - emit_readword((int)&readmem_dword,rt); - if(type==LOADD_STUB) { - emit_readword((int)&readmem_dword,rt); - if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth); + if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) { + assert(rt>=0); + if(type==LOADB_STUB) + emit_movsbl((int)&readmem_dword,rt); + if(type==LOADBU_STUB) + emit_movzbl((int)&readmem_dword,rt); + if(type==LOADH_STUB) + emit_movswl((int)&readmem_dword,rt); + if(type==LOADHU_STUB) + emit_movzwl((int)&readmem_dword,rt); + if(type==LOADW_STUB) + emit_readword((int)&readmem_dword,rt); + if(type==LOADD_STUB) { + emit_readword((int)&readmem_dword,rt); + if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth); + } } emit_jmp(stubs[n][2]); // return address } @@ -3373,7 +3373,7 @@ void cop0_assemble(int i,struct regstat *i_regs) signed char t=get_reg(i_regs->regmap,rt1[i]); char copr=(source[i]>>11)&0x1f; //assert(t>=0); // Why does this happen? OOT is weird - if(t>=0) { + if(t>=0&&rt1[i]!=0) { #ifdef MUPEN64 emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0); emit_movimm((source[i]>>11)&0x1f,1); @@ -3594,7 +3594,7 @@ void cop2_assemble(int i,struct regstat *i_regs) signed char temp=get_reg(i_regs->regmap,-1); if (opcode2[i]==0) { // MFC2 signed char tl=get_reg(i_regs->regmap,rt1[i]); - if(tl>=0) + if(tl>=0&&rt1[i]!=0) cop2_get_dreg(copr,tl,temp); } else if (opcode2[i]==4) { // MTC2 @@ -3604,7 +3604,7 @@ void cop2_assemble(int i,struct regstat *i_regs) else if (opcode2[i]==2) // CFC2 { signed char tl=get_reg(i_regs->regmap,rt1[i]); - if(tl>=0) + if(tl>=0&&rt1[i]!=0) emit_readword((int)®_cop2c[copr],tl); } else if (opcode2[i]==6) // CTC2