X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.h;h=bbaf5b9e952eb387da6cebdbc92c7f8447faed75;hb=7c3a5182da4384e21a6ace037583fae399de5a02;hp=2457bb11a52e98cc4af6e24c9aac94ea58cabf26;hpb=643aeae3222be00a799ca1e96e795ff846f81fee;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2457bb11..bbaf5b9e 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -8,17 +8,10 @@
 #define HAVE_CONDITIONAL_CALL 1
 #define RAM_SIZE 0x200000
 
-#define REG_SHIFT 2
-
 /* ARM calling convention:
    r0-r3, r12: caller-save
    r4-r11: callee-save */
 
-#define ARG1_REG 0
-#define ARG2_REG 1
-#define ARG3_REG 2
-#define ARG4_REG 3
-
 /* GCC register naming convention:
    r10 = sl (base)
    r11 = fp (frame pointer)