X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.h;h=da4144dca8cdbb9fb4c4515666c7a1ed8dbee578;hb=1c2e3fc3baf93e7c17f678d0d187e9f424360bb2;hp=cc8b06751df67b0de21536826bfba0bda8d5772b;hpb=94d23bb9dcf282b00aa1391f6b6facf6aae1867a;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index cc8b0675..da4144dc 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -8,7 +8,28 @@
 #define CORTEX_A8_BRANCH_PREDICTION_HACK 1
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1
+#define HAVE_CONDITIONAL_CALL 1
 #define DISABLE_TLB 1
+//#define MUPEN64
+#define FORCE32 1
+#define DISABLE_COP1 1
+#define PCSX 1
+#define RAM_SIZE 0x200000
+
+#ifndef __ARM_ARCH_7A__
+//#undef CORTEX_A8_BRANCH_PREDICTION_HACK
+//#undef USE_MINI_HT
+#endif
+
+#ifndef BASE_ADDR_FIXED
+#define BASE_ADDR_FIXED 0
+#endif
+
+#ifdef FORCE32
+#define REG_SHIFT 2
+#else
+#define REG_SHIFT 3
+#endif
 
 /* ARM calling convention:
    r0-r3, r12: caller-save
@@ -36,8 +57,17 @@
 
 extern char *invc_ptr;
 
-#define BASE_ADDR 0x7000000 // Code generator target address
 #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
 
-// This is defined in linkage_arm.s, but gcc -O3 likes this better
-#define rdram ((unsigned int *)0x80000000)
+// Code generator target address
+#if BASE_ADDR_FIXED
+// "round" address helpful for debug
+#define BASE_ADDR 0x1000000
+#else
+#if defined(VITA)
+extern char* translation_cache;
+#else
+extern char translation_cache[1 << TARGET_SIZE_2];
+#endif
+#define BASE_ADDR (u_int)translation_cache
+#endif