X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=0942874841875bab6c6383ac2ae8d22751003d55;hb=858ad5116a9f17609b101a7df7016092c694a415;hp=897791fe10328000dbe4299b04a2809d73abd225;hpb=576bbd8f94b6163abfc4c02b65002249d768da00;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index 897791fe..09428748 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -61,6 +61,8 @@ static irq_func * const irq_funcs[] = {
 	[PSXINT_SPUDMA]	= spuInterrupt,
 	[PSXINT_MDECINDMA] = mdec0Interrupt,
 	[PSXINT_GPUOTCDMA] = gpuotcInterrupt,
+	[PSXINT_CDRDMA] = cdrDmaInterrupt,
+	[PSXINT_CDRLID] = cdrLidSeekInterrupt,
 };
 
 /* local dupe of psxBranchTest, using event_cycles */
@@ -109,13 +111,20 @@ void gen_interupt()
 		next_interupt, next_interupt - psxRegs.cycle);
 }
 
-void MTC0_()
+// from interpreter
+extern void MTC0(int reg, u32 val);
+
+void pcsx_mtc0(u32 reg)
 {
-	extern void psxMTC0();
+	evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
+	MTC0(reg, readmem_word);
+	gen_interupt();
+}
 
-	evprintf("ari64 MTC0 %08x %08x %u\n", psxRegs.code, psxRegs.pc, psxRegs.cycle);
-	psxMTC0();
-	gen_interupt(); /* FIXME: checking pending irqs should be enough */
+void pcsx_mtc0_ds(u32 reg)
+{
+	evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
+	MTC0(reg, readmem_word);
 }
 
 void new_dyna_save(void)
@@ -126,7 +135,7 @@ void new_dyna_save(void)
 void new_dyna_restore(void)
 {
 	int i;
-	for (i = 0; i < PSXINT_NEWDRC_CHECK; i++)
+	for (i = 0; i < PSXINT_COUNT; i++)
 		event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
 }
 
@@ -168,7 +177,9 @@ static void ari64_reset()
 	pending_exception = 1;
 }
 
-static void ari64_execute()
+// execute until predefined leave points
+// (HLE softcall exit and BIOS fastboot end)
+static void ari64_execute_until()
 {
 	schedule_timeslice();
 
@@ -181,10 +192,20 @@ static void ari64_execute()
 		psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
 }
 
+static void ari64_execute()
+{
+	while (!stop) {
+		ari64_execute_until();
+		evprintf("drc left @%08x\n", psxRegs.pc);
+	}
+}
+
 static void ari64_clear(u32 addr, u32 size)
 {
 	u32 start, end;
 
+	size *= 4; /* PCSX uses DMA units */
+
 	evprintf("ari64_clear %08x %04x\n", addr, size);
 
 	/* check for RAM mirrors */
@@ -220,7 +241,7 @@ R3000Acpu psxRec = {
 	ari64_reset,
 #if defined(__arm__)
 	ari64_execute,
-	ari64_execute,
+	ari64_execute_until,
 #else
 	intExecuteT,
 	intExecuteBlockT,